JP4285461B2 - Manufacturing method of multilayer wiring board - Google Patents

Manufacturing method of multilayer wiring board Download PDF

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JP4285461B2
JP4285461B2 JP2005246844A JP2005246844A JP4285461B2 JP 4285461 B2 JP4285461 B2 JP 4285461B2 JP 2005246844 A JP2005246844 A JP 2005246844A JP 2005246844 A JP2005246844 A JP 2005246844A JP 4285461 B2 JP4285461 B2 JP 4285461B2
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inner layer
layer material
wiring board
multilayer wiring
positioning holes
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JP2007059849A (en
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智之 川原
一彦 島村
茂 鎌田
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Panasonic Corp
Panasonic Electric Works Co Ltd
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Panasonic Corp
Matsushita Electric Works Ltd
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Description

本願発明は、多層配線板の製造方法に関するものである。   The present invention relates to a method for manufacturing a multilayer wiring board.

従来より、導体回路が形成された複数枚の内層材をプリプレグを介して重ね、さらにこの上下にプリプレグを介して銅箔等の金属箔を重ねて、これを加熱加圧して積層成形して多層配線板を製造している。このとき、複数枚の内層材が相互に位置ずれして各内層材の導体回路間でずれが生じることを防止するために、各内層材間を位置合わせした状態で積層成形をおこなうようにしている。このような内層材間の位置ずれを防止する方法としては、複数枚の内層材に位置決め穴を設け、この位置決め穴に位置決めピンを挿通させて各内層材間を位置合わせした後仮止めすることが知られている(たとえば、特許文献1,2参照)。その一例を図3を参照して説明する。図3によれば、内層材1に導体回路(図示なし)を形成するとともに内層材1の両側端部の対向する位置に一対の位置決め穴5形成のためのマーク(図示なし)をパターン形成し、この内層材1を複数枚積み重ねて穴開け加工により一対の位置決め穴5を一括して各内層材1の前記マーク位置に形成している。次いでこれらの内層材1を重ねて、各位置決め穴5に位置決めピン6を挿通させて各内層材1間を位置合わせしている。   Conventionally, a plurality of inner layer materials on which conductor circuits are formed are stacked via a prepreg, and a metal foil such as a copper foil is further stacked on the upper and lower sides via a prepreg, and this is heated and pressed to form a multilayer. Manufactures wiring boards. At this time, in order to prevent a plurality of inner layer materials from being displaced from each other and causing a shift between the conductor circuits of the inner layer materials, the lamination molding is performed in a state where the inner layer materials are aligned. Yes. As a method of preventing such misalignment between the inner layer materials, positioning holes are provided in a plurality of inner layer materials, and positioning pins are inserted into the positioning holes, and then the inner layer materials are aligned, and then temporarily fixed. Is known (see, for example, Patent Documents 1 and 2). One example will be described with reference to FIG. According to FIG. 3, a conductor circuit (not shown) is formed on the inner layer material 1, and marks (not shown) for forming a pair of positioning holes 5 are pattern-formed at opposing positions on both side ends of the inner layer material 1. A plurality of inner layer materials 1 are stacked and a pair of positioning holes 5 are collectively formed at the mark position of each inner layer material 1 by drilling. Next, these inner layer materials 1 are overlapped, and positioning pins 6 are inserted into the respective positioning holes 5 to align the inner layer materials 1.

ところで、多層配線板の製造方法においては、内層材の導体回路検査は、一般的には、穴開け穴加工後におこなっている。導体回路検査後に穴開け穴加工をおこなうと加工時に内層材の銅表面にキズがはいる場合があり、外観不良品が流出してしまうという問題があるからである。また、多層配線板を構成する各内層材は、通常、互いに同一の製造ロットのものを組合わせて用いている。
実開平5−41185号公報 特開平5−218648号公報
By the way, in the manufacturing method of a multilayer wiring board, the conductor circuit inspection of the inner layer material is generally performed after drilling. This is because if a hole is drilled after the conductor circuit is inspected, the copper surface of the inner layer material may be scratched at the time of processing, resulting in a problem that a defective appearance product flows out. Further, the inner layer materials constituting the multilayer wiring board are usually used in combination with the same production lot.
Japanese Utility Model Publication No. 5-41185 JP-A-5-218648

上記方法によれば、検査時に内層材の不良が見つかった場合、この内層材と同じ多層配線板を構成する正常な内層材と、製造ロットの異なる内層材とを組合わせて多層配線板を製造しようとしても位置合わせができないことから、同じ多層配線板を構成する正常な内層材も全て廃却処分せざるをえなかった。   According to the above method, when a defect in the inner layer material is found during the inspection, a multilayer wiring board is manufactured by combining a normal inner layer material constituting the same multilayer wiring board as the inner layer material and an inner layer material having a different production lot. Since it was impossible to align even if it tried, all the normal inner-layer materials which comprise the same multilayer wiring board had to be discarded.

そこで、本願発明は、以上の通りの背景から、不良が発生した内層材のみを廃却処分とし、従来廃却処分としていた正常な内層材を再利用することでコストを抑え生産性を向上させるとともに、内層材間の位置合わせ精度を低下させることのない多層配線板の製造方法を提供することを課題としている。   Therefore, in the present invention, from the background as described above, only the inner layer material in which the defect has occurred is disposed of as disposal, and the normal inner layer material that has been conventionally disposed of as waste is reused to reduce costs and improve productivity. In addition, it is an object to provide a method for manufacturing a multilayer wiring board that does not lower the alignment accuracy between inner layer materials.

本願発明は、前記の課題を解決するものとして、位置決め穴形成のためのマークを内層材の両側端部の対向する位置にそれぞれ設けた後、この内層材の前記マーク位置に一対の位置決め穴を穴開け加工により形成し、次いで内層材間の位置合わせを行って多層配線板を形成する多層配線板の製造方法であって、製造ロットの異なる内層材の各々に位置決め穴形成のためのマークを内層材の両側端部に少なくとも2対以上設けて複数回の穴開け加工を可能とし、製造ロットの異なる内層材を組み合わせて穴開け加工未実施のマーク位置に一対の位置決め穴を一括して形成し、各内層材間の位置合わせを行って多層配線板を形成することを特徴とする。 In order to solve the above-mentioned problems, the present invention provides a mark for forming a positioning hole at a position opposite to both end portions of the inner layer material, and then a pair of positioning holes at the mark position of the inner layer material. A method of manufacturing a multilayer wiring board that is formed by drilling and then aligning the inner layer materials to form a multilayer wiring board, wherein a mark for forming a positioning hole is formed on each inner layer material in a different production lot. to allow the drilling of more than once provided at least two or more pairs to both side end portions of the inner layer member, collectively a pair of positioning holes combine different inner layer material production lots to mark the position of the boring iNCOMPLETE The multilayer wiring board is formed by forming and aligning the inner layer materials .

前記のとおりの上記発明によれば、位置決め穴形成のためのマークを内層材の両側端部に少なくとも2対以上設けるようにすることで複数回の穴開け加工が可能となるため、従来廃却処分としていた正常な内層材を再利用することができる。すなわち、正常な内層材と、製造ロットの異なる、たとえば穴開け加工未実施の内層材とを用いて、穴開け加工未実施のマーク位置に再度一対の位置決め穴を一括して形成し、各内層材間で位置合わせした後、積層成形することができるのである。これによって、コストを抑え生産性を向上させるとともに内層材間の位置合わせ精度を低下させることなく多層配線板を製造することができる。 According to the invention as described above, since at least two pairs of marks for forming the positioning holes are provided at both end portions of the inner layer material, a plurality of drilling processes can be performed. The normal inner layer material that has been disposed of can be reused. That is, using a normal inner layer material and an inner layer material having a different production lot, for example, an unperformed hole layer, a pair of positioning holes are formed again at the unperformed hole position, and each inner layer After alignment between the materials, lamination molding can be performed. As a result, it is possible to manufacture a multilayer wiring board without increasing costs and improving productivity while reducing the alignment accuracy between the inner layer materials.

本願発明は前記のとおりの特徴をもつものであるが、以下に、発明を実施するための最良の形態を図面を参照して説明する。図1は実施の形態を説明するための平面図であり、図2は多層配線板の一例を示した断面図である。   The present invention has the features as described above, and the best mode for carrying out the invention will be described below with reference to the drawings. FIG. 1 is a plan view for explaining an embodiment, and FIG. 2 is a cross-sectional view showing an example of a multilayer wiring board.

図1に示すように、内層材1に対して位置決め穴形成のためのマーク2と導体回路3を設けており、マーク2は内層材1の両側端部の対向する位置に少なくとも2対以上設けている。マーク2の形成方法については、特に制限されるものではなく、たとえば、エッチングによって形成するようにしてもよい。   As shown in FIG. 1, a mark 2 and a conductor circuit 3 for forming a positioning hole are provided in the inner layer material 1, and at least two pairs of marks 2 are provided at opposite positions on both side ends of the inner layer material 1. ing. The method for forming the mark 2 is not particularly limited, and for example, the mark 2 may be formed by etching.

このマーク2は位置決め穴形成のための目印であればよく、その形状については特に制限されるものではない。そして、マーク2位置への穴開け加工は、内層材1を一枚ずつもしくは所定枚数重ねておこなってもよく、製造設備等によって適宜に設定される。   The mark 2 may be a mark for forming a positioning hole, and the shape thereof is not particularly limited. Then, the drilling process at the mark 2 position may be performed one by one or a predetermined number of inner layer materials 1 and may be appropriately set by a manufacturing facility or the like.

本願発明は、前述のとおり、位置決め穴形成のためのマーク2を2対以上設けることで、複数回の穴開け加工を可能とするものである。すなわち、最初に穴開け加工したマーク2位置とは別のマーク2位置に、新たな一対の位置決め穴の形成を可能とするものである。なお、本願発明でいう「一対の位置決め穴」とは、多層配線板の製造工程において各内層材1,1’間の位置合わせに必要な複数個の位置決め穴のことを意味しており、多層配線板の種類や製造設備によって適宜に決定される。たとえば、内層材1,1’の両側端部の対向する位置に位置決め穴をそれぞれ1個ずつ設けて(一枚の内層材に合計2個の位置決め穴)、合計2本の位置決めピンを各位置決め穴に挿通させて各内層材1,1’間の位置合わせをする場合、あるいは内層材1,1’の両側端部の対向する位置に位置決め穴をそれぞれ2個ずつ設けて(一枚の内層材に合計4個の位置決め穴)、合計4本の位置決めピンを各位置決め穴に挿通させて各内層材1,1’間の位置合わせをする場合等いずれの場合も、内層材1,1’に設けた位置決め穴は、一対の位置決め穴である。よって、2対の位置決め穴形成のためのマーク2を内層材1,1’に設けるときは、前述の例でいうと、前者は内層材1,1’の両側端部の対向する位置にそれぞれ2個ずつマーク2を設けるようにし(一枚の内層材に合計4個のマーク)、後者は内層材1,1’の両側端部の対向する位置にそれぞれ4個ずつマーク2を設けるようにする(一枚の内層材に合計8個のマーク)。3対以上のマークを設けるときも同様である。   As described above, the present invention enables two or more drilling processes by providing two or more pairs of marks 2 for forming positioning holes. That is, it is possible to form a new pair of positioning holes at the mark 2 position different from the mark 2 position where the hole was drilled first. The “pair of positioning holes” in the present invention means a plurality of positioning holes necessary for alignment between the inner layer materials 1 and 1 ′ in the manufacturing process of the multilayer wiring board. It is determined appropriately depending on the type of wiring board and manufacturing equipment. For example, one positioning hole is provided in each of the opposing positions on both side ends of the inner layer materials 1 and 1 '(a total of two positioning holes in one inner layer material), and a total of two positioning pins are positioned for each. When positioning between the inner layer materials 1 and 1 ′ through the holes, or by providing two positioning holes at opposite positions on both side ends of the inner layer materials 1 and 1 ′ (one inner layer In any case, for example, when positioning the inner layer materials 1 and 1 'by inserting a total of four positioning pins through the positioning holes, the inner layer materials 1 and 1' The positioning holes provided in are a pair of positioning holes. Therefore, when providing the mark 2 for forming two pairs of positioning holes in the inner layer material 1, 1 ′, in the above example, the former is located at the opposite position of the both end portions of the inner layer material 1, 1 ′. Two marks 2 are provided (a total of four marks on one inner layer material), and the latter is provided with four marks 2 at opposite positions on both side ends of the inner layer materials 1 and 1 '. (8 marks in total for one inner layer material). The same applies when three or more pairs of marks are provided.

2対以上のマーク2を設けることによって、たとえば、内層材1,1’の導体回路検査後において従来廃却処分としていた正常な内層材1と、この内層材1と同じ多層配線板を構成する、たとえば、製造ロットが異なる穴開け加工未実施の内層材1’とを組合わせることで多層配線板を製造することができる。具体的には、従来廃却処分としていた正常な内層材1と穴開け加工未実施の内層材1’とを積み重ねて穴開け加工により穴開け加工未実施のマーク2位置に新たな一対の位置決め穴を一括して形成する。次いで、導体回路検査を実施し、正常であればこれら各内層材1,1’間で位置合わせをして多層配線板を製造する。たとえば、内層材1’が不良品であればその内層材1’を廃却処分とし、正常な内層材1と新たな穴開け加工未実施の内層材1’とを用いて、再び一対の位置決め穴を形成して、各内層材1,1’間で位置合わせをして多層配線板を製造するようにする。このとき、一対の位置決め穴を形成する工程は予め設けたマーク2がなくなるまで繰り返し実施することができる。 By providing two or more pairs of marks 2, for example, a normal inner layer material 1 that has been conventionally disposed of after the conductor circuit inspection of the inner layer materials 1 and 1 ′ and the same multilayer wiring board as the inner layer material 1 are configured. For example, a multilayer wiring board can be manufactured by combining the inner layer material 1 ′ that has not been subjected to drilling processing in different manufacturing lots. Specifically, the normal inner layer material 1 that has been disposed of in the past and the inner layer material 1 ′ that has not been drilled are stacked and a new pair of positioning is performed at the position of the mark 2 that has not been drilled by drilling. Holes are formed in a lump . Next, a conductor circuit inspection is carried out, and if it is normal, the inner layer materials 1 and 1 'are aligned to manufacture a multilayer wiring board. For example, if the inner layer material 1 ′ is a defective product, the inner layer material 1 ′ is disposed of and disposed of, and a pair of positioning is performed again using the normal inner layer material 1 and the new inner layer material 1 ′ that has not been drilled. Holes are formed, and alignment is performed between the inner layer materials 1 and 1 'to manufacture a multilayer wiring board. At this time, the step of forming the pair of positioning holes can be repeatedly performed until there is no mark 2 provided in advance.

本願発明における内層材1としては、たとえば、銅張りガラス基材エポキシ樹脂積層板や銅張りガラス基材ポリイミド樹脂積層板などに導体回路3を形成したものを用いることができる。そして、この内層材1をプリプレグ4を介して重ね合わせ、たとえば、さらにその外層に銅箔等の金属箔を重ね合わせるようにして多層配線板を製造するようにしてもよい。   As the inner layer material 1 in this invention, what formed the conductor circuit 3 in the copper clad glass base-material epoxy resin laminated board, the copper clad glass base polyimide resin laminated board, etc. can be used, for example. Then, the inner layer material 1 may be overlapped via the prepreg 4 and, for example, a multilayer wiring board may be manufactured by overlapping a metal foil such as a copper foil on the outer layer.

以下に実施例を示し、さらに詳しく説明する。もちろん以下の例によって本願発明が限定されることはない。   Hereinafter, examples will be shown and described in more detail. Of course, the present invention is not limited by the following examples.

内層材(512×423×0.2mm)にドライフィルムをラミネート後、フィルムを用いて導体回路パターンを露光した後、現像、エッチング、剥離をおこない、導体回路パターンおよび2対のマークを形成した。次いで、位置決め穴の穴開け加工をおこなった。多層配線板は図2で示した構造の6層シールド板とした。L2−L3層の内層材100枚、L4−L5層の内層材100枚を1ロットとし、それぞれ5ロット分について、導体回路、2対のマークの形成および穴開け加工をおこない、導体回路検査を実施した後、良品と不良の発生個数を調べた。   After laminating a dry film on the inner layer material (512 × 423 × 0.2 mm), the conductor circuit pattern was exposed using the film, and then developed, etched, and peeled to form a conductor circuit pattern and two pairs of marks. Next, the positioning holes were drilled. The multilayer wiring board was a six-layer shield board having the structure shown in FIG. 100 sheets of L2-L3 layer inner layer material and 100 layers of L4-L5 layer inner layer material are taken as 1 lot, and for each of 5 lots, conductor circuit, 2 pairs of marks are formed and drilled, and conductor circuit inspection is performed. After the implementation, the number of non-defective products and defects was examined.

表1に導体回路検査結果を示す。   Table 1 shows the results of the conductor circuit inspection.

表2は、導体回路検査後に製造した多層配線板のセット個数である。 Table 2 shows the number of sets of multilayer wiring boards manufactured after the conductor circuit inspection.

表2の結果より、マークを2対設けることによって、正常な内層材を廃却処分することなく、この正常な内層材と、異なるロットの内層材とを組合わせて再利用することで多層配線板をより多く製造することができることがわかった。 From the results in Table 2, by providing two pairs of marks, the normal inner layer material and the inner layer material of different lots can be combined and reused without disposing of the normal inner layer material and discarded. It has been found that more plates can be produced.

本願発明の実施の形態を説明する平面図である。It is a top view explaining embodiment of this invention. 本願発明における多層配線板の一例を示した断面図である。It is sectional drawing which showed an example of the multilayer wiring board in this invention. 従来の多層配線板の製造方法を説明するための斜視図である。It is a perspective view for demonstrating the manufacturing method of the conventional multilayer wiring board.

符号の説明Explanation of symbols

1,1’ 内層材
2 マーク
3 導体回路
4 プリプレグ
5 位置決め穴
6 位置決めピン
1, 1 'inner layer material 2 mark 3 conductor circuit 4 prepreg 5 positioning hole 6 positioning pin

Claims (1)

位置決め穴形成のためのマークを内層材の両側端部の対向する位置にそれぞれ設けた後、この内層材の前記マーク位置に一対の位置決め穴を穴開け加工により形成し、次いで内層材間の位置合わせを行って多層配線板を形成する多層配線板の製造方法であって、
製造ロットの異なる内層材の各々に位置決め穴形成のためのマークを内層材の両側端部に少なくとも2対以上設けて複数回の穴開け加工を可能とし、製造ロットの異なる内層材を組み合わせて穴開け加工未実施のマーク位置に一対の位置決め穴を一括して形成し、各内層材間の位置合わせを行って多層配線板を形成することを特徴とする多層配線板の製造方法。
After providing marks for forming positioning holes at opposite positions on both side edges of the inner layer material, a pair of positioning holes are formed at the mark position of the inner layer material by drilling, and then the position between the inner layer materials A method for manufacturing a multilayer wiring board that forms a multilayer wiring board by combining,
To allow the drilling of more than once provided at least two or more pairs of marks for positioning hole formed in each of the different inner layer member production lots at the respective side end portions of the inner layer member, a combination of different inner layer material production lots A method for manufacturing a multilayer wiring board, comprising: forming a multilayer wiring board by forming a pair of positioning holes collectively at a mark position where punching has not been performed , and performing alignment between each inner layer material .
JP2005246844A 2005-08-26 2005-08-26 Manufacturing method of multilayer wiring board Expired - Fee Related JP4285461B2 (en)

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CN102098884B (en) * 2010-12-29 2014-07-23 北大方正集团有限公司 Standard laminated plate and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111800959A (en) * 2020-08-07 2020-10-20 博敏电子股份有限公司 Fusion riveting method for improving alignment precision between circuit board layers

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