JP4283656B2 - 半導体装置の作製方法、半導体装置及び電子機器 - Google Patents
半導体装置の作製方法、半導体装置及び電子機器 Download PDFInfo
- Publication number
- JP4283656B2 JP4283656B2 JP2003411870A JP2003411870A JP4283656B2 JP 4283656 B2 JP4283656 B2 JP 4283656B2 JP 2003411870 A JP2003411870 A JP 2003411870A JP 2003411870 A JP2003411870 A JP 2003411870A JP 4283656 B2 JP4283656 B2 JP 4283656B2
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- substrate
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- semiconductor
- adhesive
- metal oxide
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
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- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
Landscapes
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003411870A JP4283656B2 (ja) | 2002-12-18 | 2003-12-10 | 半導体装置の作製方法、半導体装置及び電子機器 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002366158 | 2002-12-18 | ||
| JP2003411870A JP4283656B2 (ja) | 2002-12-18 | 2003-12-10 | 半導体装置の作製方法、半導体装置及び電子機器 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2004214635A JP2004214635A (ja) | 2004-07-29 |
| JP2004214635A5 JP2004214635A5 (enExample) | 2007-01-25 |
| JP4283656B2 true JP4283656B2 (ja) | 2009-06-24 |
Family
ID=32828746
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003411870A Expired - Fee Related JP4283656B2 (ja) | 2002-12-18 | 2003-12-10 | 半導体装置の作製方法、半導体装置及び電子機器 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4283656B2 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4574118B2 (ja) * | 2003-02-12 | 2010-11-04 | 株式会社半導体エネルギー研究所 | 半導体装置及びその作製方法 |
| JP4481040B2 (ja) * | 2003-03-07 | 2010-06-16 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| WO2006118293A1 (en) | 2005-04-27 | 2006-11-09 | Semiconductor Energy Laboratory Co., Ltd. | Wireless chip |
| JP5089033B2 (ja) | 2005-11-04 | 2012-12-05 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| WO2018055838A1 (ja) * | 2016-09-23 | 2018-03-29 | 株式会社テンシックス | 半導体素子の製造方法及び半導体基板 |
| US20250006498A1 (en) * | 2021-11-24 | 2025-01-02 | Jsw Aktina System Co., Ltd. | Laser irradiation apparatus, laser irradiation method, and method for manufacturing semiconductor device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3578828B2 (ja) * | 1995-03-21 | 2004-10-20 | 株式会社半導体エネルギー研究所 | 表示装置の作製方法 |
| JP2000068520A (ja) * | 1997-12-17 | 2000-03-03 | Matsushita Electric Ind Co Ltd | 半導体薄膜、その製造方法、および製造装置、ならびに半導体素子、およびその製造方法 |
| JP3809733B2 (ja) * | 1998-02-25 | 2006-08-16 | セイコーエプソン株式会社 | 薄膜トランジスタの剥離方法 |
| JP3586558B2 (ja) * | 1998-04-17 | 2004-11-10 | 日本電気株式会社 | 薄膜の改質方法及びその実施に使用する装置 |
-
2003
- 2003-12-10 JP JP2003411870A patent/JP4283656B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2004214635A (ja) | 2004-07-29 |
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