JP4271579B2 - メモリを保護する装置および方法 - Google Patents

メモリを保護する装置および方法 Download PDF

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Publication number
JP4271579B2
JP4271579B2 JP2003555796A JP2003555796A JP4271579B2 JP 4271579 B2 JP4271579 B2 JP 4271579B2 JP 2003555796 A JP2003555796 A JP 2003555796A JP 2003555796 A JP2003555796 A JP 2003555796A JP 4271579 B2 JP4271579 B2 JP 4271579B2
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Japan
Prior art keywords
control
memory
state
circuit board
circuit
Prior art date
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Expired - Fee Related
Application number
JP2003555796A
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English (en)
Japanese (ja)
Other versions
JP2005514815A5 (https=
JP2005514815A (ja
Inventor
シェレンバーガー，ジョン，ライアン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thomson Licensing SAS
Original Assignee
Thomson Licensing SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing SAS filed Critical Thomson Licensing SAS
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Publication of JP2005514815A5 publication Critical patent/JP2005514815A5/ja
Application granted granted Critical
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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41—Structure of client; Structure of client peripherals
    • H04N21/426—Internal components of the client ; Characteristics thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/443—OS processes, e.g. booting an STB, implementing a Java virtual machine in an STB or power management in an STB
    • H04N21/4436—Power management, e.g. shutting down unused components of the receiver
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0016—Inter-integrated circuit (I2C)
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/443—OS processes, e.g. booting an STB, implementing a Java virtual machine in an STB or power management in an STB
    • H04N21/4435—Memory management
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/63—Generation or supply of power specially adapted for television receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Television Receiver Circuits (AREA)
  • Circuits Of Receivers In General (AREA)
  • Storage Device Security (AREA)
  • Electronic Switches (AREA)
  • Selective Calling Equipment (AREA)
  • Power Sources (AREA)
JP2003555796A 2001-12-19 2002-12-11 メモリを保護する装置および方法 Expired - Fee Related JP4271579B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/025,160 US6876400B2 (en) 2001-12-19 2001-12-19 Apparatus and method for protecting a memory sharing signal control lines with other circuitry
PCT/US2002/039529 WO2003055204A1 (en) 2001-12-19 2002-12-11 Apparatus and method for protecting a memory

Publications (3)

Publication Number Publication Date
JP2005514815A JP2005514815A (ja) 2005-05-19
JP2005514815A5 JP2005514815A5 (https=) 2006-02-02
JP4271579B2 true JP4271579B2 (ja) 2009-06-03

Family

ID=21824384

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003555796A Expired - Fee Related JP4271579B2 (ja) 2001-12-19 2002-12-11 メモリを保護する装置および方法

Country Status (11)

Country Link
US (1) US6876400B2 (https=)
EP (1) EP1457044B1 (https=)
JP (1) JP4271579B2 (https=)
KR (1) KR100922450B1 (https=)
CN (1) CN100376108C (https=)
AU (1) AU2002357814A1 (https=)
DE (1) DE60212447T2 (https=)
ES (1) ES2265518T3 (https=)
MX (1) MXPA04006069A (https=)
MY (1) MY136089A (https=)
WO (1) WO2003055204A1 (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7120013B1 (en) * 2003-04-11 2006-10-10 Raytheon Company System and method for transferring large amounts of stored data
US20050187545A1 (en) * 2004-02-20 2005-08-25 Hooven Michael D. Magnetic catheter ablation device and method
AT501137B1 (de) * 2004-12-06 2006-11-15 Vaillant Gmbh Verfahren zur erweiterten nutzung einer iic-bus-signalleitung
EP1788574B1 (de) * 2005-11-16 2012-04-04 Siemens Aktiengesellschaft Elektrisches Gerät dessen Speicherdaten auch bei Defekt auslesbar sind
US7868660B2 (en) 2006-04-20 2011-01-11 Atmel Corporation Serial communications bus with active pullup
KR101437868B1 (ko) * 2007-11-14 2014-09-05 삼성디스플레이 주식회사 표시 장치
KR101389205B1 (ko) * 2008-12-26 2014-04-25 엘지디스플레이 주식회사 액정표시장치와 그 구동방법
JP2014216785A (ja) * 2013-04-24 2014-11-17 株式会社東芝 電子機器、表示方法及びプログラム
CN103226888B (zh) * 2013-05-02 2015-08-19 四川省迪特尔电子有限公司 一种智能控制的红外遥控智能节电待机系统用电源电路
US9710423B2 (en) * 2014-04-02 2017-07-18 Qualcomm Incorporated Methods to send extra information in-band on inter-integrated circuit (I2C) bus
WO2015170938A1 (ko) * 2014-05-08 2015-11-12 엘지전자 주식회사 영상제공장치
CN105472295A (zh) * 2016-01-06 2016-04-06 广州视声智能科技有限公司 一种用于二线制可视对讲系统的视频信号传输的电路
CN119473951B (zh) * 2024-08-16 2026-03-13 中国第一汽车股份有限公司 芯片中存储器的控制电路、方法、装置和存储介质

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5563655A (en) * 1994-02-28 1996-10-08 Eastman Kodak Company Intelligent digital image storage for an electronic camera
US6151077A (en) * 1994-12-22 2000-11-21 U.S. Philips Corporation Interface system for a television receiver
US5748255A (en) * 1994-12-22 1998-05-05 Philips Electronics North America Corporation Interface system for a television receiver
US6693678B1 (en) * 1997-12-18 2004-02-17 Thomson Licensing S.A. Data bus driver having first and second operating modes for coupling data to the bus at first and second rates
CN1319371C (zh) * 1998-09-30 2007-05-30 汤姆森特许公司 提供电视接收机校准功能的方法和设备
KR100675497B1 (ko) * 1999-09-22 2007-02-05 소니 가부시끼 가이샤 정보 처리 장치, 표시 제어 방법, 및 기록 매체
WO2001022583A2 (en) * 1999-09-22 2001-03-29 Thomson Licensing S.A. Pll with memory for electronic alignments
AU2001275033A1 (en) * 2000-06-02 2001-12-17 Thomson Licensing S.A. Bus operation with integrated circuits in an unpowered state
AU2001275245A1 (en) * 2000-06-09 2001-12-24 Thomson Licensing S.A. Apparatus for providing tuner parameters in a television receiver

Also Published As

Publication number Publication date
KR100922450B1 (ko) 2009-10-21
EP1457044B1 (en) 2006-06-14
MY136089A (en) 2008-08-29
MXPA04006069A (es) 2004-09-27
US6876400B2 (en) 2005-04-05
AU2002357814A1 (en) 2003-07-09
EP1457044A1 (en) 2004-09-15
KR20040068251A (ko) 2004-07-30
JP2005514815A (ja) 2005-05-19
WO2003055204A1 (en) 2003-07-03
CN100376108C (zh) 2008-03-19
ES2265518T3 (es) 2007-02-16
DE60212447T2 (de) 2007-06-21
US20030112376A1 (en) 2003-06-19
CN1606866A (zh) 2005-04-13
DE60212447D1 (de) 2006-07-27

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