JP4266190B2 - Active matrix device and manufacturing method thereof - Google Patents

Description

  The present invention relates to an active matrix device and a manufacturing method thereof.

  An active matrix display device in which an active element is disposed in each pixel can realize a high-quality flat display. Typical active matrix display devices include liquid crystal display devices, organic EL display devices, electrophoretic display devices, and the like. In such an active matrix display device, high-quality display can be performed, but there is a problem that defects such as active elements and pixel electrodes occur and point defects are likely to occur.

  In order to repair such a point defect, Patent Document 1 proposes to arrange a repair element in each pixel and replace the defective element with a repair element when a defect occurs. However, since a region for arranging the repair element is necessary, there is a problem that the aperture ratio is significantly lowered and the display quality is deteriorated.

Patent Document 2 proposes that a pixel circuit included in a defective pixel is removed by etching and replaced with a repair circuit. However, since the entire pixel circuit included in the defective pixel is removed by etching, the process for removing the pixel circuit is troublesome and there is a problem that the manufacturing efficiency is lowered.
JP-A-6-3694 JP-A-9-146116

  As described above, conventionally, there have been a problem that the aperture ratio is greatly lowered and display quality is deteriorated, and a problem that manufacturing efficiency is lowered.

  The present invention has been made to solve the above-described conventional problems, and an object of the present invention is to provide an active matrix device capable of preventing display quality deterioration and manufacturing efficiency deterioration, and a manufacturing method thereof.

  An active matrix device according to one aspect of the present invention is an active matrix device in which a plurality of pixel portions are arranged in a matrix, wherein at least one pixel portion includes a first circuit portion having a defective portion, and the first circuit portion. A second circuit unit that is stacked on the first circuit unit and replaces at least the defective portion of the first circuit unit; and an adhesive provided between the first circuit unit and the second circuit unit And a layer.

  An active matrix device manufacturing method according to an aspect of the present invention is an active matrix device manufacturing method in which a plurality of pixel units are arranged in a matrix, and a plurality of first circuit units corresponding to the plurality of pixel units. A step of extracting a first circuit portion having a defective portion from among the steps, a step of electrically separating the defective portion of the first circuit portion, and an adhesive layer on the first circuit portion having the defective portion A step of laminating the second circuit part via the first circuit part, and laminating the second circuit part on the first circuit part, and then removing the electrically isolated defective portion of the first circuit part. Forming a wiring for replacing the second circuit portion.

  According to the present invention, since the second circuit portion is stacked on the first circuit portion, the defective pixel can be repaired without significantly reducing the aperture ratio and manufacturing efficiency of the defective pixel.

  Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1)
The present embodiment relates to an active matrix device (active matrix substrate) used for a liquid crystal display device. Hereinafter, a method for manufacturing an active matrix device according to the present embodiment will be described with reference to the drawings.

  First, a method for manufacturing an array substrate of an active matrix device will be described with reference to FIGS. 1 is a plan view, FIG. 2 is a cross-sectional view, and FIG. 2 substantially corresponds to a cross-section along A-A ′ of FIG. 1.

  First, as shown in FIGS. 1 and 2, a thin film transistor 102 and an auxiliary capacitor (storage capacitor) 103 are formed on a glass substrate 101. Basically, a manufacturing method similar to the conventional manufacturing method can be used. Specifically, it is as follows.

  First, the undercoat layer 104 is formed on the glass substrate 101, and an amorphous silicon layer (thickness of about 50 to 100 nm) is formed on the undercoat layer 104 by a CVD method. Subsequently, an amorphous silicon layer is melted and crystallized by irradiating an excimer laser or the like to form a polycrystalline silicon layer 105. After patterning the polycrystalline silicon layer 105, a gate insulating film 106 (having a thickness of about 50 to 150 nm) is formed.

  Next, a metal film such as MoW is formed to a thickness of about 200 to 500 nm, and this metal film is patterned to form the gate electrode 107, the electrode 108 of the auxiliary capacitor 103, the gate line (scan line) 201, the auxiliary capacitor line 202, and the like. Form. Subsequently, impurities such as phosphorus and boron are doped by a method such as ion doping using the gate electrode 107 as a mask, thereby forming source / drain regions of the thin film transistor. Note that an LDD region with a low impurity concentration may be formed between the channel region and the source region and between the channel region and the drain region.

  Next, a silicon oxide film having a thickness of about 100 to 500 nm is formed as an interlayer insulating film 109 on the entire surface, and a through hole is formed in the interlayer insulating film 109. Subsequently, a Mo / Al / Mo structure metal film (thickness of about 200 to 600 nm) is formed on the entire surface by sputtering or the like. The metal film is patterned to form a source / drain electrode 110 of the thin film transistor, an electrode 111 of the auxiliary capacitor 103, a signal line 203, and the like. In addition to the interlayer insulating film 109 between the auxiliary capacitance electrode 111 and the auxiliary capacitance electrode 108, the gate insulating film 106 between the polycrystalline silicon layer 105 and the auxiliary capacitance electrode 108 is used for the dielectric portion of the auxiliary capacitance 103. It is done.

  As described above, after the pixel circuit portion (first circuit portion) as shown in FIGS. 1 and 2 is manufactured, the quality of each pixel is determined. Specifically, a potential is applied to the signal line 203 and a predetermined pulse is applied to the gate line 201 to accumulate charges in the auxiliary capacitor 103. After the thin film transistor 102 is turned off for a certain period, the thin film transistor 102 is turned on, and the charge is read from the auxiliary capacitor 103 through the signal line 203. By determining whether or not an appropriate charge is held in the auxiliary capacitor 103 in this way, it is possible to grasp a transistor failure, an auxiliary capacitor leak, and the like. Thereby, it is possible to detect a defect such as a point defect in a stage before forming a pixel electrode or the like, and to determine whether each pixel is good or bad. In addition, by irradiating the auxiliary capacitor 103 with an electron beam and detecting secondary electrons, the charge amount accumulated in the auxiliary capacitor may be grasped and the quality of each pixel may be determined.

  A point defect occurs due to a defect in a transistor, a defect in an auxiliary capacitor, a pattern disorder such as wiring. In the case of pattern disturbance, the defective portion is removed with a laser. In the case of a defective auxiliary capacitor or transistor, the defective portion is electrically isolated. For example, the wiring may be cut with a YAG laser or the like. In the present embodiment, as shown in FIG. 1, the polycrystalline silicon layer 105 is cut at a location 204 a between the signal line 203 and the thin film transistor 102 and a location 204 b between the thin film transistor 102 and the auxiliary capacitor 103. That is, the source of the thin film transistor 102 is separated from the signal line 102, and the drain of the thin film transistor 102 is separated from the electrode of the auxiliary capacitor 103. As a result, the thin film transistor 102 and the auxiliary capacitor 103 are electrically disconnected from other portions.

  In the pixel where the defect is detected, an adhesive layer 126 is formed at a predetermined position as shown in FIG. The adhesive layer 126 is used for bonding the array substrate described above and a repair substrate described later. In this example, the adhesive layer 126 having a thickness of about 200 nm to 2 μm is formed using a transparent photosensitive acrylic resin. The adhesive layer 126 can be formed by a method such as screen printing, ink jet printing, thermal transfer, processing by photolithography, or exposure development using a photosensitive resin. The adhesive layer 126 may be made of an acrylic resin, a polyimide resin, an epoxy resin, an allyl resin, or the like that exhibits an adhesive force by photocuring, thermosetting, thermoplastic, or two-component mixed type.

  Next, a method for manufacturing a repair substrate will be described with reference to the plan view shown in FIG. 4 and the cross-sectional views shown in FIGS.

First, as illustrated in FIGS. 4 and 5, a separation layer 116 for separating the repair circuit and the substrate 115 is formed on the substrate 115. As the substrate 115, a glass substrate, a plastic substrate, a metal substrate, or the like can be used. Here, a glass substrate is used as the substrate 115, and a metal oxide film or a nitride film such as hydrofluoric acid resistant TaO _x is used for the separation layer 116. Subsequently, an undercoat layer 117 is formed with a thickness of about 100 to 1000 nm. For the undercoat layer 117, a SiO _x film, a SiN _x film, or a laminated film thereof can be used.

  Next, on the undercoat layer 117, a repair thin film transistor 118, an auxiliary capacitor (storage capacitor) 119, and the like are formed. Specifically, in the same manner as the array substrate described above, the polycrystalline silicon layer 120, the gate insulating film 121, the gate electrode 122, the interlayer insulating film 123, and the electrodes (source / drain electrodes, auxiliary capacitance electrodes) 124 are provided. Form etc. In addition, the auxiliary wiring 205 (see FIG. 4) is formed simultaneously with the electrode 124.

  The thickness of each layer of the repair substrate may be equal to the thickness of the corresponding layer of the array substrate, but can be made thinner. For example, since the electrodes and wirings are not extended to other pixel regions, there is no problem even if the resistance is somewhat high, and about 2/3 to 1/5 of the thickness of the corresponding electrodes or wirings of the array substrate. Can be. Further, by reducing the thickness of the interlayer insulating film 123 from about 2/3 to 1/5, it is possible to secure a necessary capacitance value even if the area occupied by the auxiliary capacitor 119 is reduced, and increase the layout margin. be able to. Although the film thickness of the gate insulating film 121 may be changed, it is preferable that the gate insulating film 121 has a film thickness equivalent to the gate insulating film of the array substrate from the viewpoint of reliability and breakdown voltage. Also, the thickness of the polycrystalline silicon layer 120 serving as a channel may be changed, but in this example, the thickness is equal to that of the polycrystalline silicon layer of the array substrate.

  After the thin film transistor 118 and the storage capacitor 119 are formed, the protective layer 125 is formed to a thickness of about 1 to 10 μm using a resist or the like. Further, the interlayer insulating film 121, the undercoat layer 117, and the like are processed into an island shape.

  Next, as shown in FIG. 6, a temporary attachment layer 128 is formed on the support substrate 127. As the support substrate 127, a glass substrate, a ceramic substrate, a plastic substrate, or the like can be used. Subsequently, the protective layer 125 and the support substrate 127 are temporarily attached by the temporary attachment layer 128. Subsequently, by removing the substrate 115 by etching using the separation layer 116 as a stopper, a repair substrate in which a repair circuit portion (second circuit portion) is formed on the support substrate 127 as shown in FIG. 6 is obtained. It is done. Note that instead of etching the substrate 115, the substrate 115 may be removed by mechanical polishing or the like. Alternatively, the substrate 115 may be peeled off using a film (for example, an amorphous silicon film) that is ablated by light irradiation such as laser and peels off as the separation layer 116.

  In the repair circuit portion, as shown in FIG. 4, a thin film transistor 118 and an auxiliary capacitor 119 are formed, a connection portion 208 connected to the source of the thin film transistor 118, a connection portion 207 connected to the gate electrode, and an auxiliary capacitance. A connection portion 206 connected to one of the electrodes 119, a connection portion connected to a pixel electrode described later, and the like are included. By performing predetermined connections with these connection portions, the entire pixel circuit portion provided on the array substrate can be replaced with a repair circuit portion. An auxiliary wiring 205 is provided in the repair circuit unit. The auxiliary wiring 205 is used when a short circuit (cross short) occurs at the intersection of the signal line 203 and the auxiliary capacitance line 202 on the array substrate. By cutting the signal line 203 at both ends of the intersection and connecting the cut portions with the auxiliary wiring 205, the cross short defect can be repaired.

  Next, as shown in FIG. 7, the repair substrate and the array substrate are bonded and fixed through an adhesive layer 126.

  Subsequently, as shown in FIG. 8, the support substrate 127 on which the temporary attachment layer 128 is formed is separated. The temporary attachment layer 128 may be formed using an adhesive material whose adhesive strength is reduced by heating, UV light irradiation, or the like. Further, the protective layer 125 is removed with a solvent or oxygen plasma. Details thereof are described in Japanese Patent Application Laid-Open Nos. 2001-7340 and 2003-289136.

  FIG. 9 shows a plan view generally corresponding to the cross-sectional view of FIG. In FIG. 8, for convenience, the array substrate generally corresponds to the A-A ′ cross section of FIG. 9, and the repair substrate corresponds to the B-B ′ cross section of FIG. 9.

  As shown in FIGS. 8 and 9, when the repair substrate and the array substrate are overlaid, the auxiliary capacitor portion 119 formed on the repair substrate and the auxiliary capacitor portion 103 formed on the array substrate are substantially the same. To be placed in position. As can be seen from the figure, the auxiliary capacitor portion occupies a larger area than a thin film transistor or the like. Therefore, by arranging the auxiliary capacitor portion of the repair substrate and the array substrate as described above, a decrease in the aperture ratio can be suppressed, and the pixel provided with the repair circuit and other normal pixels (the repair circuit is not provided). It is possible to prevent a difference in display quality from the pixel). Note that, in a region having a small area such as a point defect, even if the luminance changes by about several percent to 10% with respect to the surrounding region, the luminance change is hardly visually recognized. Therefore, for an element having a small occupied area such as a thin film transistor, even if the repair substrate and the array substrate are arranged at different positions, no major problem in display quality occurs.

  Next, electrical switching between the pixel circuit unit formed on the array substrate and the repair circuit unit formed on the repair substrate will be described.

  As shown in FIGS. 8 and 9, in the array substrate, the gate line 201 and the auxiliary capacitance line 202 are formed under the interlayer insulating film 109. Therefore, when forming the source / drain electrodes 110 of the thin film transistor and the signal lines 203 (see FIGS. 1 and 2) (see FIGS. 1 and 2) with the metal film of the Mo / Al / Mo structure, the metal pads 210 (the upper electrode pads 129 and the lower electrode) are simultaneously formed. Pads) and 211 (upper layer pads and lower layer pads) are formed. Then, in the defective pixel, as shown in FIGS. 10 and 11, the portion where the metal auxiliary pad is formed (black circle portion in FIG. 9) is irradiated with a YAG laser or the like, thereby breaking the interlayer insulating film 109 and the metal. The pad is melted and the metal pad is connected to the gate line 201 and the auxiliary capacitance line 202 on the lower layer side. After the laser irradiation of the interlayer connection, a metal film may be formed in the connection hole portion by laser CVD to be reinforced. In addition, without providing the upper metal auxiliary pad, a connection wiring may be locally formed by laser CVD, which will be described later, and then interlayer connection may be performed by laser irradiation.

  Subsequently, in order to connect the pixel circuit of the array substrate and the repair circuit of the repair substrate, a connection wiring 130 (FIG. 11) shown in FIG. Then, the connection wiring 212) is formed. Specifically, as shown in FIG. 11, the signal lines 203, the gate lines 201, and the auxiliary capacitance lines 202 formed on the array substrate are respectively connected to the auxiliary wirings and gate electrodes formed on the repair substrate by the connection wirings 212. And to the auxiliary capacitance electrode. These connection wirings 212 (connection wirings 130 in FIG. 10) are formed along the end portions of the laminated structure as shown in FIG. In the laser CVD, a W film is formed by laser irradiation in a gas atmosphere containing W. However, because of vapor phase growth, a good metal film (W film) can be formed even in a stepped portion. In addition, it is possible to form a good metal film (connection wiring 130) by forming a taper of about 30 to 80 degrees at the end of the laminated structure.

  As described above, the repair process for the defective pixel is completed. For the subsequent steps, it is possible to use a common step for normal pixels and defective pixels. Subsequent steps will be described with reference to FIGS. 12 and 13 (normal pixels) and FIGS. 14 and 15 (defective pixels).

  First, a passivation film 112 made of a silicon nitride film is formed with a thickness of about 100 to 400 nm by a plasma CVD method or the like. After patterning the passivation film 112, a resin insulating layer 113 is formed to a thickness of about 1 to 5 μm. A photosensitive resin is used for the resin insulating layer 113. Specifically, a photosensitive resin is applied, prebaked at about 80 ° C., then exposed to UV light to be exposed, and further developed to form a pattern. Furthermore, post-baking is performed at 200 to 300 ° C. in order to improve stability. Note that a passivation film such as a silicon nitride film may be omitted depending on the application.

  In the defective pixel portion, since the repair circuit portion is laminated, the flatness may be deteriorated as compared with the normal pixel portion. However, by forming the resin insulating layer 113, sufficient flatness can be ensured. Is possible. As a result, it is possible to suppress fluctuations in the cell gap of the liquid crystal display panel. For example, the height of the repair substrate including the adhesive layer may be about 0.5 to 2 μm, and the thickness of the resin insulating layer may be about 3 to 5 μm. Note that the resin insulating layer 113 may be flattened by polishing or the like when the influence of the cell gap change is large or when flatness is required.

  Further, the resin insulating layer 113 may be transparent, but it is desirable to add a dye or a pigment to form a color filter (R, G, B color filter). In this case, the adhesive layer 126 is desirably the same color as the resin insulating layer 113. That is, in the pixel forming the red (R) resin insulating layer 113, the red adhesive layer 126 is formed, and in the pixel forming the green (G) resin insulating layer 113, the green adhesive layer 126 is formed. In a pixel where the blue (B) resin insulating layer 113 is formed, a blue adhesive layer 126 is formed. Thus, by making the resin insulating layer 113 and the adhesive layer 126 the same color, the optical density of each pixel can be optimized, and color display with excellent display quality can be performed.

  After forming the resin insulating layer 113, a transparent electrode film made of ITO or the like is formed by sputtering to a thickness of about 50 to 200 nm, and the transparent electrode film is further patterned to form the pixel electrode 114. The pixel electrode 114 is preferably formed so as to overlap with the signal line 203 and the storage capacitor line 202. By forming in this way, the adjacent pixel electrodes 114 are shielded from light, and a black matrix can be formed.

  As described above, as shown in FIG. 28, an active matrix substrate (active matrix device) in which a plurality of pixel portions including the normal pixel portion 10 and the defective pixel portion 20 are arranged in a matrix is formed. After that, an active matrix type color liquid crystal display device is obtained through steps such as alignment film formation, rubbing, bonding of the active matrix substrate and the counter substrate, and injection of liquid crystal into the gap between the active matrix substrate and the counter substrate. Is completed.

  As a result of evaluating the display characteristics of the color liquid crystal display device thus obtained, there was no flickering even in the pixels on which the repair circuit was formed, and a few percent variation in luminance and color tone was observed. Then, it was confirmed that the operation was the same as that of a normal pixel. In addition, since a correct optical response is obtained with respect to the image signal, a problem that a defect is visible in the display image does not occur. The present invention can be applied to a high-definition display of 200 ppi, and a high aperture ratio and bright defect-free screen can be formed with a high yield.

  As described above, according to the present embodiment, the repair circuit portion that replaces the defective portion of the pixel circuit portion is stacked on the pixel circuit portion formed on the array substrate, so that the aperture ratio of the defective pixel is greatly reduced. It is possible to repair defective pixels. Further, since the entire pixel circuit portion included in the defective pixel is not removed, the defective pixel can be repaired without significantly reducing the manufacturing efficiency.

  In the present embodiment, the auxiliary capacitance unit formed in the pixel circuit unit and the auxiliary capacitance unit formed in the repair circuit unit are arranged at substantially the same position. Since the storage area of the auxiliary capacitor is larger than that of a thin film transistor, etc., it is possible to suppress a decrease in the aperture ratio and to suppress a decrease in display quality in a defective pixel by arranging both auxiliary capacitors at almost the same position. It becomes.

  Further, in this embodiment, by covering the repair circuit portion or the like with a resin insulating layer used as a color filter, sufficient flatness can be ensured even in the defective pixel portion in which the repair circuit portion is stacked. It is possible to suppress a decrease in display quality at the pixel. Further, by making the adhesive layer the same color as the resin insulating layer, it is possible to optimize the optical density of each pixel and to improve display quality.

(Embodiment 2)
Next, a second embodiment of the present invention will be described with reference to FIGS. Note that the basic configuration is the same as that of the first embodiment, and components corresponding to the components of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  16 and 17 are a plan view and a cross-sectional view showing the configuration of the active matrix device (active matrix substrate) of the present embodiment, respectively. For convenience, in FIG. 17, the array substrate is shown in FIG. For the repair substrate “cross section, the BB ′ cross section of FIG. 16 generally corresponds. FIG. 18 is a plan view showing the configuration of the array substrate, and corresponds to FIG. 1 of the first embodiment. FIG. 19 is a plan view showing the configuration of the repair substrate, and corresponds to FIG. 4 of the first embodiment.

  This embodiment differs from the first embodiment in the way of connection between the pixel circuit portion formed on the array substrate and the repair circuit portion formed on the repair substrate.

  The basic process until the array substrate and the repair substrate are stacked is the same as in the first embodiment. In this embodiment, after laminating the array substrate and the repair substrate, by irradiating the portion where the metal pad is formed with a laser, the insulating layer such as the adhesive layer, the undercoat layer, and the interlayer insulating film is broken, The metal auxiliary pads 232 and 233 and the metal parts 234 and 235 made of a metal containing Al are melted to form the through wiring 231. In the example shown in the drawing, the auxiliary capacitance line formed on the array substrate and the auxiliary capacitance electrode formed on the repair substrate are connected by the through wiring 231 that penetrates the region including the adhesive layer. Good connection can be made by performing laser irradiation in multiple stages or by optimizing the irradiation energy.

  In this example, the metal auxiliary pads 232 and 233 are used. However, the metal auxiliary pad 233 can be omitted. Further, after the through wiring 231 is formed, a more reliable connection can be performed by forming a metal film such as tungsten at a connection portion by laser CVD.

  In the first embodiment, the connection between the pixel circuit portion formed on the array substrate and the repair circuit portion formed on the repair substrate is performed at the end of the laminated structure, but in this embodiment, Since the through wiring 231 is provided in the laminated structure, the restriction on the arrangement position of the connection portion is eased. Therefore, the degree of freedom in pattern arrangement increases, leading to an improvement in aperture ratio. In addition, the resin constituting the adhesive layer 126 facilitates laser absorption, makes it easier to open through holes by ablation, and improves the success rate of connection.

(Embodiment 3)
Next, a third embodiment of the present invention will be described with reference to FIGS. Note that the basic configuration is the same as that of the first embodiment, and components corresponding to the components of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

In this embodiment, as shown in FIG. 20, before stacking the array substrate and the repair substrate,
A passivation film 141 is formed on the surface of the array substrate, and a passivation film 142 is formed on the surface of the repair substrate. After the passivation films 141 and 142 are formed in advance as described above, the array substrate and the repair substrate are stacked as shown in FIG.

  In this embodiment, since the array substrate and the repair substrate are covered with the passivation films 141 and 142 in advance, it is possible to prevent contamination in the formation process and the repair process of the adhesive layer 126, and reliability is improved. Can be improved.

(Embodiment 4)
Next, a fourth embodiment of the present invention will be described with reference to FIGS. Note that the basic configuration is the same as that of the first embodiment, and components corresponding to the components of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  In the first embodiment, the formation area of the repair circuit portion is rectangular. However, in this embodiment, the formation area of the repair circuit portion is L-shaped. By changing the connection location between the pixel circuit portion formed on the array substrate and the repair circuit portion formed on the repair substrate, the shape of the formation region of the repair circuit portion is changed to an arbitrary shape such as an L shape. It is possible. Thus, the aperture ratio can be improved by changing the shape of the repair circuit portion forming region.

(Embodiment 5)
Next, a fifth embodiment of the present invention will be described with reference to FIG. Note that the basic configuration is the same as that of the first embodiment, and components corresponding to the components of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  In the present embodiment, before the array substrate and the repair substrate are stacked, unnecessary electrodes and wirings formed on the array substrate are removed. Specifically, after the step of FIG. 2 of the first embodiment, the source / drain electrode 110 and the auxiliary capacitance electrode 111 are selectively removed by etching or laser irradiation, and then the array substrate and the repair substrate are removed. By laminating, a configuration as shown in FIG. 26 is obtained.

  Thus, by removing unnecessary electrodes and wirings formed on the array substrate, it is possible to suppress the overall height of the stacked structure of the array substrate and the repair substrate. Therefore, the level difference can be reduced and the flatness when the pixel electrode is formed can be improved.

(Embodiment 6)
Next, a fifth embodiment of the present invention will be described with reference to FIG. Note that the basic configuration is the same as that of the first embodiment, and components corresponding to the components of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  In the first embodiment, the adhesive layer 126 is formed on the array substrate as shown in FIG. 3, but in this embodiment, the adhesive layer 126 is formed on the repair substrate as shown in FIG. is doing. The array substrate and the repair substrate are bonded together by the adhesive layer 126 formed on the repair substrate.

  When the adhesive layer 126 is formed on the array substrate, it is necessary to form the adhesive layer 126 locally only on the defective pixel portion. In this embodiment, the adhesive layer 126 is formed on the repair substrate. Therefore, it is not necessary to form such a local adhesive layer 126. Therefore, it is possible to simplify the manufacturing process.

  In each of the above-described embodiments, the liquid crystal display device has been described as an example. However, in addition to the liquid crystal display device, the active matrix display device such as an organic EL display device or an electrophoretic display device is also described above. It is possible to apply a method similar to the method described above.

  In the above-described embodiment, the entire pixel circuit of the defective pixel is replaced with the repair circuit. However, only the defective portion included in the pixel circuit of the defective pixel may be replaced with the repair circuit. For example, when the active element such as a thin film transistor is defective, only the active element may be replaced, and when the auxiliary capacitor is defective, only the auxiliary capacitor may be replaced.

  Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention. Furthermore, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining the disclosed constituent elements. For example, even if several constituent requirements are deleted from the disclosed constituent requirements, the invention can be extracted as an invention as long as a predetermined effect can be obtained.

It is the top view which showed typically a part of manufacturing process of the active matrix apparatus which concerns on the 1st Embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the active matrix apparatus based on the 1st Embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the active matrix apparatus based on the 1st Embodiment of this invention. It is the top view which showed typically a part of manufacturing process of the active matrix apparatus which concerns on the 1st Embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the active matrix apparatus based on the 1st Embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the active matrix apparatus based on the 1st Embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the active matrix apparatus based on the 1st Embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the active matrix apparatus based on the 1st Embodiment of this invention. It is the top view which showed typically a part of manufacturing process of the active matrix apparatus which concerns on the 1st Embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the active matrix apparatus based on the 1st Embodiment of this invention. It is the top view which showed typically a part of manufacturing process of the active matrix apparatus which concerns on the 1st Embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the active matrix apparatus based on the 1st Embodiment of this invention. It is the top view which showed typically a part of manufacturing process of the active matrix apparatus which concerns on the 1st Embodiment of this invention. It is sectional drawing which showed typically a part of manufacturing process of the active matrix apparatus based on the 1st Embodiment of this invention. It is the top view which showed typically a part of manufacturing process of the active matrix apparatus which concerns on the 1st Embodiment of this invention. It is the top view which showed typically the structural example of the active matrix apparatus which concerns on the 2nd Embodiment of this invention. It is sectional drawing which showed typically the structural example of the active matrix apparatus which concerns on the 2nd Embodiment of this invention. It is the top view which showed typically a part of structure of the active matrix apparatus which concerns on the 2nd Embodiment of this invention. It is the top view which showed typically a part of structure of the active matrix apparatus which concerns on the 2nd Embodiment of this invention. It is sectional drawing which showed typically a part of structure of the active matrix apparatus which concerns on the 3rd Embodiment of this invention. It is sectional drawing which showed typically a part of structure of the active matrix apparatus which concerns on the 3rd Embodiment of this invention. It is sectional drawing which showed typically the structural example of the active matrix apparatus which concerns on the 3rd Embodiment of this invention. It is the top view which showed typically a part of structure of the active matrix apparatus which concerns on the 4th Embodiment of this invention. It is the top view which showed typically a part of structure of the active matrix apparatus which concerns on the 4th Embodiment of this invention. It is the top view which showed typically the structural example of the active matrix apparatus which concerns on the 4th Embodiment of this invention. It is sectional drawing which showed typically the structural example of the active matrix apparatus which concerns on the 5th Embodiment of this invention. It is sectional drawing which showed typically a part of structure of the active matrix apparatus based on the 6th Embodiment of this invention. It is the figure which showed typically the pixel arrangement | positioning of the active matrix apparatus which concerns on embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Normal pixel part 20 ... Defect pixel part 101 ... Glass substrate 102 ... Thin-film transistor 103 ... Auxiliary capacity part 104 ... Undercoat layer 105 ... Polycrystalline silicon layer 106 ... Gate insulating film 107 ... Gate electrode 108 ... Auxiliary capacity electrode 109 ... Interlayer Insulating film 110 ... Source / drain electrode 111 ... Auxiliary capacitance electrode 112 ... Passivation film 113 ... Resin insulating layer 114 ... Pixel electrode 115 ... Substrate 116 ... Separation layer 117 ... Undercoat layer 118 ... Thin film transistor for repair 119 ... For repair 120 ... Polycrystalline silicon layer 121 ... Gate insulating film 122 ... Gate electrode 123 ... Interlayer insulating film 124 ... Electrode 125 ... Protective layer 126 ... Adhesive layer 127 ... Support substrate 128 ... Temporary bonding layer 129 ... Metal pad 130 ... Connection Wiring 141, 142 ... Passive Film 201 ... Gate line 202 ... Auxiliary capacitance line 203 ... Signal line 204a, 204b ... cutting point 205 ... Auxiliary wiring 206, 207, 208 ... Connection portion 210, 211 ... Metal pad 212 ... Connection wiring 231 ... Through wiring 232,233 ... Metal auxiliary pad 234, 235 ... Metal part

Claims (6)

An active matrix device in which a plurality of pixel portions are arranged in a matrix,
At least one pixel portion is
A first circuit portion having a defective portion;
A second circuit unit that is stacked on the first circuit unit and replaces at least the defective portion of the first circuit unit;
An adhesive layer provided between the first circuit portion and the second circuit portion;
Wiring for replacing at least the defective portion of the first circuit portion with the second circuit portion;
Equipped with a,
The first circuit unit includes a first auxiliary capacitor unit,
The second circuit unit includes a second auxiliary capacitor unit that replaces the first auxiliary capacitor unit,
The area of the second auxiliary capacitor unit is smaller than the area of the first auxiliary capacitor unit, and the insulating film of the second auxiliary capacitor unit is thinner than the insulating film of the first auxiliary capacitor unit. A featured active matrix device. An active matrix device in which a plurality of pixel portions are arranged in a matrix,
At least one pixel portion is
A first circuit portion having a defective portion;
A second circuit unit that is stacked on the first circuit unit and replaces at least the defective portion of the first circuit unit;
An adhesive layer provided between the first circuit portion and the second circuit portion;
An insulating layer that covers the first circuit portion and the second circuit portion and is used as a color filter;
A pixel electrode formed on the insulating layer;
Equipped with a,
The active matrix device, wherein the adhesive layer has the same color as the insulating layer . A method of manufacturing an active matrix device in which a plurality of pixel portions are arranged in a matrix,
Extracting a first circuit portion having a defective portion from a plurality of first circuit portions corresponding to a plurality of pixel portions;
Electrically separating the defective portion of the first circuit portion;
Laminating a second circuit portion on the first circuit portion having the defective portion via an adhesive layer;
After laminating the second circuit portion on the first circuit portion, wiring for replacing the electrically isolated defective portion of the first circuit portion with the second circuit portion is formed. Process,
Equipped with a,
The first circuit unit includes a first auxiliary capacitor unit,
The second circuit unit includes a second auxiliary capacitor unit that replaces the first auxiliary capacitor unit,
The area of the second auxiliary capacitor unit is smaller than the area of the first auxiliary capacitor unit, and the insulating film of the second auxiliary capacitor unit is thinner than the insulating film of the first auxiliary capacitor unit. A method for manufacturing an active matrix device. The method of manufacturing an active matrix device according to claim 3 , wherein the wiring is formed along an end portion of the adhesive layer. The method of manufacturing an active matrix device according to claim 3 , wherein the wiring is formed so as to penetrate the adhesive layer. Claim 3, wherein the the first before stacking the second circuit portion on the circuit portion of the, further comprising a step of forming the adhesive layer on the bonding surface side of the second circuit portion A manufacturing method of the active matrix device described in 1.

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