JP4223590B2 - Method for manufacturing polycrystalline semiconductor - Google Patents

Method for manufacturing polycrystalline semiconductor Download PDF

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JP4223590B2
JP4223590B2 JP15588998A JP15588998A JP4223590B2 JP 4223590 B2 JP4223590 B2 JP 4223590B2 JP 15588998 A JP15588998 A JP 15588998A JP 15588998 A JP15588998 A JP 15588998A JP 4223590 B2 JP4223590 B2 JP 4223590B2
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silicon film
oxide film
amorphous silicon
film
polycrystalline silicon
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JPH11354801A (en
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由紀 松浦
毅 大山
真史 後藤
慶人 川久
浩 三橋
尚 藤村
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東芝松下ディスプレイテクノロジー株式会社
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Description

【0001】
【発明の属する技術分野】
本発明は、非晶質シリコンを結晶化して多結晶シリコンを得る多結晶半導体の製造方法に関する。
【0002】
【従来の技術】
近年、高精細な液晶表示素子のスイッチング素子として、低コスト化を実現すると共に移動度が高く且つ液晶表示素子の駆動も含めた高性能化が可能であることから、多結晶シリコンをチャネル層に用いる多結晶シリコン薄膜トランジスタ(以下多結晶シリコンTFTと略称する。)の実用化が進められている。液晶表示素子では無アルカリガラス等の絶縁性の基板上に多結晶シリコンTFTを形成するため、基板ダメージの少ない低温プロセスで多結晶シリコン膜を形成する必要があり、一般には、非晶質シリコン膜にレーザ光を照射して結晶化する事により多結晶シリコンを得るレーザアニール法が採用されている。このレーザアニール法により形成した多結晶シリコン膜をチャネルに用いた多結晶シリコンTFTの電界効果移動度は100cm2 /Vs以上であることが知られている。
【0003】
そしてレーザアニール法として、従来は図5(a)に示す様に、ガラス基板1上にアンダーコート層2を介し低温で非晶質シリコン膜3を形成する。次に図5(b)に示す様にレーザアニール時に膜アブレーションが生じないように500℃で1時間の脱水素処理をおこなう。次に図5(c)に示す様に、非晶質シリコン膜3表面に形成された自然酸化膜4を1%弗酸水(HF)で15秒洗浄除去する。次に図5(d)に示す様にレーザ光を照射して非晶質シリコン膜3を結晶化させ、図5(e)に示す様にガラス基板1上に多結晶シリコン膜6を得ていた。
【0004】
【発明が解決しようとする課題】
しかしながら従来の、非晶質シリコン膜にレーザ光を照射して結晶化させ、多結晶シリコン膜を形成するという上記レーザアニール法では、形成された多結晶シリコン膜表面が平滑で無く、80nm以上の突起を生じてしまっていた。このため従来の突起を生じた多結晶シリコン膜を用いて、ゲート上置きのコプラナ型構造の多結晶シリコンTFTを形成すると、多結晶シリコン表面に生じた突起の高さが大きい場所では、突起部分で多結晶シリコン膜を被覆するゲート絶縁膜のカバレッジが低下し、多結晶シリコンTFTのゲート絶縁耐圧を劣化する原因となっていた。
【0005】
そして従来のレーザアニール法で形成した多結晶シリコン膜をチャネル層とする多結晶シリコンTFTを液晶表示素子の駆動回路部分に適用し、例えばゲート酸化膜厚100nmとしてTFTを作製した場合、30V程度のゲート電圧で多結晶シリコンTFTが破壊してしまい、液晶表示素子の表示上では線欠陥等の画像不良を生じ、液晶表示素子の表示品位を低下し、製造歩留まりを低下するという問題を有していた。
【0006】
このゲート絶縁耐圧を劣化する原因である多結晶シリコン膜表面の突起は、レーザアニールによる非晶質シリコンの結晶化プロセスが数百n秒程度の瞬時溶融結晶化であるため、結晶成長時に結晶粒界がぶつかりあう部分に生じてしまうものである。そして多結晶シリコン表面の突起をXPS(X−ray photoelectron spectroscopy)により分析した所、突起のない部分に比べて酸素元素が多いという結果が得られた。更に非晶質シリコン膜表面の酸化膜厚とレーザアニール後に多結晶シリコン膜表面に生じた突起の高さとの関係を調べた所、図6に示す様に、自然酸化膜4が2〜5nm程度である場合の突起の高さが60〜90nm程度であるのに比し、自然酸化膜4が10nm程度である場合の突起の高さは150nmと高くなっていた。
【0007】
上述の実験結果から、従来のレーザアニール法では、非晶質シリコン膜表面の酸化膜及び表面吸着不純物の洗浄除去が完全で無く、レーザ光照射前の非晶質シリコン膜表面に自然酸化膜や、炭素(C)、ボロン(B)等の不純物がわずかでも存在していると、これ等が、結晶化した多結晶シリコン膜表面に高さ80nm以上の突起を生じさせる要因と成っている事が判明した。
【0008】
又、従来のレーザアニール法での図5(d)に示すレーザ光照射前の非晶質シリコン膜表面の自然酸化膜や不純物の除去状態を調べるため、図7に示す様に非晶質シリコン膜3表面に純水(水滴)7を滴下し、接触角測定器にて非晶質シリコン膜3表面と純水7との接触角θを測定した所、35゜〜40゜の接触角を成しているという結果をえられた。
【0009】
他方、レーザ光照射前の非晶質シリコン膜表面の酸化膜や不純物の除去状態と、非晶質シリコン膜表面に滴下された純水との接触角との関係を調べたところ、接触角測定器にて測定された非晶質シリコン膜表面と純水との接触角θが60゜以上であれば、酸化膜や不純物の除去状態が完全であるという事が判明した。
【0010】
上記の事から、非晶質シリコン膜3表面と純水7との接触角が35°〜40°である、前述の従来のレーザアニール法による非晶質シリコン膜3表面は、弗酸水(HF)による洗浄が十分でなく、非晶質シリコン膜表面の自然酸化膜のエッチングが不十分であり、又表面に吸着している炭素(C)、ボロン(B)等の大気中の不純物の洗浄も不十分であり、この事が要因となり多結晶シリコン膜表面に80nm以上の突起を生、ひいては多結晶シリコンTFTのゲート絶縁耐圧を劣化させてしまう事が解明された。
【0011】
本発明は上記課題を除去するもので、レーザアニールによる多結晶シリコン膜の結晶化時に多結晶シリコン膜表面に突起が発生するのを防止し、多結晶シリコンTFTのゲート絶縁耐圧の劣化を防止することにより製造歩留まりの向上を図ると共に、線欠陥等を生じる事無く、良好な表示品位を有する液晶表示素子を得ることが可能な高品質の多結晶半導体の製造方法を提供することを目的とする。
【0012】
【課題を解決するための手段】
本発明は上記課題を解決するための手段として、基板上に堆積される非晶質シリコンにレーザ光を照射して結晶化する多結晶半導体の製造方法において、前記基板上に非晶質シリコン膜を形成する工程と、前記非晶質シリコン膜表面を酸化して酸化膜を形成する工程と、前記酸化膜除去後の表面に純水を滴下した時の前記表面に対する前記純水の接触角が60度以上に成るよう前記酸化膜を除去する工程と、前記酸化膜除去後の前記非晶質シリコン膜に前記レーザ光を照射して前記非晶質シリコン膜を結晶化する工程とを実施するものである。
【0014】
そして本発明は上記構成により、非晶質シリコン膜表面の酸化膜および吸着不純物を十分除去する事により、これら酸化膜および吸着不純物に起因して発生する多結晶シリコン膜表面の突起の発生を防止し、高品質の多結晶シリコンTFTの実用化を図り、液晶表示素子の表示品位を向上し、更には製造歩留まりを向上するものである。
【0015】
【発明の実施の形態】
以下本発明を図1乃至図4に示す実施の形態を参照して説明する。図1は、ガラス基板10上に酸化シリコン(SiO2 )膜から成るアンダーコート層11を介して形成される多結晶シリコン膜12を示す概略断面図である。
【0016】
次に多結晶シリコン膜12製造方法について述べる。図2(a)に示す様にガラス基板10上にアンダーコート層11を形成し、更に非晶質シリコン膜14を40〜80nmの厚さで堆積する。アンダーコート層11及び非晶質シリコン膜14のいずれも、プラズマCVD法を用いて成膜温度300℃以下で形成する。次に図2(b)に示す様に非晶質シリコン膜14中の水素(H)を脱離するために、450℃、30〜60分の熱アニールを行う。この時非晶質シリコン膜14表面には自然酸化膜15が形成される。
【0017】
次に図2(c)に示す様に濃度20ppmのオゾン(O3 )を含む溶液にて、非晶質シリコン膜14を23秒間洗浄して、非晶質シリコン膜14の表面を0.5nm〜1.5nm厚さの範囲で酸化して酸化膜16を形成する。尚このオゾン(O3 )を含む溶液による酸化により、炭素(C)、ボロン(B)等の不純物は酸化膜16中に取り込まれる。
【0018】
次に図2(d)に示す様に酸化膜16及びこの酸化膜16に取り込まれた炭素(C)、ボロン(B)等の不純物を、濃度1%の弗酸水(HF)で洗浄除去する。弗酸水(HF)による洗浄除去は、図3に示す様に、接触角測定器(図示せず)による非晶質シリコン膜14表面と純水17との接触角θが、60゜以上に成るまで行うものとする。弗酸水(HF)による洗浄時間と接触角測定器で測定した純水の非晶質シリコン膜表面での接触角との関係を示す図4から、純水の非晶質シリコン膜表面での接触角θを60゜以上とするには、弗酸水(HF)による洗浄時間は、120秒以上を必要とされる。
【0019】
次に図2(e)に示す様に、純水の接触角θが60゜以上である状態の非晶質シリコン膜14を、XeClレーザ装置によるレーザ光によりレーザアニールして結晶化し、図2(f)に示す様に、ガラス基板10上にアンダーコート層11を介し多結晶シリコン膜12を形成する。レーザ光による照射エネルギーは270〜340mJ/cm2 とした。この結果、平均結晶粒径範囲0.3〜0.8μmの多結晶シリコン膜12をえられた。尚多結晶シリコン膜12表面を調べた所、表面突起の高さは、50nm以下に抑えられていた。
【0020】
この様にして成る多結晶シリコン膜12をチャネル層に用いて、ゲート酸化膜厚100nmの、ゲート上置きのコプラナ型構造の多結晶シリコンTFTを形成した所、ゲート絶縁耐圧が50V以上になることが確認された。尚、上記図2(d)に示す酸化膜16の洗浄除去時、洗浄時間を120秒以下で処理した後にレーザアニールして成る多結晶シリコン膜をチャネル層に用いて、ゲート上置きのコプラナ型構造の多結晶シリコンTFTを形成し、このゲート絶縁耐圧を調べた所、一部のTFTは、ゲート電圧50V未満で破壊し、ゲート絶縁耐圧の劣化が見られた。
【0021】
この様に構成すれば、非晶質シリコン膜14のレーザアニール前処理として、純水の接触角θが60゜以上であり、酸化膜16及び炭素(C)、ボロン(B)等の不純物を完全に除去した状態に成るように、非晶質シリコン膜14表面の酸化膜及び不純物を洗浄除去することにより、レーザアニールにより結晶化して得られた多結晶シリコン膜表面での突起の高さを50nm以下に抑える事が出来る。従ってこのような多結晶シリコン膜をチャネル層に用いる事により、ゲート絶縁耐圧の高い、良好な多結晶シリコンTFTひいては、絶縁破壊による線欠陥を生じる事無く高い表示品位を有する液晶表示素子を得られ、製造時の歩留まりも向上される。
【0022】
又、本実施の形態にあっては、酸化膜除去の前にオゾン(O3 )を含む溶液により非晶質シリコン膜14表面に酸化膜16を形成し、この酸化膜16中に炭素(C)、ボロン(B)等の不純物を取り込み、1%弗酸水(HF)による酸化膜16の洗浄除去により、炭素(C)、ボロン(B)等の不純物を酸化膜16ごと除去でき、非晶質シリコン膜14表面の不純物を完全に除去可能と成る。
【0023】
尚本発明は上記実施の形態に限られるものでなく、その趣旨を変えない範囲での変更は可能であって、例えば非晶質シリコン膜の膜厚或いはその表面の酸化膜の膜厚等限定されないが、酸化膜厚を0.5nm以下とすると、1元素分より薄くなり不純物の十分な除去を行えず、又、酸化膜厚を1.5nm以上にすると、1%弗酸水(HF)による酸化膜の洗浄除去操作に時間が掛かり過ぎる事から、酸化膜は、0.5nm〜1.5nmとする事が望ましい。また、レーザ光の照射エネルギーの大きさ等も任意である。
【0024】
【発明の効果】
以上説明したように本発明によれば、レーザアニールする前の非晶質シリコン表面の酸化膜及び不純物を完全に洗浄除去する事により、レーザ光照射により結晶化された多結晶シリコン表面に生じる突起の高さを低く抑えられる。従ってこのようにして形成された多結晶シリコンを用いて形成される、多結晶シリコンTFTのゲート絶縁耐圧の劣化を抑制出来、ひいては表示品位の高い液晶表示素子の製造可能となり、又製造歩留まりの低下を防止出来る。
【図面の簡単な説明】
【図1】本発明の実施の形態におけるガラス基板上に形成される多結晶シリコン膜を示す概略断面図である。
【図2】本発明の実施の形態における多結晶シリコンの製造工程を示し(a)はその非晶質シリコン膜形成時、(b)はその非晶質シリコン膜表面の水素(H)脱離時、(c)はその非晶質シリコン膜表面の酸化膜形成時、(d)はその酸化膜の洗浄除去時、(e)はそのレーザ光照射時、(f)はその多結晶シリコン膜の結晶化時を示す概略説明図である。
【図3】本発明の実施の形態の非晶質シリコン膜表面と、純水との接触角を示す概略説明図である。
【図4】本発明の実施の形態における弗酸水(HF)による洗浄時間と純水の接触角との関係を示すグラフである。
【図5】従来の多結晶シリコンの製造工程を示し(a)はその非晶質シリコン膜形成時、(b)はその非晶質シリコン膜表面の水素(H)脱離時、(c)はその酸化膜の洗浄除去時、(d)はそのレーザ光照射時、(e)はその多結晶シリコン膜の結晶化時を示す概略説明図である。
【図6】従来の多結晶シリコンの、非晶質シリコン膜表面の酸化膜厚とレーザアニール後に多結晶シリコン表面に生じた突起の高さとの関係を示すグラフである。
【図7】従来の非晶質シリコン膜表面と、純水との接触角を示す概略説明図である。
【符号の説明】
10…ガラス基板
11…アンダーコート層
12…多結晶シリコン膜
14…非晶質シリコン膜
16…酸化膜
17…純水
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a polycrystalline semiconductor that crystallizes amorphous silicon to obtain polycrystalline silicon.
[0002]
[Prior art]
In recent years, as a switching element for high-definition liquid crystal display elements, it has been possible to reduce costs, increase mobility, and improve performance including driving of liquid crystal display elements. A polycrystalline silicon thin film transistor to be used (hereinafter abbreviated as a polycrystalline silicon TFT) has been put into practical use. In a liquid crystal display element, since a polycrystalline silicon TFT is formed on an insulating substrate such as alkali-free glass, it is necessary to form a polycrystalline silicon film by a low temperature process with little substrate damage. A laser annealing method is adopted in which polycrystalline silicon is obtained by crystallization by irradiating with laser light. It is known that the field effect mobility of a polycrystalline silicon TFT using a polycrystalline silicon film formed by this laser annealing method as a channel is 100 cm 2 / Vs or more.
[0003]
As a laser annealing method, an amorphous silicon film 3 is conventionally formed on a glass substrate 1 at a low temperature via an undercoat layer 2 as shown in FIG. Next, as shown in FIG. 5B, dehydrogenation treatment is performed at 500 ° C. for 1 hour so that film ablation does not occur during laser annealing. Next, as shown in FIG. 5C, the natural oxide film 4 formed on the surface of the amorphous silicon film 3 is removed by washing with 1% hydrofluoric acid (HF) for 15 seconds. Next, as shown in FIG. 5 (d), the amorphous silicon film 3 is crystallized by irradiating laser light, and a polycrystalline silicon film 6 is obtained on the glass substrate 1 as shown in FIG. 5 (e). It was.
[0004]
[Problems to be solved by the invention]
However, in the conventional laser annealing method in which an amorphous silicon film is crystallized by irradiating laser light to form a polycrystalline silicon film, the surface of the formed polycrystalline silicon film is not smooth and has a thickness of 80 nm or more. Protrusions had occurred. For this reason, when a polycrystalline silicon TFT having a coplanar structure on the gate is formed using a conventional polycrystalline silicon film having protrusions, a protrusion portion is formed at a position where the protrusions generated on the surface of the polycrystalline silicon are large. As a result, the coverage of the gate insulating film covering the polycrystalline silicon film is lowered, which causes the gate dielectric breakdown voltage of the polycrystalline silicon TFT to deteriorate.
[0005]
When a polycrystalline silicon TFT having a polycrystalline silicon film formed by a conventional laser annealing method as a channel layer is applied to a driving circuit portion of a liquid crystal display element, for example, when a TFT is manufactured with a gate oxide film thickness of 100 nm, about 30V is obtained. at a gate voltage corrupting polycrystalline silicon TFT, is on the display of the liquid crystal display device caused the image defects such as line defect, to reduce the display quality of the liquid crystal display device has a problem of lowering the production yield It was.
[0006]
The protrusion on the surface of the polycrystalline silicon film, which is the cause of the deterioration of the gate dielectric breakdown voltage, is a crystal grain at the time of crystal growth because the crystallization process of amorphous silicon by laser annealing is instantaneous melt crystallization of about several hundred nsec. It occurs in the part where the world collides. Then, when the projections on the surface of the polycrystalline silicon were analyzed by XPS (X-ray photoelectron spectroscopy), the result was that there were more oxygen elements than the portions without projections. Further, when the relationship between the oxide film thickness on the surface of the amorphous silicon film and the height of the protrusion generated on the surface of the polycrystalline silicon film after laser annealing was examined, as shown in FIG. 6, the natural oxide film 4 has a thickness of about 2 to 5 nm. When the natural oxide film 4 is about 10 nm, the height of the protrusion is as high as 150 nm.
[0007]
From the above experimental results, the conventional laser annealing method does not completely clean and remove the oxide film and surface adsorbed impurities on the surface of the amorphous silicon film. If impurities such as carbon (C) and boron (B) are present even in a slight amount, these are factors that cause protrusions with a height of 80 nm or more on the surface of the crystallized polycrystalline silicon film. There was found.
[0008]
Further, in order to investigate the removal state of the natural oxide film and impurities on the surface of the amorphous silicon film before the laser beam irradiation shown in FIG. 5D by the conventional laser annealing method, as shown in FIG. When pure water (water droplets) 7 is dropped on the surface of the film 3 and the contact angle θ between the amorphous silicon film 3 surface and the pure water 7 is measured with a contact angle measuring device, a contact angle of 35 ° to 40 ° is obtained. I was able to get results.
[0009]
On the other hand, when the relationship between the removal state of oxide film and impurities on the amorphous silicon film surface before laser irradiation and the contact angle with pure water dropped on the amorphous silicon film surface was investigated, contact angle measurement was performed. It was found that when the contact angle θ between the amorphous silicon film surface measured with a vessel and pure water was 60 ° or more, the oxide film and impurities were completely removed.
[0010]
From the above, the surface of the amorphous silicon film 3 formed by the conventional laser annealing method in which the contact angle between the surface of the amorphous silicon film 3 and the pure water 7 is 35 ° to 40 ° is hydrofluoric acid ( HF) is not sufficiently cleaned, the natural oxide film on the surface of the amorphous silicon film is not sufficiently etched, and impurities in the atmosphere such as carbon (C) and boron (B) adsorbed on the surface washing is also insufficient, raw Ji a more projections 80nm polycrystalline silicon film surface becomes this is a factor, it was elucidated that deteriorates the gate dielectric breakdown voltage and thus the polycrystalline silicon TFT.
[0011]
The present invention eliminates the above-described problems, and prevents projections from being generated on the surface of the polycrystalline silicon film when the polycrystalline silicon film is crystallized by laser annealing, thereby preventing deterioration of the gate dielectric breakdown voltage of the polycrystalline silicon TFT. An object of the present invention is to provide a manufacturing method of a high-quality polycrystalline semiconductor capable of improving the manufacturing yield and obtaining a liquid crystal display element having a good display quality without causing line defects or the like. .
[0012]
[Means for Solving the Problems]
As a means for solving the above-mentioned problems, the present invention provides a method for producing a polycrystalline semiconductor in which amorphous silicon deposited on a substrate is crystallized by irradiating it with laser light. A step of oxidizing the surface of the amorphous silicon film to form an oxide film, and a contact angle of the pure water to the surface when pure water is dropped on the surface after the oxide film is removed. The step of removing the oxide film so as to be 60 degrees or more and the step of crystallizing the amorphous silicon film by irradiating the amorphous silicon film after the oxide film is removed with the laser beam are performed. Is.
[0014]
In the present invention, the oxide film and the adsorbed impurities on the surface of the amorphous silicon film are sufficiently removed by the above configuration, thereby preventing the generation of protrusions on the surface of the polycrystalline silicon film caused by the oxide film and the adsorbed impurities. Thus, high-quality polycrystalline silicon TFTs are put to practical use, the display quality of the liquid crystal display element is improved, and the manufacturing yield is further improved.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
The present invention will be described below with reference to the embodiments shown in FIGS. FIG. 1 is a schematic cross-sectional view showing a polycrystalline silicon film 12 formed on a glass substrate 10 via an undercoat layer 11 made of a silicon oxide (SiO 2 ) film.
[0016]
Next, a method for manufacturing the polycrystalline silicon film 12 will be described. As shown in FIG. 2A, an undercoat layer 11 is formed on a glass substrate 10, and an amorphous silicon film 14 is further deposited to a thickness of 40 to 80 nm. Both the undercoat layer 11 and the amorphous silicon film 14 are formed using a plasma CVD method at a film formation temperature of 300 ° C. or lower. Next, as shown in FIG. 2B, thermal annealing is performed at 450 ° C. for 30 to 60 minutes in order to desorb hydrogen (H) in the amorphous silicon film 14. At this time, a natural oxide film 15 is formed on the surface of the amorphous silicon film 14.
[0017]
Next, as shown in FIG. 2C, the amorphous silicon film 14 is washed for 23 seconds with a solution containing ozone (O 3 ) at a concentration of 20 ppm, and the surface of the amorphous silicon film 14 is 0.5 nm. The oxide film 16 is formed by oxidation within a thickness range of ˜1.5 nm. By oxidation with the solution containing ozone (O 3 ), impurities such as carbon (C) and boron (B) are taken into the oxide film 16.
[0018]
Next, as shown in FIG. 2D, the oxide film 16 and impurities such as carbon (C) and boron (B) taken into the oxide film 16 are removed by washing with 1% concentration of hydrofluoric acid (HF). To do. As shown in FIG. 3, the cleaning removal with hydrofluoric acid (HF) is performed so that the contact angle θ between the surface of the amorphous silicon film 14 and the pure water 17 by a contact angle measuring device (not shown) is 60 ° or more. It will be done until it becomes. FIG. 4 showing the relationship between the cleaning time with hydrofluoric acid (HF) and the contact angle on the amorphous silicon film surface of pure water measured with a contact angle measuring device. In order to set the contact angle θ to 60 ° or more, the cleaning time with hydrofluoric acid (HF) is required to be 120 seconds or more.
[0019]
Next, as shown in FIG. 2 (e), the amorphous silicon film 14 in a state where the contact angle θ of pure water is 60 ° or more is crystallized by laser annealing with laser light from a XeCl laser device. As shown in (f), a polycrystalline silicon film 12 is formed on a glass substrate 10 with an undercoat layer 11 interposed. The irradiation energy by the laser beam was 270 to 340 mJ / cm 2 . As a result, a polycrystalline silicon film 12 having an average crystal grain size range of 0.3 to 0.8 μm was obtained. When the surface of the polycrystalline silicon film 12 was examined, the height of the surface protrusion was suppressed to 50 nm or less.
[0020]
When the polycrystalline silicon film 12 thus formed is used as a channel layer to form a polycrystalline silicon TFT having a gate oxide thickness of 100 nm and a coplanar structure on the gate, the gate withstand voltage becomes 50 V or more. Was confirmed. When the oxide film 16 shown in FIG. 2D is removed by cleaning, a polysilicon film formed by laser annealing after processing the cleaning time for 120 seconds or less is used as a channel layer, and a coplanar type placed on the gate. When a polycrystalline silicon TFT having a structure was formed and the gate withstand voltage was examined, some of the TFTs were broken at a gate voltage of less than 50 V, and deterioration of the gate withstand voltage was observed.
[0021]
According to this configuration, as a pretreatment for laser annealing of the amorphous silicon film 14, the contact angle θ of pure water is 60 ° or more, and impurities such as the oxide film 16 and carbon (C) and boron (B) are removed. By cleaning and removing the oxide film and impurities on the surface of the amorphous silicon film 14 so as to be completely removed, the height of the protrusions on the surface of the polycrystalline silicon film obtained by crystallization by laser annealing can be increased. It can be suppressed to 50 nm or less. Therefore, by using such a polycrystalline silicon film for the channel layer, a good polycrystalline silicon TFT having a high gate dielectric breakdown voltage, and thus a liquid crystal display element having a high display quality without causing line defects due to dielectric breakdown can be obtained. Also, the production yield is improved.
[0022]
In this embodiment, an oxide film 16 is formed on the surface of the amorphous silicon film 14 with a solution containing ozone (O 3 ) before removing the oxide film, and carbon (C ), Impurities such as boron (B) are taken in, and the oxide film 16 is removed by washing with 1% hydrofluoric acid (HF) to remove impurities such as carbon (C) and boron (B) together with the non-oxide film 16. Impurities on the surface of the crystalline silicon film 14 can be completely removed.
[0023]
The present invention is not limited to the above embodiment, and can be changed without changing the gist thereof. For example, the thickness of the amorphous silicon film or the thickness of the oxide film on the surface thereof is limited. However, if the oxide film thickness is 0.5 nm or less, it becomes thinner than one element and the impurities cannot be sufficiently removed, and if the oxide film thickness is 1.5 nm or more, 1% hydrofluoric acid (HF) It is desirable that the oxide film has a thickness of 0.5 nm to 1.5 nm because it takes too much time to clean and remove the oxide film. The magnitude of the laser beam irradiation energy is also arbitrary.
[0024]
【The invention's effect】
As described above, according to the present invention, the oxide film and impurities on the surface of the amorphous silicon before laser annealing are completely cleaned and removed, so that protrusions generated on the surface of the polycrystalline silicon crystallized by laser light irradiation. Can be kept low. Accordingly, it is possible to suppress the deterioration of the gate dielectric breakdown voltage of the polycrystalline silicon TFT formed using the polycrystalline silicon formed in this way, and thus it becomes possible to manufacture a liquid crystal display element having a high display quality, and to reduce the manufacturing yield. Can be prevented.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view showing a polycrystalline silicon film formed on a glass substrate in an embodiment of the present invention.
FIGS. 2A and 2B show a manufacturing process of polycrystalline silicon according to an embodiment of the present invention, wherein FIG. 2A shows the amorphous silicon film formation, and FIG. 2B shows hydrogen (H) desorption from the amorphous silicon film surface. (C) when forming an oxide film on the surface of the amorphous silicon film, (d) when cleaning and removing the oxide film, (e) when irradiating the laser beam, and (f) when the polycrystalline silicon film It is a schematic explanatory drawing which shows the time of crystallization.
FIG. 3 is a schematic explanatory diagram showing a contact angle between the surface of an amorphous silicon film and pure water according to an embodiment of the present invention.
FIG. 4 is a graph showing the relationship between the cleaning time with hydrofluoric acid (HF) and the contact angle of pure water in an embodiment of the present invention.
FIGS. 5A and 5B show a conventional polycrystalline silicon manufacturing process, wherein FIG. 5A shows the amorphous silicon film formation, FIG. 5B shows the hydrogen (H) desorption from the amorphous silicon film surface, and FIG. (D) is a schematic explanatory view showing the time of laser beam irradiation, and (e) is a schematic explanatory view showing the time of crystallization of the polycrystalline silicon film.
FIG. 6 is a graph showing the relationship between the oxide film thickness on the surface of an amorphous silicon film and the height of protrusions formed on the surface of the polycrystalline silicon after laser annealing in conventional polycrystalline silicon.
FIG. 7 is a schematic explanatory view showing a contact angle between a surface of a conventional amorphous silicon film and pure water.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Glass substrate 11 ... Undercoat layer 12 ... Polycrystalline silicon film 14 ... Amorphous silicon film 16 ... Oxide film 17 ... Pure water

Claims (4)

基板上に堆積される非晶質シリコンにレーザ光を照射して結晶化する多結晶半導体の製造方法において、
前記基板上に非晶質シリコン膜を形成する工程と、前記非晶質シリコン膜表面を酸化して酸化膜を形成する工程と、前記酸化膜除去後の表面に純水を滴下した時の前記表面に対する前記純水の接触角が60度以上に成るよう前記酸化膜を除去する工程と、前記酸化膜除去後の前記非晶質シリコン膜に前記レーザ光を照射して前記非晶質シリコン膜を結晶化する工程とを具備する事を特徴とする多結晶半導体の製造方法。
In a method for producing a polycrystalline semiconductor in which amorphous silicon deposited on a substrate is crystallized by irradiating with laser light,
A step of forming an amorphous silicon film on the substrate; a step of oxidizing the surface of the amorphous silicon film to form an oxide film; and a step of dropping pure water on the surface after removal of the oxide film. Removing the oxide film so that a contact angle of the pure water with respect to the surface is 60 degrees or more; and irradiating the amorphous silicon film after the oxide film is removed with the laser light And a step of crystallizing the semiconductor.
酸化膜を形成する工程は、オゾンを含む溶液を用いてなされることを特徴とする請求項1に記載の多結晶半導体の製造方法。  The method for producing a polycrystalline semiconductor according to claim 1, wherein the step of forming the oxide film is performed using a solution containing ozone. 酸化膜を除去する工程は、弗酸を含むエッチング液にてなされることを特徴とする請求項1又は請求項2のいずれかに記載の多結晶半導体の製造方法。  The method for producing a polycrystalline semiconductor according to claim 1, wherein the step of removing the oxide film is performed with an etching solution containing hydrofluoric acid. 酸化膜の膜厚が0.5nm乃至1.5nmである事を特徴とする請求項1乃至請求項3のいずれかに記載の多結晶半導体の製造方法。  The method for manufacturing a polycrystalline semiconductor according to any one of claims 1 to 3, wherein the oxide film has a thickness of 0.5 nm to 1.5 nm.
JP15588998A 1998-06-04 1998-06-04 Method for manufacturing polycrystalline semiconductor Expired - Fee Related JP4223590B2 (en)

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CN1401142A (en) 2000-02-15 2003-03-05 松下电器产业株式会社 Method of manufacturing thin-film transistor, and liquid crystal display
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JP4045731B2 (en) 2000-09-25 2008-02-13 株式会社日立製作所 Thin film semiconductor device manufacturing method
JP2002176180A (en) 2000-12-06 2002-06-21 Hitachi Ltd Thin film semiconductor element and its manufacturing method
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US7250312B2 (en) * 2003-08-08 2007-07-31 Semiconductor Energy Laboratory Co., Ltd. Doping method and method for fabricating thin film transistor
JP2005093992A (en) * 2003-08-08 2005-04-07 Semiconductor Energy Lab Co Ltd Doping apparatus, doping method and manufacturing method for thin film transistor
KR100615218B1 (en) 2004-04-29 2006-08-25 삼성에스디아이 주식회사 A method for preparing thin film transistor having polycrystalline Si layer, a thin film transistor prepared by the method and a flat pannel display comprising the thin film transistor
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