JP4196320B2 - Mounting circuit resin board with thin film - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
TECHNICAL FIELD The present invention relates to a mounting circuit resin substrate with a thin film, and in particular, a mounting circuit with a thin film characterized by a configuration for preventing sagging of an insulating material in a mounting circuit resin substrate with a thin film using a dry film as an interlayer insulating film. The present invention relates to a resin substrate.
[0002]
[Prior art]
In recent years, a resin substrate with a thin film using a dry film as an interlayer insulating film has been used as a mounting circuit board. In this resin substrate with a thin film, a dry film is thermocompression bonded to the upper surface of a wiring layer. Since an insulating layer is formed, a conventional mounting circuit resin substrate with a thin film will be described with reference to FIG.
[0003]
FIG. 5A is a schematic plan view of a conventional mounting circuit resin substrate 60 with a thin film, and a wiring formation region 64 is provided on the inner side of the substrate.
In addition, no wiring is provided in the outer peripheral portion 61 of the substrate, the through-hole forming area 63 provided in the wiring forming area 64, and the product number display area 62.
[0004]
FIG. 5B is a schematic cross-sectional view taken along the alternate long and short dash line connecting AA ′ in FIG. 5A, and Cu is formed on the resin core material 71 by electroless plating. After the film is deposited, the first Cu wiring layer 72 is formed in the wiring forming region 64 and the Cu film is removed from the outer peripheral portion by etching.
[0005]
Next, the first interlayer insulating film 73 is formed by thermocompression bonding of the dry film, and then a plating seed layer is formed by an electroless Cu plating method, and a Cu plating layer is selected by an electrolytic plating method using a resist plating frame as a mask. Then, after the plating frame is removed, the exposed plating seed layer is removed to form the second Cu wiring layer 74.
[0006]
This process is repeated as many times as necessary to form a multilayer wiring layer structure, and finally the surface is covered with a surface insulating film 79 made of a solder resist, thereby obtaining the basic structure of the mounting circuit resin substrate with a thin film.
In the drawing, the fourth Cu wiring layer 78 to the first Cu wiring layer 72 are shown as a four-layer wiring structure separated by the third interlayer insulating film 77 to the first interlayer insulating film 73, and the illustration is omitted. However, the third interlayer insulating film 77 to the first interlayer insulating film 73 are provided with through vias for electrically connecting the upper and lower wiring layers at necessary places.
[0007]
[Problems to be solved by the invention]
However, the wiring layer of the mounting circuit resin substrate with a thin film has an in-plane distribution, and in the area where the density balance of the wiring layer is poor, for example, in the vicinity of the end of the mounting circuit resin substrate with a thin film, the wiring density is reduced due to the manufacturing process. Since the insulating material sag from the high area to the low area, the film thickness of the insulating material on the upper part of the wiring layer tends to be thin, and if the film thickness is thin, defects such as insulation degradation and delamination are likely to occur. It becomes a problem.
[0008]
This tendency is common to both the interlayer insulating film made of a dry film and the surface insulating layer made of a solder resist, as conceptually shown in FIG.
[0009]
Accordingly, an object of the present invention is to prevent sagging of an insulating material due to the density of a wiring layer.
[0010]
[Means for Solving the Problems]
FIG. 1 is a block diagram showing the principle of the present invention. Means for solving the problems in the present invention will be described with reference to FIG.
In addition, the code | symbol 1 in a figure is a core layer which comprises the base of a mounting circuit board with a thin film.
Refer to FIG. 1. In order to achieve the above object, the present invention forms an actual wiring layer 2 in a mounting circuit resin substrate with a thin film in which an interlayer insulating film 4 provided between a lower wiring layer and an upper wiring layer is formed of a dry film. A wiring pattern forming region, a solid pattern forming region having a pattern density higher than that of the wiring forming region, and a region where the density of the actual wiring layer 2 is relatively coarse. And the anti-sagging pattern 3 provided on the outer peripheral portion of the substrate , and the anti-sagging pattern 3 is not formed on the outer peripheral portion of the substrate adjacent to the solid pattern forming region. And
[0011]
As described above, the interlayer insulating film 4 provided on the actual wiring layer 2 is provided by providing the anti-sagging pattern 3 on the outer peripheral portion of the substrate adjacent to the region where the density of the actual wiring layer 2 is relatively coarse. Or the fall of the film thickness of insulating films, such as the surface insulating film 5, can be prevented.
In particular, since the sagging prevention pattern 3 is not formed on the outer peripheral portion of the substrate adjacent to the solid pattern forming region, a space for forming the sagging preventing pattern 3 becomes unnecessary, and the wiring forming region can be enlarged. .
The actual wiring layer 2 is a wiring layer for constituting an actual circuit and is for the dummy pattern.
[0013]
Further, it is desirable that the sagging prevention pattern 3 is provided around the through hole provided on the inner side of the mounting circuit resin substrate with a thin film so as to border the periphery of the through hole. Can be prevented .
[0014]
Further, the sagging prevention pattern 3 is provided around the non-wiring area provided on the inner side of the mounting circuit resin substrate with a thin film, that is, around the non-wiring area such as the product number display part or the logo mark writing part, particularly the inner circumference. In addition, it is desirable to border the periphery, thereby preventing the occurrence of insulation failure in the vicinity of the wiring non-forming region .
[0015]
Further, the sagging prevention pattern 3 may be formed of any member, but it is desirable to form it simultaneously with the same material as the wiring layer of the same layer in order not to increase the manufacturing process. It is desirable to provide a sagging prevention pattern 3 for each wiring layer.
[0016]
Further, the sagging prevention pattern 3 may be constituted by a film thickness portion previously formed on the dry film. In this case, a short circuit caused by the sagging prevention pattern 3 itself can be prevented.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Here, with reference to FIG. 2, the mounting circuit resin board with a thin film of the reference example 1 used as the premise of this invention is demonstrated.
FIG. 2A is a schematic plan view of the thin-film mounted circuit resin substrate 10 of Reference Example 1 , which is a premise of the present invention, and shows an actual wiring pattern provided on the inner side of the substrate. An anti-sag pattern 21 is provided on the outer peripheral portion 11 so as to border the outer peripheral portion 11 so as to surround the formed wiring formation region 14.
[0018]
Further, the anti-sag pattern is also formed in the through-hole forming region 13 and the product number display unit 12 provided in the wiring forming region 14 so as to border the outer peripheral part of the through-hole forming region 13 and the inner peripheral part of the product number display unit 12. 22 and 23 are provided.
[0019]
These sag prevention patterns 22 to 23 are simultaneously formed of the same material as that of the wiring layer, as will be described below, and these sag prevention patterns 22 to 23 are formed at the outer peripheral edge of the wiring formation region 14 or Provided at a position 0.1 mm to 1 mm away from the inner peripheral edge.
[0020]
In this case, in order not to electrically affect the actual wiring pattern provided in the wiring forming region 14 such as electromagnetic noise, it is only necessary that the distance is 0.1 mm or more. On the other hand, sagging of the insulating film is effectively suppressed. For this purpose, the thickness is preferably 1 mm or less. Here, the thickness is set to 0.1 mm in consideration of the manufacturing process and electrical influence.
[0021]
FIG. 2B is a schematic cross-sectional view taken along the alternate long and short dash line connecting A-A ′ in FIG. 2A, and Cu is formed on the resin core material 31 by electroless plating. After the film is deposited, the first Cu wiring layer 32 and the sagging prevention pattern 33 are formed in the wiring forming region 14 by etching, and the Cu film is removed from the outer peripheral portion 11.
[0022]
Next, after the dry film is thermocompression bonded to form the first interlayer insulating film 34, a plating seed layer is formed by an electroless Cu plating method, and a Cu plating layer is selected by an electrolytic plating method using a plating frame made of resist as a mask. After removing the plating frame, the exposed plating seed layer is removed with a sulfuric acid-based etchant, thereby forming the second Cu wiring layer 35 in the wiring forming region 14 and the anti-sag pattern on the outer peripheral portion 11. 36 is formed.
A sagging prevention pattern is simultaneously formed on the inner peripheral portion of the production number display portion 12 and the outer peripheral portion of the through hole forming portion 13.
[0023]
By repeating this process as many times as necessary, a multilayer wiring layer structure is formed, and finally the surface is covered with a surface insulating film 43 made of a solder resist, thereby obtaining a basic structure of a mounting circuit resin substrate with a thin film.
Further, the through hole is formed inside an anti-sag pattern 23 provided on the outer periphery of the through hole forming portion 13.
[0024]
In the figure, the fourth Cu wiring layer 41 to the first Cu wiring layer 32 are shown as a four-layer wiring structure separated by the third interlayer insulating film 40 to the first interlayer insulating film 34, and the illustration is omitted. However, the third interlayer insulating film 40 to the first interlayer insulating film 34 are provided with through vias for electrically connecting the upper and lower wiring layers at necessary places.
[0025]
In this case, the anti-sagging pattern 21 provided on the outer peripheral portion 11 is formed by the anti-sagging patterns 42 to 33 formed simultaneously with the fourth Cu wiring layer 41 to the first Cu wiring layer 32.
The anti-sagging pattern 23 provided so as to border the outer peripheral portion of the through-hole forming region 13 has the same configuration as the anti-sagging pattern 21 provided on the outer peripheral portion 11.
[0026]
As described above, in Reference Example 1 , since the sagging prevention patterns 21 to 23 are provided adjacent to the region where the wiring layer is rough, the insulation on the upper portion of the wiring layer is not formed in the wiring forming region 14. The thickness of the film, that is, the surface insulating film 43 and the third interlayer insulating film 40 to the first interlayer insulating film 34 can be made uniform.
[0027]
In addition, since the film thickness of the insulating film can be made uniform, the film thickness of the insulating film in the region where the wiring layer is rough is not reduced, and it is possible to suppress the occurrence of defects such as a decrease in insulation and delamination. And reliability is improved.
[0028]
Next, with reference to FIG. 3, the mounting circuit resin board with a thin film of the reference example 2 used as the premise of this invention is demonstrated.
FIG. 3A is a schematic plan view of a mounting circuit resin substrate with a thin film according to Reference Example 2 which is a premise of the present invention. It is divided into solid pattern forming regions 15 and 16.
[0029]
FIG. 3B is a plan view for explaining a wiring pattern in the wiring formation region 14, and shows an actual wiring pattern 17 that actually transmits an electric signal and a power source in an electronic circuit and its outer periphery. A solid pattern 18 is provided at a position separated by about 1 μm.
[0030]
3A again, in this case, the product number display unit 12 provided in the wiring formation region 14 and the through-hole formation region 13 provided in the solid pattern formation region 16 have the above-described first embodiment. Similarly, the anti-sagging patterns 22 and 23 are provided so as to border the outer peripheral part of the through-hole forming region 13 and the inner peripheral part of the product number display part 12.
Further, an anti-sag pattern 21 is also provided on the outer peripheral portion 11 so as to border the outer peripheral portion 11.
[0031]
As described above, in the reference example 2 , the solid pattern forming regions 15 and 16 are provided so as to sandwich the wiring forming region 14, and the solid pattern 18 is also provided in the wiring forming region 14 so as to surround the actual wiring pattern 17. However, by providing the outer peripheral portion 11 with the anti-sagging pattern 21 so as to border the outer peripheral portion 11, the insulating film on the actual wiring pattern 17 can be obtained even in a region where the actual wiring pattern 17 near the outer peripheral portion 11 is rough. The film thickness of the film can more reliably suppress the thinning.
[0032]
Next, with reference to FIG. 4, the mounting circuit resin board with a thin film of the 1st Embodiment of this invention is demonstrated.
FIG. 4 is a schematic plan view of the mounting circuit resin substrate with a thin film according to the first embodiment of the present invention. The basic configuration of the substrate is the same as that of Reference Example 2 described above, and Are divided into a wiring formation region 14 and solid pattern formation regions 15 and 16.
[0033]
Also in the first embodiment, the product number display section 12 provided in the wiring formation region 14 and the through hole formation region 13 provided in the solid pattern formation region 16 are the same as those in the first embodiment. Similarly, sagging prevention patterns 22 and 23 are provided so as to border the outer peripheral portion of the through-hole forming region 13 and the inner peripheral portion of the product number display portion 12.
[0034]
However, the outer peripheral portion 11 is provided with the sagging prevention patterns 24 and 25 only in the region adjacent to the wiring forming region 14 of the outer peripheral portion 11.
[0035]
In this case, there is no actual wiring pattern in the solid pattern forming regions 15 and 16 and the solid pattern forming regions 15 and 16 themselves are dense patterns. Therefore, it is necessary to provide a sagging prevention pattern in the adjacent outer peripheral portion 11. There is no.
[0036]
However, since the density of the actual wiring pattern tends to decrease in the peripheral portion of the wiring formation region 14, by providing the anti-sagging patterns 24 and 25 only in the region adjacent to the wiring formation region 14 of the outer peripheral portion 11, The film thickness of the insulating film on the wiring layer can be made uniform.
[0037]
In addition, since the anti-sag pattern is not formed on the outer peripheral portion 11 adjacent to the solid pattern forming regions 15 and 16, a space for forming the anti-sag pattern is not required, and the wiring forming region 14 is enlarged. Can do.
[0038]
Having described the implementation of the embodiment of the present invention, the present invention is not limited to the configuration and conditions described in the form of implementation, it can be variously modified in the.
For example, it in the form of implementation described above does not mention, sagging prevention pattern may be connected to either the power supply layer of the upper and lower, thereby detecting a short circuit between the wiring line patterns Can do.
[0039]
Further, in the implementation of the above, although the wiring layer and sagging prevention pattern is formed by Cu plating layer is intended not necessarily need to be a Cu-plated layer may be a sputtered layer, patterning An etching method may be used as a method.
[0040]
Further, the constituent material of the wiring layer and the sag prevention pattern is not limited to Cu, and other conductive materials such as Au and W may be used in a single layer or a laminated structure.
[0041]
Further, in the implementation of the above, it is assumed that the wiring non-formation regions provided within a product number display unit, wiring non-formation regions provided within such limited to product number display portion Alternatively, it may be a logo mark or other display unit for displaying electrical characteristics.
[0042]
Further, in the implementation described above, but are formed at the same time the sagging prevention pattern of the same material as the wiring layer is not necessarily the same material, but may be formed of an insulating material.
For example, a sagging prevention pattern may be formed by forming a film thickness portion at a position corresponding to the outer peripheral portion of the mounted circuit resin substrate with a thin film on the outer peripheral portion of the dry film serving as the interlayer insulating film.
[0043]
(Supplementary Note 1) In a thin film with mounting circuit resin substrate an interlayer insulating film 4 is constituted by a dry film provided between the lower wiring layer and an upper wiring layer, and a wiring formation region that form the actual wiring layer 2, the wiring formation A solid pattern forming region having a pattern density higher than that of the wiring forming region and an area where the density of the actual wiring layer 2 is relatively coarse, and arranged on the outer periphery of the substrate. An anti-sagging pattern 3 is provided, and the anti-sagging pattern 3 is not formed on the outer periphery of the substrate adjacent to the solid pattern forming region.
(Additional remark 2) The sagging prevention pattern 3 was provided around the through-hole provided in the inner side of the said mounting circuit resin substrate with a thin film so that the circumference | surroundings of the said through-hole might be bordered. Mounting circuit resin board with thin film.
(Additional remark 3) The anti-sagging pattern 3 is provided around the non-wiring region provided on the inner side of the above-mentioned mounting circuit resin substrate with thin film so as to border the non-wiring region. The mounting circuit resin substrate with a thin film according to appendix 1 or appendix 2.
(Additional remark 4) The mounting circuit resin substrate with a thin film of any one of Additional remarks 1 thru | or 3 which formed the said pattern 3 for dripping prevention with the same material as the wiring layer of the same layer.
(Additional remark 5) The mounting circuit resin board with a thin film of Additional remark 4 characterized by providing the said anti-sagging pattern 3 in the same layer with respect to each wiring layer.
(Appendix 6) The mounting circuit resin substrate with a thin film according to any one of appendices 1 to 3, wherein the sagging prevention pattern 3 is a film thickness portion previously formed on a dry film.
[0044]
【The invention's effect】
According to the present invention, since the sagging prevention pattern is formed so as to border the periphery of the wiring forming region, the through hole forming region, or the wiring non-forming region inside the substrate, the insulating film on the actual wiring layer is formed. Since the film thickness can be made uniform, thereby suppressing insulation degradation and delamination, it greatly contributes to improving the reliability of the mounted circuit resin substrate with a thin film.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of a basic configuration of the present invention.
FIG. 2 is an explanatory diagram of a structure of a mounting circuit resin substrate with a thin film according to Reference Example 1 , which is a premise of the present invention.
FIG. 3 is a configuration explanatory view of a thin-film mounted circuit resin substrate of Reference Example 2 , which is a premise of the present invention.
FIG. 4 is a configuration explanatory view of a mounting circuit resin substrate with a thin film according to the first embodiment of the present invention.
FIG. 5 is a configuration explanatory view of a conventional mounting circuit resin substrate with a thin film.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Core layer 2 Actual wiring layer 3 Anti-sagging pattern 4 Interlayer insulating film 5 Surface insulating film 10 Mounting circuit resin substrate with thin film 11 Outer peripheral part 12 Product number display part 13 Through-hole formation area 14 Wiring formation area 15 Solid pattern formation area 16 Solid pattern formation region 17 Actual wiring pattern 18 Solid pattern 21 Anti-sagging pattern 22 Anti-sagging pattern 23 Anti-sagging pattern 24 Anti-sagging pattern 25 Anti-sagging pattern 31 Resin core layer 32 First Cu wiring layer 33 Anti-sagging pattern 34 First interlayer insulating film 35 Second Cu Wiring Layer 36 Anti-sagging Pattern 37 Second Interlayer Insulating Film 38 Third Cu Wiring Layer 39 Anti-sagging Pattern 40 Third Interlayer Insulating Film 41 Fourth Cu Wiring Layer 42 Anti-sagging Pattern 43 Surface Insulating Film 60 Mounting Circuit Resin Substrate with Thin Film 61 Outer peripheral part 62 Product number display part 63 Through-hole formation area 64 Wiring forming region 71 Resin core layer 72 First Cu wiring layer 73 First interlayer insulating film 74 Second Cu wiring layer 75 Second interlayer insulating film 76 Third Cu wiring layer 77 Third interlayer insulating film 78 Fourth Cu wiring layer 79 Surface insulating film

Claims (4)

In the thin film with mounting circuit resin substrate constituted by a dry film an interlayer insulating film provided between the lower wiring layer and an upper wiring layer, and a wiring formation region that form the actual wiring layer is disposed to sandwich the wiring forming region A solid pattern forming region having a pattern density larger than that of the wiring forming region; and an anti-sagging pattern provided adjacent to a region where the density of the actual wiring layer is relatively coarse and provided on an outer peripheral portion of the substrate. The mounting circuit resin substrate with a thin film is characterized in that the sagging prevention pattern is not formed on the outer peripheral portion of the substrate adjacent to the solid pattern forming region. 2. The mounting circuit with a thin film according to claim 1 , wherein an anti-sagging pattern is provided around the through hole provided on the inner side of the mounting circuit resin substrate with the thin film so as to border the periphery of the through hole. Resin substrate. Around the wiring non-formation region provided on the inner side of the mounting circuit resin substrate with the thin film, the wiring such borders the periphery of the non-forming region, claim, characterized in that a sag preventing pattern 1 or 2 A mounting circuit resin substrate with a thin film as described in 1 .   The mounting circuit resin substrate with a thin film according to any one of claims 1 to 3, wherein the sagging prevention pattern is formed of the same material as the wiring layer of the same layer.

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