JP4165351B2 - Plasma display panel - Google Patents

Description

  The present invention relates to a plasma display panel used for a wall-mounted television or a large monitor.

  A typical AC surface discharge type plasma display panel as an AC type includes a front plate made of a glass substrate formed by arranging scan electrodes and sustain electrodes for performing surface discharge, and a glass substrate formed by arranging data electrodes. The back plate and the back plate are arranged in parallel so as to form a discharge space in the gap so that both electrodes form a matrix, and the outer peripheral portion thereof is sealed with a sealing material such as a glass frit. . Discharge cells partitioned by barrier ribs are provided between the substrates, and a phosphor layer is formed on the discharge cells between the barrier ribs. In the plasma display panel having such a configuration, color display is performed by generating ultraviolet rays by gas discharge and exciting the phosphors of R, G, and B colors with the ultraviolet rays to emit light (Patent Document 1). reference).

  This plasma display panel divides one field period into a plurality of subfields, and is driven by a combination of subfields that emit light to perform gradation display. Each subfield includes an initialization period, an address period, and a sustain period. In order to display image data, different signal waveforms are applied to each electrode in the initialization period, the address period, and the sustain period.

  In the initialization period, for example, a positive pulse voltage is applied to all the scan electrodes, and necessary wall charges are accumulated on the protective film and the phosphor layer on the dielectric layer covering the scan electrodes and the sustain electrodes.

  In the address period, scanning is performed by sequentially applying a negative scanning pulse to all the scanning electrodes, and when there is display data, if a positive data pulse is applied to the data electrode while scanning the scanning electrode, Discharge occurs between the scan electrode and the data electrode, and wall charges are formed on the surface of the protective film on the scan electrode.

  In the subsequent sustain period, a voltage sufficient to maintain the discharge is applied between the scan electrode and the sustain electrode for a certain period. Thereby, discharge plasma is generated between the scan electrode and the sustain electrode, and the phosphor layer is excited to emit light for a certain period. In the discharge space where no data pulse is applied in the address period, no discharge occurs and excitation light emission of the phosphor layer does not occur.

In such a plasma display panel, a large discharge delay occurs in the discharge in the address period and the writing operation becomes unstable, or the writing time is set long to completely perform the writing operation, and the time spent in the address period is increased. There was a problem of too much. In order to solve these problems, a panel in which an auxiliary discharge electrode is provided on the front plate and the discharge delay is reduced by priming discharge generated by in-plane auxiliary discharge on the front plate side and a driving method thereof have been proposed (see Patent Document 2). ).
JP 2001-195990 A JP 2002-297091 A

  However, in such a plasma display panel, when the screen is increased in definition and the number of lines is increased, the time spent for the address time becomes longer, so the time spent for the maintenance period must be reduced, and it is difficult to ensure the luminance. The problem arises. Furthermore, in order to achieve high luminance and high efficiency, there is a problem that even when the xenon partial pressure is increased, the discharge start voltage is increased, the discharge delay is increased, and the address characteristics are deteriorated. In addition, since the address characteristics are greatly affected by the manufacturing process, it is required to shorten the address time by reducing the discharge delay at the time of addressing so as not to be affected by the manufacturing variation.

  In response to such demands, the conventional plasma display panel that performs priming discharge in the front plate surface has a problem that the discharge delay at the time of writing cannot be sufficiently shortened, and the operation margin of auxiliary discharge is small, so that it may be erroneous depending on the panel. There are problems such as inducing electric discharge, and further causing priming particles more than particles necessary for priming to be supplied to adjacent discharge cells to cause crosstalk. In order to realize a stable auxiliary discharge for supplying the priming particles, a predetermined distance between the electrodes is required. Therefore, the auxiliary discharge in the front plate surface has a problem that the auxiliary discharge cell becomes large and the panel cannot be made high definition.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a plasma display panel that can stabilize address characteristics even when the definition is increased.

In order to achieve such an object, a plasma display panel according to the present invention includes a first electrode and a second electrode arranged on a first substrate so as to be parallel to each other and covered with a dielectric layer, and the first electrode. A third electrode disposed in a direction intersecting the first electrode and the second electrode on a second substrate disposed opposite to the substrate with a discharge space interposed therebetween, and the third electrode disposed on the second substrate. The fourth electrode is formed through a dielectric layer in a direction orthogonal to the first electrode, and the fourth electrode applies a scan pulse to the first electrode and applies a data pulse to the third electrode. In addition, a positive voltage pulse that generates a priming discharge by a scanning pulse applied to the first electrode is applied .

  With this configuration, since the priming discharge is performed in the vertical direction between the first substrate and the second substrate, the auxiliary discharge cell is suitably reduced for high definition, and the priming discharge is stably formed to achieve address characteristics. An excellent plasma display panel can be realized.

  In addition, a partition wall that partitions a plurality of discharge cells formed by the first electrode, the second electrode, and the third electrode may be provided on the second substrate, and a phosphor layer may be provided in the discharge cell. The partition wall includes a vertical wall portion extending in a direction orthogonal to the first electrode and the second electrode, and a horizontal wall portion provided so as to intersect the vertical wall portion to form a gap portion. The fourth electrode is preferably formed on the second substrate.

  With these configurations, a stable priming discharge is reliably formed between the first substrate and the second substrate in the gap, and the priming particles are supplied to the discharge cells adjacent in the column direction. The address characteristics can be stabilized by reducing the discharge delay at the address without depending on the material characteristics of the layer.

  Further, the gap portion may be continuously formed in parallel with the first electrode and the second electrode by the adjacent side wall portions. Therefore, priming discharge can be diffused in the gap, and priming to each discharge cell can be performed stably.

  In addition, a light absorption layer may be formed on the first substrate corresponding to the discharge space formed by the fourth electrode. Therefore, light emission in the gap can be absorbed by the light absorption layer, and deterioration of contrast due to priming discharge generated in the gap can be prevented.

  Furthermore, it is preferable to form the light absorption layer on the surface of the first substrate on the discharge space side. Therefore, light emission by priming discharge is confined in the gap, and the contrast can be further improved.

  Further, the fourth electrode may be formed at a position closer to the discharge space than the third electrode, and the discharge voltage of the priming discharge in the gap can be lowered than the discharge voltage of the discharge cell using the third electrode, Prior to the address discharge of the discharge cell, a stable priming discharge can be generated.

  Further, the third electrode may be formed at a position closer to the discharge space than the fourth electrode. Therefore, the address discharge voltage due to the third electrode can be reduced.

  In addition, priming discharge is generated when the scan pulse is applied between the first electrode to which the scan pulse is applied and the fourth electrode. Therefore, it is possible to optimally generate the priming discharge for reducing the discharge delay at the time of addressing at the time when the priming is most necessary for the discharge cell, and more stable address characteristics can be obtained.

  In addition, it is preferable that two first electrodes and two second electrodes are alternately arranged. For this reason, since the electrodes in the portions adjacent to the discharge cells in the column direction have the same potential, the charge / discharge power consumed between the adjacent cells is reduced, and the power is reduced.

  Furthermore, the fourth electrode is preferably formed on the second substrate corresponding to a portion where the first electrodes to which the scan pulse is applied are adjacent to each other. Therefore, it is possible to suppress erroneous discharge that occurs between the second electrode and the fourth electrode and to perform a stable operation.

  Moreover, it is preferable to form a discharge region for inducing a discharge between the first electrode of the first substrate and the fourth electrode of the second substrate in a portion outside the display region in the peripheral portion. According to this configuration, the discharge delay itself of the priming discharge generated in the gap due to the discharge in the discharge region in the peripheral portion can be reduced, so that faster address characteristics can be realized and the address time can be shortened.

The fourth electrode for generating a discharge between the first substrate and the second substrate generates a discharge by applying a positive voltage pulse in the address period, and further applies to the fourth electrode in the address period. It is preferable that the positive voltage value to be larger than the voltage value applied to the third electrode in the address period. Therefore, it becomes possible to generate priming discharge in the gap more reliably.

  As described above, according to the present invention, since priming discharge can be reliably performed in a small space, it is possible to provide a plasma display panel having a small discharge delay at the time of addressing and excellent addressing characteristics even when the panel has a high definition. .

  Hereinafter, a plasma display panel according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is a cross-sectional view showing a plasma display panel according to Embodiment 1 of the present invention, FIG. 2 is a plan view schematically showing an electrode arrangement on the surface substrate side which is a first substrate, and FIG. 3 is a second substrate. FIG. 4 is a perspective view schematically showing a certain rear substrate side, and FIG. 4 is a plan view of the rear substrate which is the second substrate. 5, 6 and 7 are cross-sectional views taken along lines AA, BB and CC in FIG. 4, respectively.

  As shown in FIG. 1, a glass front substrate 1 as a first substrate and a glass back substrate 2 as a second substrate are arranged to face each other with a discharge space 3 interposed therebetween, and the discharge space. 3 is filled with neon and xenon or a mixed gas thereof as a gas that emits ultraviolet rays by discharge. On the surface substrate 1, an electrode group consisting of a scanning electrode 6 as a strip-shaped first electrode and a sustain electrode 7 as a second electrode, which are covered with the dielectric layer 4 and the protective film 5 and make a pair, is mutually connected. Arranged so as to be parallel. The scan electrode 6 and the sustain electrode 7 are composed of transparent electrodes 6a and 7a and metal buses 6b and 7b formed on the transparent electrodes 6a and 7a, respectively, and made of silver or the like for enhancing conductivity. Has been.

  Further, as shown in FIG. 2, the scan electrodes 6 and the sustain electrodes 7 are alternately arranged two by two so as to be a scan electrode 6 -a scan electrode 6 -a sustain electrode 7 -a sustain electrode 7. A light absorption layer 8 made of a black material is provided between the scan electrodes 6 and the sustain electrodes 7.

  On the other hand, the configuration of the back substrate 2 will be described with reference to FIGS. 1 and 3 to 7. On the back substrate 2, a plurality of strip-like data electrodes 9 serving as third electrodes are arranged in parallel with each other so as to intersect and intersect the scan electrodes 6 and the sustain electrodes 7. Further, on the rear substrate 2, a partition wall 10 for partitioning a plurality of discharge cells 11 formed by the scan electrode 6, the sustain electrode 7, and the data electrode 9 is formed and partitioned by the partition wall 10. A phosphor layer 12 formed corresponding to the discharge cell 11 is provided. The partition wall 10 is provided so as to intersect the vertical wall portion 10a and a vertical wall portion 10a extending in a direction orthogonal to the scanning electrode 6 and the sustain electrode 7 provided on the front substrate 1, that is, a direction parallel to the data electrode 9. The discharge cell 11 is formed, and the lateral wall portion 10 b that forms the gap portion 13 between the discharge cells 11 is formed. The light absorption layer 8 formed on the surface substrate 1 is formed at a position corresponding to the space of the gap portion 13 formed between the lateral wall portions 10 b of the partition wall 10.

  Further, in the gap portion 13 of the back substrate 2, a priming electrode 14 serving as a fourth electrode for causing discharge between the front substrate 1 and the back substrate 2 in the space within the gap portion 13 is orthogonal to the data electrode 9. A priming discharge cell is formed by the gap 13. The gap 13 is continuously formed in a direction orthogonal to the data electrode 9. The priming electrode 14 is formed on the dielectric layer 15 covering the data electrode 9, and a dielectric layer 16 is further formed so as to cover the priming electrode 14. It is formed in the position near. Furthermore, the priming electrode 14 is formed only in the gap portion 13 corresponding to the portion where the scan electrodes 6 to which the scan pulse is applied are adjacent to each other, and a part of the metal bus 6 b of the scan electrode 6 corresponds to the gap portion 13. It is formed on the light absorption layer 8 so as to extend to the position. That is, a priming discharge is performed between the metal bus 6 b protruding in the direction of the gap 13 in the adjacent scanning electrodes 6 and the priming electrode 14 formed on the back substrate 2 side.

  Next, a method for displaying image data on the plasma display panel will be described with reference to FIG. As a method of driving the plasma display panel, one field period is divided into a plurality of subfields having a light emission period weight, and gradation display is performed by combining the subfields to emit light. Each subfield includes an initialization period, an address period, and a sustain period.

  FIG. 8 shows an example of a driving waveform for driving the plasma display panel. In the initialization period shown in FIG. 8, in the priming discharge cell in which the priming electrode Pr (priming electrode 14 in FIG. 1) is formed, the scanning electrode Yn partially protruding in the region of the gap portion (gap portion 13 in FIG. 1). And the priming electrode Pr. In the next address period, as shown in FIG. 8, a positive potential is always applied to the priming electrode Pr. Therefore, in the priming discharge cell, priming discharge occurs between the priming electrode Pr and the scanning electrode Yn when the scanning pulse SPn is applied to the scanning electrode Yn. Therefore, the discharge delay at the time of addressing in the nth discharge cell is reduced by this priming discharge, and the address characteristics are stabilized.

  Next, the scan pulse SPn + 1 is applied to the scan electrode Yn + 1 of the (n + 1) th discharge cell. At this time, since the priming discharge has occurred immediately before, the discharge delay at the address in the (n + 1) th discharge cell is also reduced. Here, only the driving sequence of one certain field has been described, but the operation principle in the other subfields is also the same.

Here, in the drive waveform shown in FIG. 8, priming discharge can be stably generated by applying a positive voltage to the priming electrode Pr during the address period. The voltage value Vpr applied to the priming electrode Pr is set to a value larger than the voltage value Vd of the data pulses Dn, Dn + 1... Applied to the data electrode D (data electrode 9 in FIG. 1) in the address period. It is more desirable.

  If the voltage value applied to the priming electrode Pr during the address period is set to a positive voltage value with respect to the voltage value applied to the priming electrode Pr during the initialization period, the voltage value is set to the GND (ground) level. On the other hand, it may be a negative voltage value.

  As described above, since the priming discharge is generated when the scanning pulse is applied to the priming discharge cell, the priming discharge can be surely generated at the time of addressing, and the discharge delay at the time of addressing can be more effectively reduced. It is possible. In this manner, priming discharge can be reliably generated in the gap area, and the address characteristics can be further stabilized.

  In the present embodiment, as shown in FIGS. 1, 3, 4, and 5, priming discharge is generated between the scanning electrode 6 provided on the front substrate 1 and the priming electrode 14 provided on the rear substrate 2. In addition, the priming electrode 14 is formed only in the region of the gap 13 so as to be orthogonal to the data electrode 9. Therefore, it is possible to generate priming discharge only in the region of the gap portion 13. Therefore, compared with the case where priming discharge is generated in the plane of the surface substrate 1, it is possible to suppress crosstalk generated by supplying priming particles more than particles necessary for priming to the adjacent discharge cells 11.

  Further, the purpose of using the priming discharge is to stabilize the address characteristics when the screen is made high definition. When the priming discharge is generated in the plane of the surface substrate 1, a distance between the electrodes is necessary to achieve a stable priming discharge, and the auxiliary discharge cell, that is, the priming discharge cell becomes large. As a result, the area of the priming discharge cells in all the discharge cells increases, and the panel luminance decreases. Further, if a priming discharge is generated outside the surface of the front substrate 1 at the timing when the scan pulse is applied, a structure for wiring a part of the scan electrode 6 to the back substrate 2 side and an electrode extraction structure are provided. There are problems such as complexity and further inability to secure the withstand voltage at that time.

  As in the embodiment of the present invention, a priming discharge cell is generated in the vertical direction between the scanning electrode 6 provided on the front substrate 1 and the priming electrode 14 provided on the back substrate 2 as in the embodiment of the present invention. It is possible to realize a plasma display panel that can be reduced in size, has excellent address characteristics even when the definition is increased, and has improved panel brightness.

  Further, as in the present embodiment, the priming electrode 14 is closer to the discharge space 3 than the data electrode 9 in which priming discharge occurs. For this reason, the distance between the priming electrode 14 and the scanning electrode 6 is reduced, whereby the discharge start voltage is reduced, and the priming discharge in the gap 13 is generated at a low voltage. In addition, the priming discharge can be easily generated earlier than the address discharge, and the address characteristics can be improved.

  Further, the priming electrode 14 is provided only in a region corresponding to the adjacent scan electrode 6. Therefore, the priming discharge is generated only between the scan electrode 6 and the priming electrode 14, and erroneous discharge between the priming electrode 14 and the sustain electrode 7 can be suppressed.

  FIG. 9 is a characteristic diagram showing an example of the discharge delay characteristic of the plasma display panel, and the horizontal axis shows time. 9A shows the case where there is no priming discharge, FIGS. 9B and 9C show the case where there is priming discharge, FIG. 9B shows the scan electrode Yn-th cell, and FIG. 9C. Is the characteristic of the scan electrode Yn + 1th cell. Further, in FIG. 10, the statistical delay time of discharge with respect to the voltage Vpr applied to the priming electrode Pr is indicated by the scan electrode Yn-th cell and the scan electrode Yn + 1-th cell, respectively.

  In FIG. 9, a is a light emission output waveform, b is a voltage waveform applied to the scan electrode, c is a probability distribution of discharge, d is a light emission output waveform of priming discharge, e is a light emission output waveform of write discharge, and c The discharge probability distribution shows the discharge delay. 9A, 9B, and 9C, when the priming discharge of FIGS. 9B and 9C is present, the discharge of the priming discharge of FIG. The probability distribution is sharp. This shows that the discharge delay is small. Further, since the priming discharge is performed when the scan pulse is applied to the scan electrode Yn of the Ynth discharge cell, the discharge delay in the Ynth cell is slightly large, but the priming discharge has already occurred in the Yn + 1th discharge cell. Since it is influenced, it becomes possible to make discharge delay very small.

  On the other hand, as shown in FIG. 10, as the priming voltage Vpr increases, it can be seen that the effect of reducing the statistical delay time of discharge in the Yn-th cell that is performing priming discharge particularly when a scan pulse is applied is large. The statistical delay time of the discharge without the priming discharge is about 2400 ns, and it can be seen that the discharge delay can be greatly improved by the present invention.

  FIG. 11 is a plan view showing an example of drawing out the scanning electrode 6. FIG. 11A shows an example in which the metal bus 6b of the scan electrode 6 is projected in the direction of the data electrode 9, and the projection 20 is provided to form the priming scan electrode 22. FIG. 11B shows the metal bus 6b. An example in which the connection portion 21 is provided in the non-display region and connected to the priming scan electrode portion 22 is shown. In FIG. 11, the oblique portion of the metal bus 6 b is an outside extraction region. In any case, the priming discharge can be reliably and stably performed. In particular, by providing the continuous priming scan electrode portion 22 in the gap portion 13 where the priming discharge occurs as shown in FIG. Priming discharge can be reliably generated.

  Further, the gap portion 13 that causes priming discharge is formed continuously in a direction orthogonal to the data electrode 9. For this reason, the discharge variation of the priming discharge generated in the long gap portion 13 along the priming electrode 14 can be reduced.

  In the present embodiment, the vertical substrate 10 a and the horizontal wall 10 b are provided on the back substrate 2 as the partition walls 10 to form the substantially rectangular discharge cells 11, and the gap 13 is connected to the scan electrode 6 and the sustain electrode 7. It is a space formed in parallel. However, the present invention is not limited to such a discharge cell shape, and it is needless to say that the present invention can be applied to a case where the partition wall meanders to form a discharge cell.

  Furthermore, in the embodiment of the present invention, two scanning electrodes 6 and two sustaining electrodes 7 are alternately arranged as shown in FIG. For this reason, the electrodes in the portion where the discharge cells are adjacent in the column direction have the same potential, thereby reducing the charge / discharge power consumed between the adjacent cells, thereby reducing the power.

  In the embodiment of the present invention, as shown in FIG. 1, the light absorption layer 8 is formed between the adjacent scan electrodes 6 and between the adjacent sustain electrodes 7 on the surface substrate 1 side. Therefore, the light absorption layer 8 can block the emission of the priming discharge in the gap portion 13 and can improve the address characteristics and prevent the decrease in contrast.

  The plasma display panel shown in FIG. 12 has the same configuration as that of FIG. 1, and further, the second light absorption layer 23 is provided between the adjacent scan electrodes 6 and between the sustain electrodes 7 or the dielectric layer 4 or the protective film 5. It is also provided above. For this reason, it is possible to further improve the contrast.

  In addition, since the light absorption layer 8 or the second light absorption layer 23 is provided on the surface substrate 1 corresponding to the gap portion 13 in this way, the phosphor may enter the gap portion 13 and the phosphor formation may be performed. It becomes easy.

  In FIG. 1 and FIG. 12, the light absorption layer 8 is also provided between the sustain electrodes 7. However, since no priming discharge is generated in the gap portion 13, no light absorption layer is provided in the gap portion. It is also possible to do.

(Embodiment 2)
FIG. 13 is a plan view showing the main structure of the plasma display panel according to Embodiment 2 of the present invention. In the second embodiment, a discharge region for inducing a priming discharge between the front substrate 1 and the rear substrate 2 in the space within the gap 13 is formed in the peripheral portion outside the display region of the plasma display panel. Is.

  In the method of improving the address characteristics by such priming discharge, it is necessary to generate the priming discharge itself stably without any discharge delay. In the second embodiment, a discharge region for generating auxiliary discharge for stably causing priming discharge is formed in the peripheral portion of the panel.

  As shown in FIG. 13, the metal bus 6b of the scan electrode 6 corresponding to the priming electrode 14 is arranged extending to the peripheral region outside the display region 50 formed by the partition wall 10, and similarly the priming electrode 14 is also provided. The display area 50 is arranged to extend to a peripheral area that is outside the display area 50. Therefore, the auxiliary discharge region 17 for the priming discharge can be formed in the peripheral region, and the priming discharge can be stably generated without a discharge delay by the preliminary discharge generated in this region. In the auxiliary discharge region 17 shown in FIG. 13, an example in which discharge occurs between the scan electrode 6 and the priming electrode 14 is shown. However, the electrode formed in parallel with the scan electrode 6 and the data electrode 9. A preliminary discharge may be generated between the two.

(Embodiment 3)
FIG. 14 is a cross-sectional view showing a plasma display panel according to Embodiment 3 of the present invention. In the third embodiment, in addition to the priming electrode 14 formed on the back substrate 2 side, a priming electrode 18 is formed in a region corresponding to the gap 13 on the front substrate 1 side. Note that a new voltage waveform different from that of the scan electrode 6 may be applied to the priming electrode 18 even if it has the same potential as that of the scan electrode 6. With such an electrode configuration, priming discharge in the gap 13 can be generated at a higher speed, and a higher-speed writing operation can be performed.

(Embodiment 4)
FIG. 15 is a cross-sectional view showing a plasma display panel according to Embodiment 4 of the present invention. In the fourth embodiment, the priming electrode 14 formed on the back substrate 2 side in the first embodiment shown in FIG. 1 is not covered with the dielectric layer 16 but exposed to the space of the gap portion 13. It is.

  Thus, by exposing the priming electrode 14, the voltage for priming discharge can be lowered.

(Embodiment 5)
FIG. 16 is a plan view showing the main structure of the plasma display panel according to Embodiment 5 of the present invention. In the fifth embodiment, the shape of the transparent electrodes 6a and 7a constituting the scan electrode 6 and the sustain electrode 7 is T-shaped, and a part of the transparent electrode 6a of the scan electrode 6 is projected from the metal bus 6b, The electrode portion 6 c is opposed to the priming electrode 14. Thus, by devising the electrode shape, it is possible to control the magnitude of the priming discharge.

(Embodiment 6)
FIG. 17 is a plan view showing the structure of the back substrate of the plasma display panel in accordance with the sixth exemplary embodiment of the present invention. In the sixth embodiment, the priming electrode 19 is formed on the same plane as the data electrode 9 so as to pass under the vertical wall portion 10 a of the partition wall 10. With such a configuration, the intersection between the data electrode 9 and the priming electrode 19 can be eliminated, the breakdown voltage characteristics between the data electrode 9 and the priming electrode 19 are improved, and the data electrode 9 and the priming electrode 19 intersect with each other. The generation of reactive power due to the operation can be suppressed.

(Embodiment 7)
FIG. 18 is a sectional view showing a plasma display panel in accordance with the seventh exemplary embodiment of the present invention. As shown in FIG. 18, in the seventh embodiment, the configuration of the data electrode 33 that is the third electrode and the priming electrode 31 that is the fourth electrode formed on the back substrate 2 is the configuration described in the first embodiment. It is different from.

  That is, in the seventh embodiment, the priming electrode 31 is first formed on the back substrate 2, the dielectric layer 32 is provided so as to cover the priming electrode 31, and the data electrode 33 is provided on the dielectric layer 32. Further, a dielectric layer 34 that covers the data electrode 33 and serves as a base for forming a partition wall is provided, and a partition wall 35 is formed on the dielectric layer 34. Thus, in the seventh embodiment, only the configuration on the back substrate 2 side is different, and the configuration on the front substrate 1 side is the same as that in the first embodiment.

  Therefore, according to the seventh embodiment, the data electrode 33 is formed at a position closer to the discharge space 3 than the priming electrode 31. Therefore, the dielectric layer 34 formed on the data electrode 33 can be thinned, the discharge voltage at the time of address discharge can be lowered, and the address discharge can be stabilized. The dielectric layer 32 formed on the priming electrode 31 is an insulating layer between the priming electrode 31 and the data electrode 33, and an arbitrary thickness and material for ensuring the insulation between them can be selected. .

  As described above, according to the present invention, the priming discharge can be reliably generated in the gap portion serving as the priming discharge cell, and the address characteristics can be further stabilized.

  Since the plasma display panel according to the present invention can reliably perform priming discharge in a small space, it is useful as a plasma display device having a small discharge delay at the time of address and good address characteristics even when the panel has a high definition.

Sectional drawing which shows the plasma display panel in Embodiment 1 of this invention The top view which shows typically the electrode arrangement of the surface substrate of the plasma display panel A perspective view schematically showing a rear substrate of the plasma display panel Plan view schematically showing the back substrate of the plasma display panel Sectional view when cut along line AA in FIG. Sectional view when cut along line BB in FIG. Sectional view when cut along line CC in FIG. Waveform diagram showing an example of a driving waveform for operating the plasma display panel Characteristic diagram showing an example of discharge delay characteristics of the plasma display panel Characteristic diagram showing an example of statistical delay time of discharge with respect to priming voltage of the plasma display panel A plan view showing an example of drawing out scan electrodes of the plasma display panel Sectional drawing of the plasma display panel which provided the 2nd light absorption layer in the plasma display panel The top view which shows the principal part structure of the plasma display panel in Embodiment 2 of this invention Sectional drawing which shows the plasma display panel in Embodiment 3 of this invention. Sectional drawing which shows the plasma display panel in Embodiment 4 of this invention. The top view which shows the principal part structure of the plasma display panel in Embodiment 5 of this invention The top view which shows the structure of the back substrate of the plasma display panel in Embodiment 6 of this invention Sectional drawing which shows the plasma display panel in Embodiment 7 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Front substrate 2 Back substrate 3 Discharge space 4, 15, 16, 32, 34 Dielectric layer 5 Protective film 6 Scan electrode 6a, 7a Transparent electrode 6b, 7b Metal bus 6c Electrode part 7 Sustain electrode 8 Light absorption layer 9, 33 Data electrode 10, 35 Bulkhead 10a Vertical wall portion 10b Horizontal wall portion 11 Discharge cell 12 Phosphor layer 13 Gap portion 14, 18, 19, 31 Priming electrode 17 Auxiliary discharge region 20 Protruding portion 21 Connection portion 22 Priming scanning electrode portion 23 2 light absorption layer 50 display area

Claims (8)

A first electrode and a second electrode which are arranged on the first substrate so as to be parallel to each other and covered with a dielectric layer, and a second substrate which is arranged opposite to the first substrate with a discharge space interposed therebetween a third electrode disposed in a direction intersecting the first electrode and the second electrode, and a fourth electrode formed over the dielectric layer in a direction perpendicular to the third electrode on the second substrate The fourth electrode generates a priming discharge by the scan pulse applied to the first electrode during an address period in which a scan pulse is applied to the first electrode and a data pulse is applied to the third electrode. A plasma display panel, wherein a positive voltage pulse is applied . A partition for partitioning a plurality of discharge cells formed by the first electrode, the second electrode, and the third electrode is provided on the second substrate, and a phosphor layer is provided in the discharge cell. Item 2. The plasma display panel according to Item 1. The partition wall is constituted by a vertical wall portion extending in a direction orthogonal to the first electrode and the second electrode, and a horizontal wall portion provided so as to intersect the vertical wall portion to form a gap portion, and the second of the gap portion. The plasma display panel according to claim 2, wherein a fourth electrode is formed on the substrate. The plasma display panel according to claim 3, wherein the gap portion is continuously formed in parallel with the first electrode and the second electrode by the adjacent lateral wall portions. The plasma display panel according to claim 1, wherein a light absorption layer is formed on the first substrate corresponding to the discharge space formed by the fourth electrode. 6. The plasma display panel according to claim 5, wherein the light absorption layer is formed on the surface of the first substrate on the discharge space side. The plasma display panel according to claim 1 , wherein the fourth electrode is formed at a position closer to the discharge space than the third electrode. The plasma display panel according to claim 1 , wherein the third electrode is formed at a position closer to the discharge space than the fourth electrode.

Images