JP4147233B2 - Electron beam equipment - Google Patents

Description

  The present invention relates to a substrate inspection technique using a charged particle beam, and in particular, detects foreign matters and defects on a substrate such as a semiconductor wafer having a fine circuit pattern in the inspection technique using a charged particle beam such as an electron beam. Related to inspection technology.

  As a method for evaluating a semiconductor wafer having a fine circuit pattern using an electron beam, a technique for performing high-throughput and high-precision inspection in response to an increase in wafer diameter and circuit pattern miniaturization has been put into practical use. For example, as disclosed in Japanese Patent Application Laid-Open No. 06-139985, a method is known in which defect inspection is performed using the contrast of a secondary electron beam caused by a surface potential difference.

  In addition, as a method of evaluating electrical defects from potential contrast, potential contrast is obtained by irradiating an electron beam before inspection and precharging the wafer surface in advance to a positive or negative polarity before acquiring a secondary electron image. Can be increased. For example, as disclosed in Japanese Patent Application Laid-Open No. 2000-208085, as a method of charging to positive polarity, in pattern inspection of a contact hole or the like in which a plug is embedded, an electron beam is irradiated on the wafer surface, and then the potential contrast is The method of obtaining is known.

  However, these descriptions describe the inspection method for the circuit in which the plug is embedded, but there is no description regarding the inspection method for the bottom of a pattern having a very large step such as a hole after dry etching.

  On the other hand, a technique is known in which the bottom of a hole pattern can be observed from a secondary electron image emitted when the hole pattern is irradiated with an electron beam. However, since these conventional scanning electron microscopes observe a limited field of view at a high magnification over time, it has been impossible to inspect the entire surface of the wafer for defect inspection.

  As a method for inspecting the non-opening of the contact hole by charging the wafer surface to a negative polarity, in Japanese Patent Laid-Open No. 06-139985, the wafer is irradiated with a low acceleration electron beam before acquiring a secondary electron image. The surface is negatively charged. In this method, when there is a residual film at the bottom of the hole, the non-opening is evaluated by utilizing the fact that the potential of the opening changes due to the residual film and the apparent hole diameter becomes small.

  However, in this method, since a limited visual field is observed over time at a high magnification, it has been impossible to perform defect inspection by observing the entire surface of the wafer. In addition, in order to acquire a secondary electron image after negatively charging the wafer surface by previously irradiating an electron beam, the irradiation electron energy and the secondary electron image at the time of acquiring the secondary electron image are further acquired. Since the irradiation electron energy is greatly different, it is difficult to set the electron optical system, and the entire wafer surface cannot be inspected efficiently. Further, since it is necessary to irradiate the wafer twice or more times with the electron beam, the entire wafer surface cannot be inspected efficiently.

Japanese Patent Laid-Open No. 06-139985 Japanese Patent Laid-Open No. 2000-208085

  The conventional electron beam inspection apparatus has the following problems.

  In conventional electron beam inspection equipment, defect inspection is performed based on the contrast due to the potential difference generated on the wafer having the circuit pattern, but secondary electron signals from the bottom of the pattern with very large steps, such as non-opening inspection of contact holes, etc. It was difficult to detect the pattern bottom and inspect the pattern bottom state with high sensitivity. In particular, secondary electrons from the bottom of the hole pattern having a high aspect ratio cannot be detected because most of the secondary electrons are blocked by the side walls, and it is difficult to perform non-aperture inspection of the hole pattern.

  In addition, with the conventional scanning electron microscope, it was possible to evaluate the shape of the hole pattern bottom and foreign matter, but it was difficult to evaluate non-opening defects and the like. Also, since conventional scanning electron microscopes observe with high magnification and high spatial resolution, the scan speed is slow, the scan range is narrow, and high-speed evaluation of large areas such as wafers required for defect inspection equipment is not possible. It was impossible.

  Further, in the method of evaluating the non-opening of the contact hole by charging the wafer surface negatively, the wafer surface is charged negatively by irradiating a low acceleration electron beam before acquiring the secondary electron image. However, in this method, since the difference between the energy of the electron beam irradiated for charging the wafer surface to the negative polarity and the energy of the electron beam irradiated for acquiring the secondary electron image is large, the same electron source is used. It was difficult to irradiate with an electron beam. In addition, once the electron beam is irradiated to negatively charge the wafer surface, secondary electron images are observed with high magnification and high spatial resolution, so the scan speed is slow, the scan range is narrow, and defect inspection equipment is used. It was impossible to evaluate a large area such as a required wafer at high speed. For this reason, it has not been possible to efficiently inspect the entire wafer surface.

  Furthermore, in the conventional apparatus, since the opening is evaluated by charging the wafer surface negatively, the types of semiconductor devices that can be evaluated are limited depending on the types and materials of the semiconductor circuit patterns. Further, since the charging voltage on the wafer surface is limited by the type of the semiconductor circuit, there is a problem that the non-aperture detection sensitivity varies depending on the type of circuit pattern.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to solve the above problems, and as a technique for inspecting a wafer in the middle of a semiconductor manufacturing process, a substrate inspection apparatus that performs high-speed and high-precision defect inspection in a pattern having a large step such as a hole pattern. It is another object of the present invention to provide a substrate inspection method. It is another object of the present invention to provide a technique that contributes to optimization of a semiconductor manufacturing process based on obtained defect information such as non-opening of a hole bottom. Still another object of the present invention is to provide a technology that contributes to improving the reliability of a semiconductor device by detecting and taking measures against process abnormality at an early stage in the management of a semiconductor manufacturing process.

  First, a method for inspecting a wafer surface charged to a positive polarity will be described. The principle of the present invention for detecting secondary electrons emitted from the hole bottom will be described with reference to FIG.

  When an image of a hole pattern is acquired by a conventional inspection apparatus using an electron beam, for example, when the irradiation energy of the electron beam is 500 eV (electron volts) and the aspect ratio is 4 or less, the secondary electron signal from the bottom of the opening hole 34 is easily detected, and open holes are observed as white and non-open holes are observed as black. However, when the aspect ratio is increased, the secondary electrons 34 from the bottom of the hole are mostly blocked by the side wall 35 as shown in FIG. For this reason, since the opening hole is also observed in black, a non-opening hole could not be detected.

  Therefore, before acquiring a secondary electron image for inspection, means for irradiating the wafer surface with an electron beam or the like in advance to charge the wafer surface 36 to a desired voltage is provided. As shown in FIG. 2B, when the wafer surface 36 is charged to a positive polarity, a part of the secondary electrons 34 emitted from the hole bottom are accelerated upward and can be detected efficiently. Furthermore, since the secondary electrons 34 emitted from the hole bottom can be accelerated, secondary electrons emitted from the sidewall 35 are further emitted when the secondary electrons 34 emitted from the hole bottom collide with the hole sidewall 35. A part 37 of the secondary electrons emitted from the side wall 35 is accelerated toward the opening and can be detected by the detector. As a result, the secondary electrons 35 emitted from the hole bottom of the high aspect hole can be extracted and detected, and information on the opening and non-opening of the hole bottom can be obtained. At this time, the inspectable aspect ratio and hole diameter are determined according to the charging voltage of the surface 36. Therefore, a means for controlling the wafer surface 36 to a desired charging voltage is provided.

  The charging voltage of the wafer surface 36 when inspecting the opening / non-opening of the bottom of the high aspect hole is determined by the aspect ratio, the hole diameter, and the type and thickness of the insulating film around the hole. For example, in order to inspect the opening / non-opening of the bottom of the hole having an aspect ratio of 10 formed in the silicon oxide film, it is necessary to charge the wafer surface 36 to 5 V or more. Means for determining the charging voltage was provided in accordance with a database stored in advance. In the present invention, it is desirable that the charging voltage of the substrate is set to 5 V or more and 50 V or less for a hole pattern having a step.

  A method for charging the wafer surface 36 to a desired positive voltage will now be described. In the case where the wafer surface is an insulating film using a silicon oxide film or an organic material, the charging electron beam 38 is irradiated with an electron beam with an irradiation energy of 100 eV or more and 1000 eV or less at which the secondary electron emission efficiency becomes 1 or more. The wafer charging electron optical system can also be used as the electron optical system irradiated when acquiring the inspection image. Also, means for generating an electric field on the upper surface of the wafer to control the charging voltage of the wafer surface 36 by applying an optimum voltage to the electrode 32 installed on the upper surface of the wafer was provided.

  In order to inspect a large area of a wafer or the like at high speed, an electron beam having a lower spatial resolution than an electron beam for image acquisition can be used as the wafer charging electron beam 38. Furthermore, as a method of scanning the wafer charging electron beam 38, the wafer surface 36 is divided during the wafer movement time by dividing the wafer into several inspection regions and alternately repeating the wafer charging and the secondary electron image acquisition. Means were provided for efficiently inspecting with positive polarity.

  Next, a method for inspecting holes using negative polarity charging will be described. The principle of detecting defects using negative polarity charging will be described with reference to FIG. When the surface is negatively charged, the normal hole portion 40 is observed darker than the surrounding oxide film portion as shown in FIG. At this time, in the case of the non-opening, the oxide film 41 remaining at the bottom is negatively charged, and in the normal hole and the non-opening hole, as shown in FIG. 3B and FIG. Is different. In a normal hole, the difference in negative charging voltage between the hole bottom and the surface 36 is large, so that secondary electrons emitted from the hole bottom are hardly emitted from the hole. On the other hand, since the non-opening hole bottom 41 is negatively charged, secondary electrons emitted from the hole bottom are more easily detected than normal holes. Since the detected secondary electrons have a higher signal intensity at the outer peripheral portion of the hole, the secondary electron image 41 of the non-open hole has a signal intensity at the outer peripheral portion of the hole that is higher than that of the normal hole 40 as shown in FIG. At the same time, the hole diameter on the secondary electron image is observed smaller than that of the normal hole 40. When the contact hole is tapered, the hole diameter is observed to be larger than that of the normal hole 40.

  At this time, the aspect ratio that can be inspected and the remaining film thickness of the hole bottom that can be detected are determined by the charging voltage of the surface. Therefore, means for controlling the surface to a desired negative charging voltage and means for detecting a difference in the size of holes in the secondary electron image are provided.

  When charging the wafer surface to a desired negative voltage, if the wafer surface is an insulating film using a silicon oxide film or organic material, the secondary electron emission efficiency is low as the electron beam irradiation energy at this time. An electron beam of 1000 eV or higher is irradiated. At this time, a means for irradiating a large current sufficient to charge the wafer surface negatively using an image acquisition electron source was provided. Further, in order to efficiently charge the wafer surface to the negative polarity, means for applying an optimum voltage to the electrode 32 installed on the upper surface of the wafer is provided. The electric field generated on the upper surface of the wafer enables secondary electrons generated from the wafer surface to be efficiently returned to the wafer surface, and the wafer surface is charged to a desired negative voltage using an image acquisition electron source. It became possible.

  As described above, by adjusting the irradiation energy of the electron beam and the voltage of the electrode 32 placed on the upper surface of the wafer 36, the wafer surface 36 can be controlled to an arbitrary positive and negative charging voltage by the same apparatus. Became. As a result, various semiconductor circuits can be inspected at high speed regardless of the circuit pattern and material of the semiconductor device.

  Next, a method for controlling the charging voltage on the wafer surface to a desired positive or negative voltage will be described. After moving to a chip for adjusting irradiation conditions, scanning and irradiating a charging electron beam, scanning and irradiating an image acquiring electron beam to acquire a secondary electron image. When acquiring the secondary electron image, the secondary electrons are detected using the energy filter 13. As this energy filter, an energy filter that detects secondary electrons that are above a certain threshold or below a certain threshold can be used.

  When acquiring an image using an energy filter that detects secondary electrons above a certain threshold, acquire a secondary electron image with the filter voltage of the energy filter 13 fixed, and then acquire a precharge and secondary electron image. The means for automatically measuring the charged voltage on the wafer surface was provided by moving the place where the energy filter is to be moved and fixing the energy filter threshold value to the second value and repeatedly acquiring the secondary electron image.

  As another method of measuring the charging voltage, a secondary electron image can be acquired while scanning the filter voltage of the energy filter 13, and the charging voltage can be measured from the obtained secondary electron image. A charging voltage was measured using these methods, and means for optimizing the energy, current value, and electrode voltage of the charging electron beam were provided so that the wafer surface had a desired charging voltage. Furthermore, a means for optimizing the irradiation condition of the electron beam when acquiring the secondary electron image is provided.

  After the adjustment of the charging electron beam and the secondary electron image acquisition electron beam, the actual inspection is performed. However, when acquiring the secondary electron image during the inspection, the secondary electron image is usually not used without using the energy filter 13. Can be obtained. However, for specific cases, a means for acquiring a secondary electron image using the energy filter 13 is provided. The setting value of the energy filter is provided with means for optimizing from the secondary electron image acquired at the time of the above-described charging voltage measurement. By acquiring the image by filtering the secondary electron energy, it becomes possible to detect the defect with high sensitivity.

  After acquiring a secondary electron image using these methods, a mechanism for detecting defects by comparing with a secondary electron image of the same pattern acquired in another region on the wafer was provided. Further, a mechanism for calculating the contrast of the hole portion and the size of the hole is provided, and a mechanism for automatically determining the type of defect from the contrast and size of the defective hole is provided. Furthermore, a means for displaying the determination results of these defects and the distribution of the defects in the wafer surface on a screen is provided.

  First, a method for detecting a defect from a secondary electron image acquired when charging with positive polarity will be described. When the wafer surface is charged positively, the secondary electron image of the normal hole is observed brightly. In the case of a non-opening, the oxide film remaining at the bottom is charged, so that it is observed darker than a normal hole. When the contact hole is tapered, the hole portion is bright and large. Means are provided for determining a defective hole from the difference in contrast and hole size and automatically determining the type of defect. Further, the thicker the oxide film remaining at the bottom, the darker the defect hole is observed. A means for calculating the film thickness remaining on the bottom from the brightness of the defective hole portion was provided.

  On the other hand, a method for detecting a short circuit defect in a semiconductor circuit by charging the wafer surface positively has been proposed. According to the present invention, the surface of the wafer is positively charged and non-opening inspection of holes can be performed. As a result, short-circuit defects and non-opening defects of semiconductor circuits can be inspected with the same apparatus.

  Next, a method for detecting defects when the wafer surface is difficult to be positively charged, such as a poly-Si mask, or when the material at the bottom of the hole is a material that does not flow current such as an insulating film. State. When such a wafer surface is charged positively, a secondary electron image of a normal hole is observed dark. In the case of a non-opening, the normal hole and the non-opening hole are observed smaller than the normal hole due to the change in the electric field of the opening. Means for automatically determining the type of the defect by determining the defective hole from the difference in the hole size was provided. A means for calculating the film thickness remaining at the bottom from the dimension of the defective hole was provided.

  Furthermore, a method for determining a defect from a secondary electron image acquired when the wafer surface is charged to a negative polarity will be described. When the wafer surface is charged negatively, the secondary electron image of normal holes is observed dark. In the case of a non-opening, the oxide film remaining at the bottom is charged, and the electric field of the opening changes, so that it is observed smaller than a normal hole. Further, when the contact hole is tapered, it is observed larger than the normal hole. Means for automatically determining the type of the defect by determining the defective hole from the difference in the hole size was provided. A means for calculating the film thickness remaining at the bottom from the dimension of the defective hole was provided.

  As a result, it is possible to inspect at high speed whether there is a defect such as opening / non-opening of the hole pattern. Furthermore, a mechanism is provided for finely adjusting the manufacturing conditions in the manufacturing process of the semiconductor device from the detected defect information. This mechanism makes it possible to estimate the cause of the defect from the type of defect and the distribution in the wafer surface and finely adjust the conditions for manufacturing the semiconductor device. Furthermore, a mechanism for adding a process for reducing defects of the semiconductor device to the semiconductor manufacturing process from the detected defect information is provided. Thereby, the semiconductor manufacturing process can be optimized at an early stage from the obtained defect information such as the non-opening of the hole bottom. Further, it is possible to detect a process abnormality at an early stage from the type of defect and the distribution of the defect in the wafer surface, and to estimate the cause of the defect at an early stage, thereby improving the reliability of the semiconductor device.

  ADVANTAGE OF THE INVENTION According to this invention, the board | substrate inspection apparatus and board | substrate inspection method which can perform the defect inspection of board | substrates, such as a semiconductor wafer which has a pattern with large steps, such as a hole pattern, at high speed and high precision are realizable. In particular, the process development period and yield improvement period in the semiconductor device manufacturing process can be greatly shortened, and the reliability and productivity of the semiconductor device can be improved.

  Embodiments of the present invention will be described below with reference to the drawings.

(Example 1)
In this embodiment, an example of a hole pattern inspection method and apparatus after dry etching will be described. The configuration of the semiconductor device inspection apparatus in this embodiment is shown in FIG.

  A semiconductor device inspection apparatus 1 includes an electron optical system 2, a stage mechanism system 3, a wafer transfer system 4, a vacuum exhaust system 5, an optical microscope 6, a control system 7, and an operation unit 8. The electron optical system 2 includes an electron gun 9, a condenser lens 10, an objective lens 11, a detector 12, an energy filter 13, a deflector 14 (for example, an EXB deflector), an electrode 32 on the upper surface of the wafer, and a wafer height detector 15. It is configured. The stage mechanism system 3 includes an XY stage 16, a holder (sample stage) 17 for holding and placing the wafer, a holder 17 and a retarding power source 19 for applying a negative voltage to the wafer 18. A position detector by laser length measurement is attached to the XY stage 16. In the wafer transfer system 4, the wafer 18 moves back and forth between the cassette mounting unit 20, the wafer loader 21, and the XY stage 16. The control system 7 includes a signal detection system control unit 22, a blanking control unit 23, a beam deflection correction control unit 24, an electron optical system control unit 25, a wafer height sensor detection system 26, a stage control unit 27, and an electrode control unit 33. It is configured. The operation unit 8 includes an operation screen and operation unit 28, an image processing unit 29, an image / inspection data storage unit (storage unit) 30, and an external server 31.

  The defect detection method will be described according to the inspection flow. FIG. 4 shows an inspection flow. First, the cassette shelf number of the wafer to be inspected is designated on the operation screen 28 (step 43). Then, information such as an aspect ratio, a hole diameter, and a material for forming a pattern is input as information on the wafer to be inspected. Further, conditions such as electron beam irradiation energy, beam current, and beam diameter are input as irradiation conditions for the charging electron beam 38, and a charging voltage for the wafer surface is designated. Further, the inspection region, electron beam irradiation energy, beam current, scanning speed, and scanning size when acquiring a secondary electron image are input as inspection conditions (step 44). Further, the inspection conditions stored in a database can be used from the information of the wafer to be inspected. Information on the wafer to be inspected, electron beam irradiation conditions, and inspection conditions can also be input from the external server 31.

  As an electron beam irradiation condition for charging the wafer surface to a positive polarity, for example, the irradiation energy can be set to a value of 100 eV or more and 1000 eV or less at which the electron beam emission efficiency is 1 or more. It is desirable to set the irradiation energy at the time of inspection to the same value as the wafer charging electron beam. By making the irradiation energy at the time of inspection equal to the irradiation energy of the electron beam for charging the wafer, the electron beam for charging the wafer and the electron beam for acquiring the secondary electron image are irradiated using one electron source. It has become possible. Further, by irradiating with a relatively low energy electron beam, it becomes possible not only to charge the wafer surface positively but also to reduce the damage given to the semiconductor device for inspection.

  The set value of the charging voltage of the wafer is mainly determined from the aspect ratio of the hole pattern. FIG. 5 shows the charging voltage dependence of the brightness of the secondary electron image in the hole. Secondary electrons from the bottom of the hole up to an aspect ratio of 4 can be obtained even when the charging voltage is 5 V or less, but when the aspect ratio is 8 or more, it is necessary to charge to 10 V or more as shown in FIG. . It is also possible to determine the setting value of the charging voltage from the database of the aspect ratio dependence of the necessary charging voltage acquired in advance. When the setting of the inspection conditions is completed, the inspection is started. The inspection conditions can be set in advance using an offline computer.

  When the inspection is started, the wafer 18 is transferred to the inspection apparatus. After the wafer 18 is transferred from the cassette into the wafer loader, the wafer loader is evacuated. Thereafter, the sample is introduced into an inspection chamber that has already been evacuated (step 45).

  After the wafer loading is completed, the electron beam irradiation conditions at the time of acquiring the secondary electron image are set in each unit by the electron optical system control unit 25 based on the inputted inspection conditions. Then, the stage 16 moves so that the beam calibration pattern is placed under the electron optical system 2 on the wafer holder 17 (step 46). Thereafter, an electron beam image is obtained, and the contrast, etc. of the image are adjusted by adjusting the focus, astigmatism and detection system settings (step 47). At the same time, the height of the wafer 18 is obtained from the height detector 15, the correlation between the height information and the focusing condition of the electron beam is obtained by the wafer height detection system 26, and focusing is performed every time an electron beam image is acquired thereafter. Therefore, it is possible to automatically adjust to the in-focus condition from the result of the wafer height detection.

  When the image adjustment at the time of acquiring the secondary electron image is completed, the irradiation condition of the charging electron beam 38 is adjusted (step 48). First, the stage 16 moves so that the charging voltage adjustment pattern comes under the electron optical system 2. The beam diameter of the charging electron beam 38 can be 100 to 1000 times larger than that of the secondary electron image acquisition beam.

  FIG. 6 shows an example of a scanning method of the charging electron beam 38 and the secondary electron image acquisition beam. After irradiating the first region 57 with the charging electron beam in a row, a secondary electron image of the second region 58 included in the first region is acquired while scanning the secondary electron image acquiring electron beam. The first region 57 is a sufficiently wide region 58 including the second region. At this time, the secondary electron image is acquired using the energy filter 13.

  As an example, an energy filter of a type that acquires secondary electrons having a certain threshold value or more was used. In this energy filter, electrons having energy higher than the voltage applied to the filter are detected. First, the secondary electron image of the second region 58 is acquired by setting the threshold value V0. The signal intensity of the hole portion and the oxide film portion of the secondary electron image is stored in the memory 30. Next, a secondary electron image of the third region 59 that is included in the first region 57 and does not include the second region is acquired. At this time, the energy filter 13 is set to the threshold value V1. The signal intensity of the hole portion and the oxide film portion of the secondary electron image is stored in the memory 30. The above-described process of acquiring the secondary electron image of the nth region 60 included in the first region 58 with the filter voltage Vn is repeated until the filter voltage at which the signal intensity of the oxide film portion changes is obtained.

  A method for setting the filter voltage Vn at this time will be described with reference to FIG. The signal 61 from the oxide film charged to a certain voltage changes as shown in FIG. 7 depending on the filter voltage. At V0, secondary electrons of all energies are acquired, so the signal intensity is the maximum value I0. Since most secondary electrons are not detected at V1, the signal intensity is the minimum value I1. The values of V0 and V1 are set in the range of 50V to -20V, for example. Further, the value from V2 to Vi is set between V0 and V1, for example, at 10V intervals. When the signal intensity becomes (I0 + I1) / 2 or more and I0 or less, two more points are set, for example, at 5V intervals. When the signal intensity is not less than I1 and not more than (I0 + I1) / 2, Vn + 5V is set as Vn + 1. From these signal intensities, Vm which is (I0 + I1) / 2 can be obtained. The charging voltage of the wafer is calculated from the shift amount from the filter voltage dependency curve of the signal intensity 62 from the substrate Si acquired in advance.

  While measuring the charging voltage in this manner, the charging electron beam is adjusted until a desired charging voltage is obtained (step 49). A charging voltage is measured using such a method, and means for optimizing the current value of the charging electron beam 38, the electrode voltage 32, and the beam energy are provided so that the wafer surface has a desired charging voltage.

Here, when the inspection is actually performed, it is also possible to perform the inspection using the energy filter 13. The set value of the filter voltage at the time of inspection can be determined at the time of charging voltage measurement. A method for determining the set value of the filter voltage will be described. The signal intensity I _SiO2 from the oxide film and the signal intensity I _Hole from the hole part are calculated from the secondary electron image acquired at the time of measuring the charging voltage.

FIG. 8 shows the dependence of the signal intensity 64 of the oxide film and the signal intensity 63 from the hole portion on the filter voltage. Further, the contrast C = (I _Hole −I _SiO2 ) / I _SiO2 is calculated, and the filter voltage V _MAX at which this becomes the maximum is determined as a setting value at the time of inspection. The determined set value is stored in the memory 30.

  Thereafter, when the electron beam irradiation condition 39 and the image adjustment are completed, alignment is performed from two points on the wafer 18 (step 50). The wafer 18 to be inspected is arranged at a predetermined first coordinate under the optical microscope 6 registered in advance, and an optical microscope image of the circuit pattern formed on the wafer 18 to be inspected is displayed on the monitor in the operation screen 28. Then, it is compared with an optical microscope image of an equivalent circuit pattern at the same position stored in advance for position rotation correction, and a position correction value of the first coordinate is calculated (step 51).

  Next, the first coordinate is switched from the optical microscope image to the electron beam image. Since the optical microscope 6 and the electron optical system 2 are arranged at a predetermined distance and the distance is stored in the apparatus as a known parameter, the optical microscope image and the electron beam image are arbitrarily switched. be able to. Also for the electron beam image, an image of a circuit pattern is stored in advance for position rotation correction in the same manner as the optical microscope image, and the stored electron beam image is compared with the acquired electron beam image to obtain an optical microscope. A more precise position correction value of the first coordinate is calculated.

  Next, the circuit pattern is moved to a second coordinate where a circuit pattern equivalent to the first coordinate exists at a certain distance from the first coordinate, and an optical microscope image is acquired in the same manner and stored for position rotation correction. Compared with the image, the position correction value and the rotational deviation amount with respect to the first coordinate are calculated from the second coordinate. Further, the second coordinate is similarly switched to the electron beam image and compared with the electron beam image of the circuit pattern stored in advance, and a precise position correction value of the second coordinate is calculated. Based on the calculated rotational deviation amount and positional deviation amount, the scanning deflection position of the electron beam is corrected by the control unit 25 and the electron beam deflection signal correction unit 24 so as to correspond to the coordinates of the circuit pattern.

  When the alignment of the wafer 18 to be inspected is completed in this way, an electron beam image is obtained after the wafer 18 to be inspected is irradiated with the charging electron beam 38, and the brightness is adjusted (step 52). Based on the inspection condition file, when acquiring an electron beam image, the electron beam current, the electron beam irradiation energy, the voltage applied to the energy filter 13, the detector 12 to be used, and the gain of the detection system are set. Set parameters and acquire an electron beam image.

  When this brightness adjustment is completed, an inspection is executed (step 53). The inspection area is designated in advance in the inspection condition file. When irradiating the wafer charging electron beam 38, the wafer surface is efficiently divided during the wafer movement time by dividing the wafer into several inspection areas and alternately repeating the wafer charging and the secondary electron image acquisition. It can be charged positively.

  FIG. 9 shows an example of an electron beam scanning method. First, the first irradiation region 66 is irradiated and scanned as shown in FIG. 9A under the condition that the wafer charging electron beam 38 has been set. Next, the electron beam 39 for image acquisition is scanned in the first scanning region 67 as shown in FIG. 9B to acquire a secondary electron image. Next, as shown in FIG. 9C, the second irradiation region 68 is irradiated with the wafer charging electron beam 38, and the second scanning region 69 is scanned with the image acquisition electron beam 39. At this time, the charging electron beam 38 can be irradiated while moving the wafer. Thus, since the charging electron beam 38 can be irradiated during the wafer moving time, it is possible to perform inspection without taking extra time to charge the wafer.

  As shown in FIG. 9, the entire surface of the wafer can be inspected by repeating the above operation. At the time of inspection, an electron beam is irradiated onto a predetermined area of the wafer 18 to be inspected while continuously moving the XY stage 16, and an image signal is compared with a signal stored in the storage unit 30 while sequentially forming an electron beam image. However, images are sequentially stored in the storage unit 30. In such inspection, the detector 12 is set in advance by the inspection condition file 204. It is also possible to apply a voltage to the energy filter 13 arranged in front of the detector 12.

Next, a hole defect determination method will be described. For example, when the film material is a silicon oxide film (SiO ₂ ), the defect determination is performed by the following method after acquiring the secondary electron image.

  FIG. 10 shows an example of a secondary electron image (a) and a defect determination flow (b) of a pattern in which contact holes are formed. The non-opening hole 71 shown in FIG. 10A is observed darker than the opening hole 70. On the other hand, the defect hole 72 having a tapered shape is brighter than the opening hole 70, and the size of the hole is observed to be large.

  FIG. 11 shows the dependence of the contrast of the hole portion on the remaining film thickness. The remaining film thickness 0 indicates the contrast of the opening hole. Since the non-opening hole 71 is observed darker than the opening hole 70, the non-opening hole 71 can be determined as a defect. At this time, since the contrast of the non-opening hole 71 becomes dark according to the remaining film thickness, it is also possible to estimate the remaining film thickness of the non-opening hole from the contrast of the hole portion.

  Defect determination is performed from the acquired secondary electron image as follows. First, as shown in FIG. 10B, the shapes of the secondary electron images are compared (step 73), and if the shape does not match the referenced secondary electron image, it is determined that the shape is abnormal. Further, it is compared with a secondary electron image referring to the contrast of the hole portion (step 74). When the contrast is similar to the reference image, it is determined as a normal hole. When the brightness of the hole portion is darker than that of the reference image, it is determined that there is an etch residue or that there is foreign matter in the hole. When the contrast of the hole portion is brighter than that of the reference image, it is determined as a tapered shape. Thereby, the non-opening hole 71 is determined as a non-opening defect, and the tapered hole 72 is determined as a tapered shape.

  Furthermore, it is possible to estimate the remaining film thickness from the contrast of the non-opening holes from the data stored in advance in the storage unit 30 or the external server 31 (step 75). As a database of contrast change due to the remaining film thickness, it is possible to search in accordance with parameters such as hole aspect ratio, hole diameter, charging voltage, and insulating film material.

  In some cases, different types of bonding are included in the contact bottom on the wafer to be inspected. At this time, since the resistance at the bottom of the opening hole varies depending on the type of junction, the brightness of the hole varies depending on the type of junction. In such a case, holes having the same type of bonding are compared and inspected by comparing the same type of patterns from the pattern arrangement information on the wafer. In particular, when a pn junction having an n diffusion layer as an upper layer is formed at the bottom of the contact, the contrast from the hole is lowered.

  FIG. 12 shows a model diagram when a pn junction is formed. In the figure, 76 is an interlayer insulating film, 77 is an n diffusion layer, 78 is a p-well, 79 is a silicon substrate, and 80 is a primary electron beam.

  At the hole bottom without a pn junction, when an electron beam is irradiated under the condition that the electron beam emission efficiency is 1 or more, electrons are supplied from the substrate, so that the voltage at the hole bottom is 0V. However, when an electron beam is irradiated onto the n diffusion layer 77, electrons are not supplied from the substrate 79 side for the pn junction, and the hole bottom is charged, so that the contrast is lowered. In such a case, the contrast can be improved by optimizing the electron beam energy.

  For example, a case where a depletion layer region having a junction depth L and a width W is formed in the junction region will be described. The penetration depth R of electrons is determined by the energy of electrons when the atomic weight (A), atomic number (Z), and density (ρ) of the sample are determined. For example, when an electron beam with an incident energy of 500 eV is irradiated to Si, the penetration depth R of the electron beam is 10 to 20 nm. The higher the energy of the electron beam, the deeper the electron penetration depth R. When the penetration depth R of the electron beam is shallow and electrons do not penetrate into the depletion layer region, the surface is positively charged when the electron beam 80 is irradiated onto the n diffusion layer 77. Here, when the electron beam irradiation energy and the surface charging voltage are adjusted so that the electron beam penetrates into the depletion layer, electron-hole pairs are generated in the depletion layer. Go down. As a result, since electrons are supplied from the substrate 79, charging at the hole bottom is suppressed, and the secondary electron contrast in the hole portion can be improved.

  In some cases, a conductive material such as a Poly Si mask is used on the surface of the wafer to be inspected. At this time, it is difficult to charge the wafer surface to 5 V or more. On the other hand, there are cases where the hole bottom is an insulating film such as SiN or the junction resistance is high, and it is difficult to supply current to the contact bottom. At this time, since the hole bottom is charged by the electron beam irradiation, it is difficult to pull up and detect the secondary electrons emitted from the hole bottom.

  In such a case, a non-opening inspection method will be described. When the wafer surface is irradiated with an electron beam, even when the wafer surface is charged positively, the secondary electron image of the normal hole 40 is observed darkly as shown in FIG. In the case of the non-opening, the film 41 remaining at the bottom is charged more than the bottom of the normal hole 40, and the electric field of the opening changes, so that it is observed smaller than the normal hole. Further, the size of the defect hole is observed to be smaller as the film thickness remaining at the bottom increases (41 in FIG. 3). When the contact hole has a tapered shape, it is observed larger than the normal hole (42 in FIG. 3). Means were provided for automatically determining the type of defect by determining the defective hole from the difference in the observed hole size of the secondary electron image. Means are provided for calculating the film thickness remaining at the bottom from the size of the defective hole based on the relationship between the hole size stored in advance and the defective hole.

  The location determined to be a defect using the method described above is automatically recorded with the coordinates of the defect location, the signal value, the type of defect, the size of the defect, etc., as shown in FIG. A mark with a defect is displayed for each type at a corresponding position on the wafer map. When the inspection of the area specified in the inspection condition file is completed, the defect portion can be imaged again (step 54 in FIG. 4).

  As described above, the non-opening of holes can be inspected by charging the wafer surface positively. On the other hand, a technique for detecting a short circuit defect in a semiconductor circuit at high speed by using positive charging has been proposed. This makes it possible to detect hole non-openings and short-circuit defects with high speed and high sensitivity using the same inspection apparatus. Further, as described later in Example 2, by using this inspection apparatus, the electron beam irradiation energy and the electrode voltage placed on the wafer surface are adjusted and controlled to the desired negative charging voltage, thereby the same. This makes it possible to control the wafer surface to the desired positive and negative charging voltages. As a result, various types of semiconductor circuit defects can be detected regardless of the type and material of the circuit pattern of the semiconductor device.

  FIG. 14 shows a schematic cross-sectional view of a DRAM as an example of a semiconductor device having a hole pattern to be inspected according to the present invention. The active region formed on the semiconductor substrate 84 by the field oxide layer 83 is divided. A gate electrode 85 is formed above the active region and is covered with a spacer 86. After the first insulating layer 87 such as an oxide film is formed on the surface, the first contact hole 88 is formed by dry etching. Thereafter, the contact hole 88 is formed as a direct contact for the bit line. Next, after forming a bit line, a second insulating layer 89 is formed, and a second contact hole 90 is formed. As an example of the inspection according to the present invention, the direct contact hole 88 and the hole 89 formed on the wiring in the DRAM manufacturing process shown in FIG. 14 are inspected. Furthermore, it is possible to inspect holes formed on other wirings. Or it can also carry out after the development process of the mask pattern for forming these hole patterns. In the figure, 91 is a p diffusion layer, 92 is an n diffusion layer, 93 is an N well, 94 is a P well, and 95 is a semiconductor substrate.

  As described above, the wafer including the contact hole pattern can be inspected, and the defect can be automatically determined. Furthermore, a mechanism for automatically specifying a defect generation process and factors from a previously created database is provided for some defect generation factors based on the types of defects and the distribution in the wafer surface. Furthermore, a mechanism for finely adjusting the processing conditions of the defect generation process was provided. Further, a mechanism for reducing defects on the wafer to be inspected by performing additional processing on the non-inspection wafer from the detected defect information is provided.

  For example, an example of a mechanism for finely adjusting a semiconductor manufacturing process condition from an inspection result will be described. When concentric circles are formed on the wafer or non-opening defects frequently occur on the entire surface, the dry etching time for hole processing can be finely adjusted according to the remaining film thickness of the non-opening defects. If a non-opening defect or a tapered defect occurs in the specific pattern, fine adjustment of lithography conditions and reticle replacement are performed. When defects frequently occur due to the density of the pattern, such as around the semiconductor memory mat, fine adjustment of the dry etch gas flow rate or cleaning of the etcher is performed. If foreign matter is frequently generated, cleaning of the semiconductor manufacturing apparatus and fine adjustment of dry etching conditions are performed.

  On the other hand, the inspection wafer is provided with a mechanism for adding processing capable of reducing defects. When non-openings due to lack of dry etching occur frequently, dry etching can be added. If there are many foreign objects, cleaning can be added. As a result, it has become possible to identify the process of occurrence and its factors at an early stage, and to provide feedback to the semiconductor manufacturing process including the dry etching process at an early stage.

(Example 2)
In this embodiment, as an example of a hole pattern inspection method after dry etching and an apparatus, a method of inspecting a surface of an oxide film charged to a negative polarity will be described. In this embodiment, the semiconductor inspection apparatus shown in FIG. 1 can be used.

  When the wafer surface 36 is charged to a desired negative voltage, when the wafer surface 36 is an insulating film using a silicon oxide film or an organic material, the secondary energy is used as the wafer charging electron beam irradiation energy. Irradiation with an electron beam of 1000 eV or more with an electron emission efficiency of 1 or less is performed. The irradiation energy of the image acquisition electron beam 39 is preferably set to the same value as the wafer charging electron beam. By making the irradiation energy at the time of inspection and the irradiation energy of the electron beam for charging the wafer comparable, the electron beam for charging the wafer and the electron beam for acquiring the secondary electron image are irradiated using one electron source. It has become possible. Further, in order to efficiently charge the wafer surface to the negative polarity, an optimum voltage is applied to the electrode 32 installed on the upper surface of the wafer.

  A method for setting the electron beam irradiation conditions such as the beam energy, beam current, and electron beam irradiation time, and the electrode voltage will be described. Alternatively, these set values can also be read from a previously stored inspection condition data file. First, the set value of the charging voltage of the wafer is mainly determined from the aspect ratio of the hole pattern.

  In the inspection flow shown in FIG. 4, a method for setting the electron beam irradiation conditions so as to satisfy a desired negative charging voltage after the wafer loading (step 45) is described. As an example, a method of acquiring a secondary electron image using an energy filter of a method of acquiring secondary electrons of a certain threshold value or more and measuring a charging voltage was used. First, the stage 16 moves so that the charging voltage adjustment pattern comes under the electron optical system 2. Therefore, the secondary electron image of the first region is acquired by setting the threshold value V0. The signal intensity of the hole portion and the oxide film portion of the secondary electron image is stored in the storage unit 30.

  Next, the energy filter acquires the secondary electron image of the second region by setting the threshold value V1. The signal intensity of the hole portion and the oxide film portion of the secondary electron image in the second region is stored in the storage unit 30. The above process of acquiring the secondary electron image of the nth region included in the first region with the filter voltage Vn is repeated until the filter voltage at which the signal intensity 61 of the oxide film portion changes is obtained. As an example of the method for setting the filter voltage Vn at this time, the method described in the first embodiment can be used. From these signal intensities, Vm which is (I0 + I1) / 2 can be obtained.

  The wafer charging voltage is calculated from the shift amount from the filter voltage dependency curve of the signal intensity from the substrate Si acquired in advance. The charging voltage is repeatedly measured while changing the electron beam irradiation conditions, and the electron beam is adjusted until a desired charging voltage is obtained. Using this method, the charging voltage is measured, and the current value, irradiation time, beam energy, and electrode voltage of the wafer charging electron beam and image acquisition electron beam are optimized so that the wafer surface has the desired charging voltage. Means were provided.

  Thereafter, when the electron beam irradiation conditions and image adjustment are completed, wafer alignment (step 50), calibration (step 51), and brightness adjustment (step 52) are performed, and inspection is executed (step 53). At the time of acquiring a secondary electron image used for inspection, it is possible to improve the detection sensitivity by applying a voltage to the energy filter 13 arranged in front of the detector 12.

  Next, a hole defect determination method will be described. When the wafer surface is negatively charged, the secondary electron image of the normal hole 40 is observed dark as shown in FIG. In the case of the non-opening hole 41, the oxide film remaining at the bottom is charged and the electric field in the opening changes, so that it is observed smaller than the normal hole. Further, the size of the defective hole such as the non-opening hole 41 is observed to be smaller as the film thickness remaining at the bottom increases. When the contact hole has a tapered shape (42), it is observed larger than the normal hole. Means were provided for automatically determining the type of defect by determining the defective hole from the difference in the observed hole size of the secondary electron image. Means are provided for calculating the film thickness remaining at the bottom from the size of the defective hole based on the relationship between the hole size stored in advance and the defective hole.

  In some cases, different types of bonding are included in the contact bottom on the wafer to be inspected. At this time, since the resistance at the bottom of the opening hole varies depending on the type of bonding, the size of the hole varies depending on the type of bonding. In such a case, holes having the same type of bonding are compared and inspected by comparing the same type of patterns from the pattern arrangement information on the wafer.

  The location determined as a defect by inspection is automatically recorded with the coordinates of the defect location, the signal value, the type of defect, the size of the defect, and the like. FIG. 13 shows the results of the above inspection. In this inspection, a distribution 82 of non-opening defects and a distribution 83 of abnormal shape defects were detected on the wafer 18. A mark with a defect is displayed at a corresponding position on the wafer map in the operation screen 28, and a mark is displayed for each type based on the classification result. When the inspection of the area specified in the inspection condition file is completed, the defect portion can be imaged again (step 54 in FIG. 4).

  As described above, it is possible to inspect a wafer including a contact hole pattern by charging the wafer negatively, and automatic defect determination is possible. As a result, it became possible to inspect a wafer to be inspected having a material or circuit pattern that is difficult to be charged to a positive voltage as shown in the first embodiment.

  Thus, by using the methods according to these embodiments, it is possible to inspect for the presence or absence of defects such as opening / non-opening of the hole pattern at high speed in the various types of patterns after the dry etching process. became. As a result of non-destructive evaluation of the openability of the deep hole bottom, it became possible to manufacture the semiconductor by returning the wafer to the subsequent process after the inspection of the wafer extracted during the manufacturing process was completed. In addition, since the opening inspection can be performed before the wiring process, the dry etching process development period can be greatly shortened. In addition, defect types, wafer surface distribution, and defect positions can be obtained at high speed, process abnormalities can be detected at an early stage, and defect generation factors can be easily estimated in a short period of time.

  In the above embodiment, the case of using an electron beam has been described. However, the present invention can also be applied to a charged particle beam other than an electron beam, for example, an ion beam.

The block diagram which shows an example of the semiconductor inspection apparatus of this invention. Explanatory drawing of the secondary electron detection principle generated from the hole bottom used by this invention. Explanatory drawing of the defect detection principle by the negative charge used by this invention. The figure which shows an example of the test | inspection flow in this invention. The figure which shows the charging voltage dependence of the brightness of the secondary electron image of a hall | hole part. Explanatory drawing which shows an example of a beam scanning system. The figure which shows an example of the setting method of a filter voltage. The figure which shows the filter voltage dependence of the signal strength of an oxide film, and the signal strength of a hole part. Explanatory drawing which shows an example of a beam scanning system. The figure which shows an example of the secondary electron image (a) of a contact hole pattern, and a defect determination flow (b). The figure which shows the remaining film thickness dependence of the contrast of a hole pattern. Explanatory drawing at the time of forming a pn junction. The figure which shows an example of the defect distribution displayed on the wafer map. 1 is a schematic cross-sectional view showing an example of a semiconductor device having a hole pattern inspected according to the present invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Inspection apparatus, 2 ... Electro-optical system, 3 ... Stage, 4 ... Wafer conveyance system, 5 ... Vacuum exhaust system, 6 ... Optical microscope, 7 ... Control system, 8 ... Operation part, 9 ... Electron gun, 10 ... Condenser Lens, 11 ... Objective lens, 12 ... Detector, 13 ... Energy filter, 14 ... Deflector, 15 ... Height sensor, 16 ... XY stage, 17 ... Wafer holder, 18 ... Wafer, 19 ... Retarding power supply, 20 ... Wafer Cassette, 21 ... Wafer loader, 22 ... Signal detection system control unit, 23 ... Blanking control unit, 24 ... Beam deflection correction unit, 25 ... Electro-optical system control unit, 26 ... Height detection system, 27 ... Stage control unit, 28 Operation screen, 29 Image processing unit, 30 Data holding unit, 31 External server, 32 Electrode, 33 Electrode control unit, 34 Secondary electron from hole bottom, 35 Side wall, 36 Wafer surface, 37 ... Secondary electrons emitted from the sidewall, 38 ... Wafer charging electron beam, 39 ... Image acquisition electron beam, 40 ... Normal 41 ... Non-opening hole 42 ... Tapered hole 43 ... Wafer set 44 ... Inspection condition input 45 ... Load 46 ... Stage movement 47 ... Beam calibration 48 ... Charging electron beam adjustment 49 ... Beam correction, 50 ... Alignment, 51 ... Calibration, 52 ... Adjustment, 53 ... Inspection, 54 ... Image acquisition, 55 ... Result output, 56 ... Unload, 57 ... First region, 58 ... Second region, 59 ... third region, 60 ... n-th region, 61 ... signal from oxide film, 62 ... signal from substrate Si, 63 ... signal intensity at hole, 64 ... signal intensity at surrounding oxide film, 65 ... contrast , 66 ... a first irradiation area of the charging electron beam, 67 ... a first scanning area of the image acquisition beam, 68 ... a second irradiation area of the charging electron beam, 69 ... a second of the image acquisition beam Scanning region, 70 ... open hole, 71 ... non-open hole, 72 ... tapered hole, 73 ... shape comparison, 74 ... Comparison of Ntrust, 75 ... Estimation of remaining film thickness, 76 ... Interlayer insulation film, 77 ... N diffusion layer, 78 ... P well, 79 ... Silicon substrate, 80 ... Primary electron beam, 81 ... Electron range, 82 ... Non Distribution of opening defect, 83 ... Distribution of abnormal shape defect, 84 ... Field oxide layer, 85 ... Gate electrode, 86 ... Spacer, 87 ... First insulating layer, 88 ... First contact hole, 89 ... Second insulating layer 90 ... second contact hole, 91 ... p diffusion layer, 92 ... n diffusion layer, 93 ... N well, 94 ... P well, 95 ... semiconductor substrate.

Claims (4)

An electron beam apparatus that inspects the opening pattern by irradiating a sample formed with a pattern including a plurality of opening patterns with a primary electron beam, detecting secondary electrons generated,
An electron optical system for detecting the secondary electrons by irradiating the primary electron beam, a holder for holding the sample, an electron optical system control means for controlling an electron beam irradiation condition of the electron optical system, and Image processing means for forming an image of the irradiation region of the primary electron beam based on a signal of detected secondary electrons,
The electron optical system includes means for charging the sample positively or negatively,
The opening pattern includes a normal hole pattern, a non-opening hole pattern, or a tapered pattern,
The image processing means includes
Calculate the dimension of the opening pattern based on the image of the opening pattern charged to the positive or negative polarity,
When the sample is negatively charged,
If the size is smaller than the pattern size of the normal Hall is determined that the aperture pattern is non-opening pattern, there are patterns of tapered over shape when the size is larger than the pattern size of the normal hole to the opening pattern Then ,
When the sample is positively charged,
When the contrast of the opening pattern is darker than the contrast of the normal hole pattern, the opening pattern is determined to be a non-opening hole pattern, and when the contrast of the opening pattern is brighter than the contrast of the normal hole pattern, the taper is tapered. An electron beam apparatus characterized by determining that a pattern having a shape exists . The electron beam apparatus according to claim 1,
The sample is a semiconductor wafer in which a bond is formed at the bottom of the opening pattern ,
The electron beam apparatus characterized in that the image processing means determines the defective hole by using pattern arrangement information of the semiconductor wafer and comparing opening patterns formed with the same type of junction. The electron beam apparatus according to claim 1,
The electron optical system includes an objective lens for focusing the primary electron beam on the sample, an electrode disposed between the holder and the objective lens, and means for applying a negative potential to the holder. An electron beam apparatus characterized by that. The electron beam apparatus according to any one of claims 1 to 3,
The sample is a semiconductor wafer;
The electron beam apparatus further comprises a monitor for displaying the distribution of the determined defective holes in the wafer surface.

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