JP4144225B2

JP4144225B2 - Diode and manufacturing method thereof

Info

Publication number: JP4144225B2
Application number: JP2002020135A
Authority: JP
Inventors: 憲司河野
Original assignee: Denso Corp
Current assignee: Denso Corp
Priority date: 2002-01-29
Filing date: 2002-01-29
Publication date: 2008-09-03
Anticipated expiration: 2022-01-29
Also published as: JP2003224133A

Description

【０００１】
【発明の属する技術分野】
本発明は、ダイオードおよびその製造方法に関するもので、特に半導体装置の入出力保護に用いられるＰＮ接合ダイオードとその製造方法に関するものである。
【０００２】
【従来の技術】
半導体装置では、静電気放電（ElectroStatic Discharge、ＥＳＤ）やサージ電圧・電流によって半導体装置が破壊されるのを防止するため、半導体装置の入出力保護素子として、従来、主にＰＮ接合ダイオードが使用されてきた。この種のＰＮ接合ダイオードには、例えば図１４に示すようなＰＮ接合ダイオードがある。
【０００３】
図１４（ａ）は従来のＰＮ接合ダイオードの平面図であり、図１４（ｂ）は図１４（ａ）におけるＡ−Ａ’線に沿った拡大断面図である。
【０００４】
図１４（ａ），（ｂ）に示す従来のＰＮ接合ダイオードでは、図１４（ｂ）からわかるように、低濃度Ｎ型シリコン（半導体）基板１にベースとなるＰ型高濃度拡散領域２が配置され、そのベースの両側にエミッタとなるＮ型高濃度拡散領域３ａ，３ｂが配置されており、ベースとエミッタの間の半導体部分がＰＮ接合領域４ａ，４ｂとなって、ＰＮ接合ダイオードが構成されている。図１４（ａ）の平面図においては、Ｐ型高濃度拡散領域２とＮ型高濃度拡散領域３ａ，３ｂは、それぞれ破線で示されている。
【０００５】
Ｐ型高濃度拡散領域２とＮ型高濃度拡散領域３ａ，３ｂには、それぞれ、図１４（ｂ）に示すように、ＢＰＳＧからなる層間絶縁膜５の開口部を介して、Ａｌ電極７ａ，７ｂが接続されている。図１４（ａ）の平面図に示すように、Ｐ型の高濃度拡散領域２に接続するベース電極は７ａであり、Ｎ型の高濃度拡散領域３ａ，３ｂはエミッタ電極７ｂで互いに接続されている。図１４（ａ）の平面図において、各電極７ａ，７ｂは実線で示されており、各高濃度拡散領域２，３ａ，３ｂと各電極７ａ，７ｂのコンタクト領域７１，７２，７３は、点線で示されている。また、ダイオード全体は窒化珪素（ＳｉＮ）からなる保護膜１０によって被覆され、保護膜１０の開口部に形成された図１４（ａ）に実線で示すパッド７０ａ，７０ｂを介して、外部に接続される。
【０００６】
図１４（ａ）の平面図において、各高濃度拡散領域２，３ａ，３ｂは約１０μｍ×５００μｍの矩形状である。半導体装置の入出力保護素子としてのＰＮ接合ダイオードでは、大きなサージ電流に対応するために、通常は図１４に示すＰＮ接合ダイオードが数１０個並列接続される。
【０００７】
次に、図１４に示したＰＮ接合ダイオードの製造方法を、図１５に従って説明する。図１５は、図１４（ａ）におけるＡ−Ａ’線に沿った拡大断面を、製造工程順に示したものである。
【０００８】
図１５（ａ）に示すように、低濃度Ｎ型シリコン（半導体）基板１上に、ベースに対応した第１のマスク１００を形成し、Ｐ型の不純物を高濃度にイオン注入して、ベースとなるＰ型高濃度拡散領域２を形成する。
【０００９】
次に、図１５（ｂ）に示すように、ベースに対応した第１のマスク１００を除去した後、エミッタに対応した第２のマスク１０１を形成し、Ｎ型の不純物を高濃度にイオン注入して、エミッタとなるＮ型高濃度拡散領域３ａ，３ｂを、ベースとなるＰ型高濃度拡散領域２の両側に形成する。これにより、Ｐ型高濃度拡散領域２とＮ型高濃度拡散領域３ａ，３ｂの間の半導体部分が、ＰＮ接合領域４ａ，４ｂとなる。
【００１０】
次に、図１５（ｃ）に示すように、エミッタに対応した第２のマスク１０１を除去した後、層間絶縁膜５としてＢＰＳＧ膜を全面に積層し、Ｐ型高濃度拡散領域２とＮ型高濃度拡散領域３ａ，３ｂに接続するための開口部６１，６２，６３を形成する。
【００１１】
次に、図１５（ｄ）に示すように、全面にＡｌ膜を積層した後、所定形状にパターニングして、ベース電極７ａおよびエミッタ電極７ｂを形成する。
【００１２】
次に、図１５（ｅ）に示すように、全面に保護膜１０としてのＳｉＮ膜を積層した後、外部に接続するためのパッド用開口部を形成して、図１４に示したＰＮ接合ダイオードが完成する。
【００１３】
【発明が解決しようとする課題】
ＥＳＤのようなサージがエミッタである図１４のＮ型高濃度拡散領域３ａ，３ｂに印加されると、即座にＰＮ接合領域４ａ，４ｂが逆バイアスされてアバランシェが発生し、サージ電流がエミッタであるＮ型高濃度拡散領域３ａ，３ｂからベースであるＰ型高濃度拡散領域２に流れる。図１４の構造のＰＮ接合ダイオードでは、ベースのＰ型高濃度拡散領域２とエミッタのＮ型高濃度拡散領域３ａ，３ｂが分離されているため、その断面においてＰＮ接合領域４ａ，４ｂに幅Ｌ_ca，Ｌ_cbがある。この幅Ｌ_ca，Ｌ_cbは、設計段階においては、等しく設定される。
【００１４】
しかしながら、図１４の構造のＰＮ接合ダイオードでは、図１５に示したように、Ｐ型高濃度拡散領域２とＮ型高濃度拡散領域３ａ，３ｂを、それぞれ専用のホトマスクを使って、別々にイオン注入して形成している。従って、マスクのアラインメントずれが起きると、図１４（ｂ）に示したように、ＰＮ接合領域４ａ，４ｂの幅Ｌ_ca，Ｌ_cbが異なってしまう（図では、Ｌ_ca＜Ｌ_cb）。その結果、幅の狭いＰＮ接合領域４ａの接合耐圧が、幅の広いＰＮ接合領域４ｂの接合耐圧より低くなる。また図中の矢印の太さの違いで示したように、幅の狭いＰＮ接合領域４ａでは、幅の広いＰＮ接合領域４ｂより、大きなサージ電流が流れる。つまり、製造過程で図１４（ｂ）のように幅Ｌ_ca，Ｌ_cbが異なってしまったダイオードでは、接合耐圧の低いＰＮ接合領域のほうにサージ電流が偏るので、素子のサージに対する耐量が、マスクのアラインメントずれのない設計どおりのダイオードに比べて低下してしまう。また、図１４のダイオードを複数個並列接続したダイオードにおいても、ＰＮ接合領域の幅が製造過程で異なってしまうと、ダイオードの特性は実質的に一番狭い幅のＰＮ接合領域の特性に支配されてしまい、大きなサージ電流に対応するために並列接続した効果が得られなくなってしまう。
【００１５】
さらに、図１４の構造のＰＮ接合ダイオードにおいては、層間絶縁膜５がＢＰＳＧ膜で形成されているが、大きなサージ電流が流れるとサージのエネルギーでＰＮ接合領域４ａ，４ｂが約９００℃の高温になり、ＢＰＳＧ膜が部分的に溶け出すといった問題点を有している。ＢＰＳＧ膜が一旦溶けると、サージ電流がなくなり常温に戻って固化した後のＢＰＳＧ膜は、絶縁作用が劣化し、ＰＮ接合領域４ａ，４ｂでリーク電流が発生し易くなる。
【００１６】
また、図１４の構造のＰＮ接合ダイオードにおいては、図１４（ａ）の平面図に示したように、各高濃度拡散領域２，３ａ，３ｂに接続するＡｌ配線７ａ，７ｂの幅が広くとれないため、大きなサージ電流に対しては配線幅が十分でなく、配線が焼き切れるといった問題点もある。
【００１７】
そこで、本発明の目的は、サージ電流を均一に流すことができ、サージ耐量の高いＰＮ接合ダイオードおよびその製造方法を提供することにある。
【００１８】
【課題を解決するための手段】
請求項１に記載の発明は、半導体上に配置され、２本の等幅ブリッジ部で分割される３個の開口部を備えるＬＯＣＯＳ酸化膜と、前記３個の開口部の中央の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、Ｐ型またはＮ型からなる第１高濃度拡散領域と、前記３個の開口部の両端の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、前記第１高濃度拡散領域とは逆型のＰ型またはＮ型からなる２個の第２高濃度拡散領域とを有し、前記２本のＬＯＣＯＳ酸化膜からなる等幅ブリッジ部の下に配置され、前記第１高濃度拡散領域と前記第２高濃度拡散領域の間の半導体からなるＰＮ接合領域が、等幅に２本形成され、前記２個の第２高濃度拡散領域同士が電極を介して互いに接続されてなり、前記ＬＯＣＯＳ酸化膜の開口部の平面形状が、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部を長辺とする矩形であり、前記第１高濃度拡散領域を形成するための開口部と前記第２高濃度拡散領域を形成するための開口部とは、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジに沿った方向の長さが異なることを特徴とするダイオードとしている。
【００１９】
これによれば、第１高濃度拡散領域および第２高濃度拡散領域を形成するためのマスクとして、共通のＬＯＣＯＳ酸化膜を用いるため、第１高濃度拡散領域の両側に、幅が等しいＰＮ接合領域を形成することができる。このため、並列接続されているＰＮ接合の一方にサージ電流が偏ることがなく、ダイオードのサージ耐量を実質的に高めることができる。
【００２０】
ＰＮ接合領域上に配置されるＬＯＣＯＳ酸化膜は、ＢＰＳＧ膜のような融点が１０００℃以下の膜ではなく、シリコン（Ｓｉ、融点１４２０℃）よりも高い融点を持つため、ＰＮ接合領域に大きなサージ電流が流れてＰＮ接合部が発熱しても、ＬＯＣＯＳ酸化膜の融点が基板となるＳｉより高い融点を持つため、ＬＯＣＯＳ酸化膜が基板のＳｉより先に溶け出すことはない。従って、一度大きなサージ電流が流れると、絶縁作用が劣化してその後使用できなくなるといったことがなく、サージ電流に対する保護作用を持続することができる。
上記ダイオードにおいては、前記ＬＯＣＯＳ酸化膜の開口部の平面形状を、前記前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部を長辺とする矩形としている。これにより、その開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置される前記第１高濃度拡散領域と前記第２高濃度拡散領域の平面形状も前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部に沿った方向が長手となる矩形状に形成される。これによれば、ＰＮ接合領域が、隣り合う矩形の第１高濃度拡散領域と第２高濃度拡散領域の間において、それらの長手方向全域にわたって等幅に形成されるため、長手方向の全域にわたってサージ電流を均等に流すことができる。従って、ダイオードのサージ耐量を実質的に高めることができる。
また、上記ダイオードにおいては、前記第１高濃度拡散領域を形成するための開口部と前記第２高濃度拡散領域を形成するための開口部とは、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジに沿った方向の長さが異なるようにしている。これにより、前記第１項高濃度拡散領域と前記第２高濃度拡散領域との長手方向の長さが異なることとなり、第１高濃度拡散領域と第２高濃度拡散領域の角部同士の距離は、ＰＮ接合領域の幅より長くなる。隣り合う第１項高濃度拡散領域と第２高濃度拡散領域の長手方向の長さが等しい場合には角部同士でサージ電流が集中し易いが、前記のように長手方向の長さが異なるように配置することによって、角部同士では電流経路の抵抗が大きくなり、角部同士でサージ電流の集中を回避することができる。
【００２１】
請求項２に記載の発明は、半導体上に配置され、２本の等幅ブリッジ部で分割される３個の開口部を１組の開口群として、前記開口群をｍ組備えるＬＯＣＯＳ酸化膜と、前記ｍ組の開口群の各々の中央の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、Ｐ型またはＮ型のどちらか１つの型からなるｍ個の第１高濃度拡散領域と、前記ｍ組の開口群の各々の両端の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、前記第１高濃度拡散領域とは逆型のＰ型またはＮ型からなる２ｍ個の第２高濃度拡散領域とを有し、前記ｍ組の各々の開口群の２本のＬＯＣＯＳ酸化膜からなる等幅ブリッジ部の下に配置され、前記第１高濃度拡散領域と前記第２高濃度拡散領域の間の半導体からなるＰＮ接合領域が、等幅に２ｍ本形成され、前記ｍ個の第１高濃度拡散領域同士が電極を介して互いに接続され、前記２ｍ個の第２高濃度拡散領域同士が電極を介して互いに接続されてなり、前記ＬＯＣＯＳ酸化膜の開口部の平面形状が、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部を長辺とする矩形であり、前記第１高濃度拡散領域を形成するための開口部と前記第２高濃度拡散領域を形成するための開口部とは、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジに沿った方向の長さが異なることを特徴とするダイオードとしている。
【００２２】
これによれば、２ｍ本のＰＮ接合を並列接続することで大きなサージ電流に対しても必要なサージ耐量を確保することができると共に、ＬＯＣＯＳ酸化膜の開口部を介して、ＰＮ接合領域の幅が全てのＰＮ接合にわたって等しく配置されるため、ＰＮ接合のどれか1個にサージ電流が偏ることがなく、サージ電流に対するダイオードのサージ耐量を実質的にも高めることができる。また、ＰＮ接合領域上にＬＯＣＯＳ酸化膜が配置されているので、前記のようにサージ電流に対する保護作用を持続することができる。
上記ダイオードにおいても、請求項１に記載のダイオードと同様にして、前記ＬＯＣＯＳ酸化膜の開口部の平面形状を、前記前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部を長辺とする矩形としていることにより、隣り合う矩形の第１高濃度拡散領域と第２高濃度拡散領域の長手方向の全域にわたってサージ電流を均等に流すことができ、ダイオードのサージ耐量を実質的に高めることができる。また、前記第１高濃度拡散領域を形成するための開口部と前記第２高濃度拡散領域を形成するための開口部とは、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジに沿った方向の長さが異なるようにしていことにより、隣り合う第１項高濃度拡散領域と第２高濃度拡散領域の角部同士では電流経路の抵抗が大きくなり、角部同士でサージ電流の集中を回避することができる。
【００２３】
請求項３に記載の発明は、半導体上に配置され、ｎ本の等幅ブリッジ部で分割される（ｎ＋１）個の開口部を備えるＬＯＣＯＳ酸化膜と、前記（ｎ＋１）個の開口部のうち、１つおきに位置する開口部からなる第１の開口群の各々の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、Ｐ型またはＮ型のどちらか１つの型からなる複数個の第１高濃度拡散領域の組と、前記第１の開口群の各々の開口部に隣接する、１つおきに位置する開口部からなる第２の開口群の各々の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、前記第１高濃度拡散領域とは逆型のＰ型またはＮ型からなる複数個の第２高濃度拡散領域の組とを有し、前記ｎ本の各々のＬＯＣＯＳ酸化膜からなる等幅ブリッジ部の下に配置され、前記第１高濃度拡散領域と前記第２高濃度拡散領域の間の半導体からなるＰＮ接合領域が、等幅にｎ本形成され、前記複数個の第１高濃度拡散領域同士が電極を介して互いに接続され、前記複数個の第２高濃度拡散領域同士が電極を介して互いに接続されてなり、前記ＬＯＣＯＳ酸化膜の開口部の平面形状が、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部を長辺とする矩形であり、前記第１高濃度拡散領域を形成するための開口部と前記第２高濃度拡散領域を形成するための開口部とは、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジに沿った方向の長さが異なることを特徴とするダイオードとしている。
【００２４】
これによれば、第１高濃度拡散領域と第２高濃度拡散領域を隣り合って交互に配置し、ｎ個のＰＮ接合を並列接続することで、必要なサージ耐量を確保すると共に、ダイオードを小型化することができる。また、ＬＯＣＯＳ酸化膜の開口部を介して、ＰＮ接合領域の幅が全てのＰＮ接合にわたって等しく配置されるため、ＰＮ接合のどれか1個にサージ電流が偏ることがなく、サージ電流に対するダイオードのサージ耐量を実質的にも高めることができる。また、ＰＮ接合領域上にＬＯＣＯＳ酸化膜が配置されているので、前記のようにサージ電流に対する保護作用を持続することができる。
上記ダイオードにおいても、請求項１に記載のダイオードと同様にして、前記ＬＯＣＯＳ酸化膜の開口部の平面形状を、前記前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部を長辺とする矩形としていることにより、隣り合う矩形の第１高濃度拡散領域と第２高濃度拡散領域の長手方向の全域にわたってサージ電流を均等に流すことができ、ダイオードのサージ耐量を実質的に高めることができる。また、前記第１高濃度拡散領域を形成するための開口部と前記第２高濃度拡散領域を形成するための開口部とは、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジに沿った方向の長さが異なるようにしていことにより、隣り合う第１項高濃度拡散領域と第２高濃度拡散領域の角部同士では電流経路の抵抗が大きくなり、角部同士でサージ電流の集中を回避することができる。
【００２７】
請求項４に記載の発明は、前記ＬＯＣＯＳ酸化膜の矩形状の開口部の角部が丸められ、略矩形状に形成されることを特徴としている。これにより、開口部を介して形成される第１高濃度拡散領域と第２高濃度拡散領域も、角部が丸められた略矩形状に形成されるため、両者の長手方向端部間の距離は、ＰＮ接合領域の幅より長くなる。このため、第１高濃度拡散領域と第２高濃度拡散領域の端部間でのサージ電流の集中を回避することができる。
【００２８】
請求項５に記載の発明は、前記矩形の開口部を介して矩形状に形成される第１高濃度拡散領域、第２高濃度拡散領域の少なくとも一方の高濃度拡散領域において、長手方向における両端部の周囲に、前記一方の高濃度拡散領域と同型の不純物によって当該一方の高濃度拡散領域よりも低濃度の低濃度拡散領域を形成したことを特徴としている。これによれば、長手方向における両端部の周囲に同型の低濃度拡散領域を形成することで、当該両端部の耐圧が上り、両端部でのサージ電流の集中を回避することができる。
【００２９】
請求項６に記載の発明は、前記矩形開口部の内側に形成され前記第１高濃度拡散領域および前記第２高濃度拡散領域に接触するそれぞれの電極のコンタクト面の形状は、前記開口部の長辺をなす前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部との間隔よりも、前記開口部の短辺との間隔のほうが大きいことを特徴としている。第１高濃度拡散領域および第２高濃度拡散領域に接触する電極のコンタクト面とＬＯＣＯＳ酸化膜との間隔が、等幅ブリッジ部より矩形の端部で大きくなっているため、端部までの電流経路の抵抗が大きくなり、端部に流れ込む電流が減って、端部でサージ電流の集中を回避することができる。
【００３１】
請求項７に記載の発明は、前記第１高濃度拡散領域と前記第２高濃度拡散領域を形成するための前記ＬＯＣＯＳ酸化膜の開口部上に第１高濃度拡散領域と第２高濃度拡散領域の各々に対応して形成した第1下層電極および第２下層電極が設けられ、前記第1下層電極および第２下層電極上に層間絶縁膜が形成され、当該層間絶縁膜において、第1下層電極に対応して第1層間絶縁膜開口部が形成され、第２下層電極に対応して第２層間絶縁膜開口部が形成され、前記層間絶縁膜上に第1上層電極および第２上層電極が形成され、第1上層電極は前記第1層間絶縁膜開口部を介して第１高濃度拡散領域に対応する第1下層電極に接続され、第２上層電極は前記第２層間絶縁膜開口部を介して第２高濃度拡散領域に対応する第２下層電極に接続されたことを特徴としている。
【００３２】
このように電極を２層構成にすることで、個々の拡散領域に接続した幅の狭い下層電極に対して、上層電極から垂直方向にサージ電流を流すことができる。これによって配線抵抗を十分に低減することができ、大きなサージ電流に対しても対応することができ、配線が焼き切れるといった問題も発生しない。
【００３３】
請求項８に記載の発明は、前記第1上層電極、第２上層電極における平面内の最短幅は、それぞれ、前記第1下層電極、第２下層電極における平面内の最短幅より大きいことを特徴としている。このように第1上層電極、第２上層電極の幅を、第1下層電極、第２下層電極より広くしてベタ形状に近づけることで、上層電極の配線抵抗を十分に低減することができ、大きなサージ電流に対しても対応することができる上層電極が得られる。
【００３４】
請求項９に記載の発明は、前記第1上層電極および前記第２上層電極上に保護膜が形成され、前記第１上層電極に対応して前記保護膜に開口を形成し、この開口部により露出される前記第１上層電極により第1パッドを形成し、前記第２上層電極に対応して前記保護膜に開口を形成し、この開口部により露出される前記第２上層電極により第２パッドを形成し、前記第1パッドと前記第２パッドが前記ＬＯＣＯＳ酸化膜の開口部を間に挟んでその両側に配置され、前記第1上層電極と前記第２上層電極の幅を、それぞれ、第1パッドと第２パッドに近くなるほど大きくしたことを特徴としている。
サージ電流は一方のパッドから流入し、もう一方のパッドから流出していくので、上層電極においてはそれぞれのパッドに近いほど大きなサージ電流が流れる。従って、上層電極においてパッドに近い部分ほど幅を大きくきくすることでサージ電流を均一に流すことができ、パッド近くでのサージ電流による破壊を防ぐことができる。
【００３６】
請求項１０に記載の発明は、半導体中に配置された前記第１高濃度拡散領域、前記第２高濃度拡散領域、前記ＰＮ接合領域を、Ｐ型の第３高濃度拡散領域で取り囲み、前記第３高濃度拡散領域を電極を介して接地したことを特徴としている。これによれば、サージ電流が大きくてＰＮ接合領域では吸収できず溢れ出た状態になっても、ダイオードを取り囲んだＰ型の第３高濃度拡散領域が、溢れ出たサージ電流を流す回路となる。従って、ダイオードの周辺に形成された半導体装置において、溢れ出たサージ電流によって発生する誤動作を防止することができる。
【００３７】
請求項１１に記載の発明は、半導体中に配置された前記第１高濃度拡散領域、前記第２高濃度拡散領域、前記ＰＮ接合領域を、絶縁領域で取り囲んだことを特徴としている。これによれば、サージ電流が大きくてＰＮ接合領域では吸収できず溢れ出た状態になっても、ダイオードを取り囲んだ絶縁領域が溢れ出たサージ電流を完全に遮断する。従って、ダイオードの周辺に形成された半導体装置において、溢れ出たサージ電流によって発生する誤動作を防止することができる。
【００３９】
請求項１２に記載の発明は、半導体上に配置され、２本の等幅ブリッジ部で分割される３個の開口部を備えるＬＯＣＯＳ酸化膜と、前記３個の開口部の中央の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、Ｐ型またはＮ型からなる第１高濃度拡散領域と、前記３個の開口部の両端の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、前記第１高濃度拡散領域とは逆型のＰ型またはＮ型からなる２個の第２高濃度拡散領域とを有し、前記２本のＬＯＣＯＳ酸化膜からなる等幅ブリッジ部の下に配置され、前記第１高濃度拡散領域と前記第２高濃度拡散領域の間の半導体からなるＰＮ接合領域が、等幅に２本形成され、前記２個の第２高濃度拡散領域同士が電極を介して互いに接続されてなり、前記ＬＯＣＯＳ酸化膜の開口部の平面形状が、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部を長辺とする矩形であり、前記第１高濃度拡散領域を形成するための開口部と前記第２高濃度拡散領域を形成するための開口部とは、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジに沿った方向の長さが異なるダイオードの製造方法であって、前記半導体上に配置され、２本の等幅ブリッジ部で分割される３個の開口部を備える前記ＬＯＣＯＳ酸化膜を設ける工程と、前記３個の開口部の中央の開口部を介して前記半導体中に不純物をイオン注入して、その後熱処理し、前記ＬＯＣＯＳ酸化膜より深くＰ型またはＮ型からなる前記第１高濃度拡散領域を形成する工程と、前記３個の開口部の両端の開口部を介して前記半導体中に不純物をイオン注入して、その後熱処理し、前記ＬＯＣＯＳ酸化膜より深く前記第１高濃度拡散領域とは逆型の、Ｐ型またはＮ型からなる前記第２高濃度拡散領域を２個形成する工程と、前記２個の第２高濃度拡散領域同士を電極を介して互いに接続する工程とを有することを特徴としている。
【００４０】
この製造方法によれば、第1高濃度拡散領域の形成工程とその両側に配置される第２高濃度拡散領域の形成工程において、同じＬＯＣＯＳ酸化膜がイオン注入のマスクとして用いられるので、２枚のマスクを使用した際に起きる位置合わせずれの問題が発生しない。従って、第1高濃度拡散領域と第２高濃度拡散領域の間に形成される２本のＰＮ接合領域の幅も、設計どおりに等しく形成することができる。これにより、並列接続されているＰＮ接合の一方にサージ電流が偏ることがなく、サージ耐量の高い請求項１に記載のダイオードを製造することができる。
【００４１】
また、半導体上に形成されたＬＯＣＯＳ酸化膜の３個の開口部に、Ｐ型不純物とＮ型不純物をイオン注入して、その後熱処理しＬＯＣＯＳ酸化膜より深く第１高濃度拡散領域と第２高濃度拡散領域を形成しているので、第１高濃度拡散領域と第２高濃度拡散領域の間の半導体からなるＰＮ接合領域には、ＬＯＣＯＳ酸化膜が上に配置されることになる。このようにして製造されたダイオードにおいては、ＰＮ接合領域に大きなサージ電流が流れても、ＬＯＣＯＳ酸化膜が基板となるＳｉより先に溶け出すことはない。従って、一度大きなサージ電流が流れてもＬＯＣＯＳ酸化膜の絶縁作用が劣化することがなく、繰り返し使用が可能な請求項１に記載のダイオードを製造することができる。
【００４２】
請求項１３に記載の発明は、半導体上に配置され、２本の等幅ブリッジ部で分割される３個の開口部を１組の開口群として、前記開口群をｍ組備えるＬＯＣＯＳ酸化膜と、前記ｍ組の開口群の各々の中央の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、Ｐ型またはＮ型のどちらか１つの型からなるｍ個の第１高濃度拡散領域と、前記ｍ組の開口群の各々の両端の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、前記第１高濃度拡散領域とは逆型のＰ型またはＮ型からなる２ｍ個の第２高濃度拡散領域とを有し、前記ｍ組の各々の開口群の２本のＬＯＣＯＳ酸化膜からなる等幅ブリッジ部の下に配置され、前記第１高濃度拡散領域と前記第２高濃度拡散領域の間の半導体からなるＰＮ接合領域が、等幅に２ｍ本形成され、前記ｍ個の第１高濃度拡散領域同士が電極を介して互いに接続され、前記２ｍ個の第２高濃度拡散領域同士が電極を介して互いに接続されてなり、前記ＬＯＣＯＳ酸化膜の開口部の平面形状が、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部を長辺とする矩形であり、前記第１高濃度拡散領域を形成するための開口部と前記第２高濃度拡散領域を形成するための開口部とは、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジに沿った方向の長さが異なるダイオードの製造方法であって、前記半導体上に配置され、２本の等幅ブリッジ部で分割される３個の開口部を１組の開口群として、前記開口群をｍ組備える前記ＬＯＣＯＳ酸化膜を設ける工程と、前記ｍ組の開口群の各々の中央の開口部を介して前記半導体中に不純物をイオン注入して、その後熱処理し、前記ＬＯＣＯＳ酸化膜より深くＰ型またはＮ型からなる前記第１高濃度拡散領域をｍ個形成する工程と、前記ｍ組の開口群の各々の両端の開口部を介して前記半導体中に不純物をイオン注入して、その後熱処理し、前記ＬＯＣＯＳ酸化膜より深く前記第１高濃度拡散領域とは逆型の、Ｐ型またはＮ型からなる前記第２高濃度拡散領域を２ｍ個形成する工程と、前記ｍ個の第１高濃度拡散領域同士を電極を介して互いに接続する工程と、前記２ｍ個の第２高濃度拡散領域同士を電極を介して互いに接続する工程とを有することを特徴としている。
【００４３】
この製造方法によれば、第1高濃度拡散領域と第２高濃度拡散領域の間に形成される２ｍ本の並列接続されたＰＮ接合領域の幅を、全て設計どおりに等しく形成することができる。これにより、並列接続されているＰＮ接合のどれか１本にサージ電流が偏ることがなく、大きなサージ電流に対しても必要なサージ耐量をもった請求項２に記載のダイオードを製造することができる。また、ＰＮ接合領域にはＬＯＣＯＳ酸化膜が上に配置されるため、一度大きなサージ電流が流れてもＬＯＣＯＳ酸化膜の絶縁作用が劣化することがなく、繰り返し使用が可能な請求項２に記載のダイオードを製造することができる。
【００４４】
請求項１４に記載の発明は、半導体上に配置され、ｎ本の等幅ブリッジ部で分割される（ｎ＋１）個の開口部を備えるＬＯＣＯＳ酸化膜と、前記（ｎ＋１）個の開口部のうち、１つおきに位置する開口部からなる第１の開口群の各々の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、Ｐ型またはＮ型のどちらか１つの型からなる複数個の第１高濃度拡散領域の組と、前記第１の開口群の各々の開口部に隣接する、１つおきに位置する開口部からなる第２の開口群の各々の開口部を介して前記ＬＯＣＯＳ酸化膜より深く半導体中に配置され、前記第１高濃度拡散領域とは逆型のＰ型またはＮ型からなる複数個の第２高濃度拡散領域の組とを有し、前記ｎ本の各々のＬＯＣＯＳ酸化膜からなる等幅ブリッジ部の下に配置され、前記第１高濃度拡散領域と前記第２高濃度拡散領域の間の半導体からなるＰＮ接合領域が、等幅にｎ本形成され、前記複数個の第１高濃度拡散領域同士が電極を介して互いに接続され、前記複数個の第２高濃度拡散領域同士が電極を介して互いに接続されてなり、前記ＬＯＣＯＳ酸化膜の開口部の平面形状が、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジ部を長辺とする矩形であり、前記第１高濃度拡散領域を形成するための開口部と前記第２高濃度拡散領域を形成するための開口部とは、前記ＬＯＣＯＳ酸化膜からなる等幅ブリッジに沿った方向の長さが異なるダイオードの製造方法であって、前記半導体上に配置され、ｎ本の等幅ブリッジ部で分割される（ｎ＋１）個の開口部を備える前記ＬＯＣＯＳ酸化膜を設ける工程と、前記（ｎ＋１）個の開口部のうち、１つおきに位置する開口部からなる第１の開口群の各々の開口部を介して前記半導体中に不純物をイオン注入して、その後熱処理し、前記ＬＯＣＯＳ酸化膜より深くＰ型またはＮ型からなる前記第１高濃度拡散領域を複数個形成する工程と、前記第１の開口群の各々の開口部に隣接する、１つおきに位置する開口部からなる第２の開口群の各々の開口部を介して前記半導体中に不純物をイオン注入して、その後熱処理し、前記ＬＯＣＯＳ酸化膜より深く前記第１高濃度拡散領域とは逆型の、Ｐ型またはＮ型からなる前記第２高濃度拡散領域を複数個形成する工程と、前記複数個の第１高濃度拡散領域同士を電極を介して互いに接続する工程と、前記複数個の第２高濃度拡散領域同士を電極を介して互いに接続する工程とを有することを特徴としている。
【００４５】
この製造方法によれば、隣り合って交互に配置された第１高濃度拡散領域と第２高濃度拡散領域で形成されるＰＮ接合領域の幅を、全て設計どおりに等しく形成することができる。これにより、並列接続されているＰＮ接合のどれか１個にサージ電流が偏ることがなく、大きなサージ電流に対しても必要なサージ耐量をもった小型の請求項３に記載のダイオードを製造することができる。また、ＰＮ接合領域にはＬＯＣＯＳ酸化膜が上に配置されるため、一度大きなサージ電流が流れてもＬＯＣＯＳ酸化膜の絶縁作用が劣化することがなく、繰り返し使用が可能な請求項３に記載のダイオードを製造することができる。
【００４７】
【発明の実施の形態】
以下、本発明の実施の形態を、図に基づいて説明する。
【００４８】
（第１の実施形態）
図１に、第1の実施形態におけるＰＮ接合ダイオードを示す。図１（ａ）は本実施形態におけるＰＮ接合ダイオードの平面図であり、図１（ｂ）は、図１（ａ）におけるＡ−Ａ’線に沿った拡大断面図である。尚、図１４に示した従来のＰＮ接合ダイオードと同様の部分については同一の符号をつけ、その説明を省略する。
【００４９】
図１に示すＰＮ接合ダイオードにおいても、図１４に示した従来のＰＮ接合ダイオードと同様に、低濃度Ｎ型シリコン（半導体）基板１にベースとなるＰ型高濃度拡散領域２が配置され、そのベースの両側にエミッタとなるＮ型高濃度拡散領域３ａ，３ｂが配置されている。低濃度Ｎ型シリコン（半導体）基板１の不純物はリン（Ｐ）で、濃度は約１×１０¹⁵ｃｍ^-3である。また、図１（ａ）の平面図において各高濃度拡散領域２，３ａ，３ｂは約１０μｍ×５００μｍの矩形状である。ベースとエミッタの間の半導体部分がＰＮ接合領域４ａ，４ｂとなってＰＮ接合ダイオードが構成される点も、従来と同様である。
【００５０】
一方、図１に示す本実施形態のＰＮ接合ダイオードにおいては、図１４に示す従来のＰＮ接合ダイオードと異なり、ＰＮ接合領域４ａ，４ｂが高融点絶縁保護膜であるＬＯＣＯＳ酸化膜のブリッジ部５００ａ，５００ｂの下に配置されている。また、ブリッジ部５００ａ，５００ｂの幅Ｌ_1a，Ｌ_1bは等しく形成され、その下に配置されたＰＮ接合領域４ａ，４ｂの幅Ｌ_ca，Ｌ_cbも等しく形成されている。図１（ａ）の平面図において、３個のＬＯＣＯＳ開口部５０は、実線で示されている。図１に示すＬＯＣＯＳ酸化膜のブリッジ部の幅Ｌ_la，Ｌ_lbは、通常Ｌ_la＝Ｌ_lb＝３μｍ程度に設定する。
【００５１】
また、Ｐ型高濃度拡散領域２とＮ型高濃度拡散領域３ａ，３ｂには、それぞれ、図１（ｂ）に示すように、ＢＰＳＧからなる下層の層間絶縁膜５の開口部を介して、Ａｌからなる下層電極７ａ，７ｂが接続されるが、各々の下層電極７ａ，７ｂは、それぞれＴＥＯＳからなる上層の層間絶縁膜８の開口部を介して、Ａｌからなる上層電極９ａ，９ｂに接続される。
【００５２】
図１（ａ）の平面図において、下層電極７ａ，７ｂと上層電極９ａ，９ｂは、それぞれ実線で示されている。また、各高濃度拡散領域と各下層電極のコンタクト領域７１，７２，７３、および下層電極と上層電極のコンタクト領域９１，９２，９３は、それぞれ点線で示されている。各高濃度拡散領域と各下層電極のコンタクト領域７１，７２，７３は、ＬＯＣＯＳ開口部５０との間隔（Ｌ_x，Ｌ_y）が、全周に渡って等しくなるように（Ｌ_x＝Ｌ_y）配置されている。
【００５３】
図１（ａ）に示すように、Ｐ型の高濃度拡散領域２に対応する下層電極７ａはベースの上層電極９ａに接続されており、Ｎ型の高濃度拡散領域３ａ，３ｂに対応する下層電極７ｂは、エミッタの上層電極９ｂに接続されている。また、ダイオード全体はＳｉＮからなる保護膜１０によって被覆され、保護膜１０の開口部に形成された図１（ａ）に実線で示すパッド９０ａ，９０ｂを介して、外部に接続される。
【００５４】
尚、上層電極９ａ，９ｂは矩形形状で電極幅Ｌ_ea，Ｌ_ebが等しく設定されており（Ｌ_ea＝Ｌ_eb）、３個並んだＬＯＣＯＳ開口部５０を横断して、ＬＯＣＯＳ開口部５０を等しく２分するように配置されている。また、パッド９０ａ，９０ｂは、３個並んだＬＯＣＯＳ開口部５０の一方の端の開口部の外側に、並んで配置されている。
【００５５】
次に、図１に示したＰＮ接合ダイオードの製造方法を、図２に従って説明する。図２は、図１（ａ）におけるＡ−Ａ’線に沿った拡大断面を、製造工程順に示したものである。また、図２に示すＰＮ接合ダイオードの製造は、同じ基板の別位置に形成されるＣＭＯＳ半導体装置の製造と同時に行なわれるので、図３に示したＣＭＯＳ半導体装置の製造工程を参照しながら、図２のＰＮ接合ダイオードの製造工程を説明する。
【００５６】
最初に、図２（ａ）に示す低濃度Ｎ型シリコン（半導体）基板１を用意する。低濃度Ｎ型シリコン（半導体）基板１は、不純物としてリン（Ｐ）を含有しており、その濃度は１×１０¹⁵ｃｍ^-3程度である。一方、図３（ａ）に示すように、ＣＭＯＳ形成位置では、最初に、ＮチャンネルＭＯＳ部に１×１０¹³ｃｍ^-2の条件でボロン（Ｂ）をイオン注入して、Ｐ型ウェル領域２０１を形成しておく。また、同様にして、ＰチャンネルＭＯＳ部に１×１０¹³ｃｍ^-2の条件でリン（Ｐ）をイオン注入して、Ｎ型ウェル領域３０１を形成しておく。
【００５７】
次に、図２（ｂ）と図３（ｂ）に示すように、高融点絶縁保護膜となる所定の開口部を有するＬＯＣＯＳ酸化膜５００，５００ａ，５００ｂを形成する。ＬＯＣＯＳ酸化膜５００，５００ａ，５００ｂの形成は、通常用いられている以下の手順で行なう。最初に、低濃度Ｎ型シリコン（半導体）基板１上の全面に熱酸化時のマスクとなるＳｉＮ膜を積層し、所定の開口部を形成したレジストをマスクにしてＳｉＮ膜をエッチングし、ＬＯＣＯＳ形成部に対応する部分を開口させる。ついで、ＳｉＮ膜の開口部に露出したシリコン表面を熱酸化させてＬＯＣＯＳ酸化膜を形成し、最後にＳｉＮ膜を除去する。ＬＯＣＯＳ酸化膜の厚さは、約０．６μｍである。図３（ｂ）に示すように、ＣＭＯＳ形成位置ではＬＯＣＯＳ酸化膜５００を形成した後、さらに酸化シリコン膜からなるゲート酸化膜６０１とポリシリコン膜からなるゲート電極６０２を、通常用いられる方法で形成する。
【００５８】
次に、図２（ｃ）に示すように、エミッタに対応したＬＯＣＯＳ酸化膜の開口部を第1のレジスト１０２により覆った後、ＬＯＣＯＳ酸化膜を実質的なマスクとして、ベースに対応した開口部から２×１０¹⁴ｃｍ^-2の条件でボロン（Ｂ）をイオン注入する。その後、１０００℃以上で数時間熱処理して、ベースとなるＰ型高濃度拡散領域２を形成する。Ｐ型高濃度拡散領域２の拡散深さは、約３μｍである。これと同時に、図３（ｃ）に示すように、ＣＭＯＳ形成位置ではＰチャンネルに対応したＰ型高濃度拡散領域２１，２２を形成する。
【００５９】
次に、図２（ｄ）に示すように、第１のレジスト１０２を除去した後、ベースに対応したＬＯＣＯＳ酸化膜の開口部を第２のレジスト１０３によりにより覆った後、ＬＯＣＯＳ酸化膜を実質的なマスクとして、エミッタに対応した開口部から４×１０¹⁶ｃｍ^-2の条件でリン（Ｐ）をイオン注入する。その後、１０００℃以上で１時間程度熱処理して、エミッタとなるＮ型高濃度拡散領域３ａ，３ｂをベースとなるＰ型高濃度拡散領域２の両側に形成する。Ｎ型高濃度拡散領域３ａ，３ｂの拡散深さは、約２μｍである。これにより、Ｐ型高濃度拡散領域２とＮ型高濃度拡散領域３ａ，３ｂの間の半導体部分が、ＰＮ接合領域４ａ，４ｂとなる。これと同時に、図３（ｄ）に示すように、ＣＭＯＳ形成位置ではＮチャンネルに対応したＮ型高濃度拡散領域３１，３２を形成する。
【００６０】
次に、図２（ｅ）に示すように、第２のレジスト１０３を除去した後、下層の層間絶縁膜５としてＢＰＳＧ膜を全面に積層し、Ｐ型高濃度拡散領域２とＮ型高濃度拡散領域３ａ，３ｂに接続するための開口部６１，６２，６３を形成する。ＢＰＳＧ膜の厚さは、約０．６μｍである。
【００６１】
次に、図２（ｆ）に示すように、Ａｌ膜を全面に約１μｍの厚さで積層した後、所定形状にパターニングして、下層電極７ａ，７ｂを形成する。
【００６２】
図３（ｅ）に示すＣＭＯＳ形成位置においても、図２（ｅ）と図２（ｆ）の工程により、ＢＰＳＧ膜からなる下層の層間絶縁膜５とＡｌからなる下層電極７を形成する。
【００６３】
次に、図２（ｇ）に示すように、上層の層間絶縁膜８としてのＴＥＯＳ膜を積層した後、各々の下層電極７ａ，７ｂに対応した開口部を形成し、全面にＡｌ膜を積層する。その後、Ａｌ膜を所定形状にパターニングして、上層電極９ａ，９ｂを形成する。最後に、全面に保護膜１０としてのＳｉＮ膜を積層した後、外部に接続するためのパッド用開口部を形成して、図１に示したＰＮ接合ダイオードが完成する。尚、図３に示すＣＭＯＳ形成位置においては、図３（ｅ）に示す工程以降、図２（ｇ）と同様の工程を経て、ＣＭＯＳ半導体装置が完成される（図は省略）。
【００６４】
以上の図２に示した製造方法によれば、ベースであるＰ型高濃度拡散領域２とエミッタであるＮ型高濃度拡散領域３ａ，３ｂが、同じＬＯＣＯＳをマスクにしてイオン注入される。このように、図２の工程ではマスクのアライメント操作がないため、図１５の従来の工程で起こり得るマスクのアライメントずれは存在しない。従って、ＬＯＣＯＳの左右ブリッジ部５００ａ，５００ｂの幅Ｌ_1a，Ｌ_1bを同じに設定しておけば、不純物拡散後の左右のＰＮ接合領域の幅Ｌ_ca，Ｌ_cbも同じになる。これによって、左右のＰＮ接合領域４ａ，４ｂの耐圧も均一になる。また、左右のＰＮ接合領域４ａ，４ｂは融点の高いＬＯＣＯＳ酸化膜下に形成されることになるので、サージ印加時に起きるＰＮ接合領域４ａ，４ｂの温度上昇にも耐えることができる。
【００６５】
（第２の実施形態）
第１の実施形態では、ＰＮ接合領域を覆う等幅のブリッジ部を持つＬＯＣＯＳ酸化膜を基礎として、ベースとなるＰ型高濃度拡散領域の両側にエミッタとなるＮ型高濃度拡散領域が配置されたＰＮ接合ダイオードの構造、およびその製造方法を示した。半導体装置の入出力保護素子としてのＰＮ接合ダイオードでは、大きなサージ電流に対応するために、通常は図１に示すＰＮ接合ダイオードが数１０個並列接続される。第２の実施形態では、前記第１の実施形態のＰＮ接合ダイオードが複数個並列接続された構造を持つＰＮ接合ダイオードに関する。以下、第１の実施形態のＰＮ接合ダイオードが３個並列配置されたＰＮ接合ダイオードを一例として、本実施形態について図に基づいて説明する。
【００６６】
図４は、本実施形態におけるＰＮ接合ダイオードの平面図である。第１の実施形態と同様の部分については、同一の符号をつけ、その説明を省略する。
【００６７】
図４に示すように、第２の実施形態では、３個のＰ型高濃度拡散領域２１，２２，２３の各々を中心として、その両側に各々２個のＮ型高濃度拡散領域３１ａ，３１ｂ，３２ａ，３２ｂ，３３ａ，３３ｂが配置されており、図中のＬＯＣＯＳ酸化膜のブリッジ部５０１ａ，５０１ｂ，５０２ａ，５０２ｂ，５０３ａ，５０３ｂの幅Ｌ_1a，Ｌ_1b，Ｌ_2a，Ｌ_2b，Ｌ_3a，Ｌ_3bは、全て等しく設定されている。また、３個のＰ型高濃度拡散領域２１，２２，２３同士は上層電極９ａによって接続されており、６個のＮ型高濃度拡散領域３１ａ，３１ｂ，３２ａ，３２ｂ，３３ａ，３３ｂ同士は上層電極９ｂによって接続されている。本実施形態の図４に示すＰＮ接合ダイオードは、第１実施形態の図２に示した製造方法によって、同じように製造することができる。
【００６８】
本実施形態においても、高融点絶縁保護膜であるＬＯＣＯＳ酸化膜において、ＰＮ接合領域を覆う６本のブリッジ部の幅Ｌ_1a，Ｌ_1b，Ｌ_2a，Ｌ_2b，Ｌ_3a，Ｌ_3bが等しく設定されているので、同じＬＯＣＯＳ酸化膜をマスクにしてイオン注入により形成された６本のＰＮ接合領域の幅も、全てに渡って等しくなる。これによって、６本のＰＮ接合領域の耐圧も全てに渡って等しくなり、このような耐圧の等しいＰＮ接合領域を６個並列接続した図４のＰＮ接合ダイオードは、図１に示したＰＮ接合ダイオードに比べて、サージ電流に対して３倍の許容量を確保することができる。
【００６９】
図４に例示したＰＮ接合ダイオードでは、６本のＰＮ接合領域を並列接続した。半導体装置の入出力保護素子としてのＰＮ接合ダイオードでは、サージ電流に対する必要な許容量を確保するために、通常は図４に示したＰＮ接合領域が数１０本並列接続される。このように、ＰＮ接合領域を覆うＬＯＣＯＳ酸化膜のブリッジ部の本数を増大した場合においても、等幅に形成されたブリッジ部をもとにしてＰＮ接合領域の幅が全てに渡って等しく形成でき、ブリッジ部の本数に比例してサージ電流に対する許容量を増大することができる。
【００７０】
（第３の実施形態）
第２の実施形態では、ＰＮ接合領域を覆う等幅のブリッジ部を持つＬＯＣＯＳ酸化膜を基礎として、ベースとなるＰ型高濃度拡散領域の両側にエミッタとなるＮ型高濃度拡散領域が配置されたＰＮ接合ダイオードが３個並列配置された構造を持つＰＮ接合ダイオードを示した。第３の実施形態は、ベースとなる複数個のＰ型高濃度拡散領域とエミッタとなる複数個のＮ型高濃度拡散領域が交互に配置された構造を持つＰＮ接合ダイオードに関する。以下、ベースとなる４個のＰ型高濃度拡散領域とエミッタとなる５個のＮ型高濃度拡散領域が交互に配置され、８本のＰＮ接合領域を形成したＰＮ接合ダイオードを一例として、本実施形態について図に基づいて説明する。
【００７１】
図５は、本実施形態におけるＰＮ接合ダイオードの平面図である。第１の実施形態と同様の部分については同一の符号をつけ、その説明を省略する。
【００７２】
図５に示すように、第３の実施形態では、４個のＰ型高濃度拡散領域２１，２２，２３，２４と５個のＮ型高濃度拡散領域３１，３２，３３，３４，３５が交互に配置されており、図中のＬＯＣＯＳ酸化膜のブリッジ部５０１，５０２，５０３，５０４，５０５，５０６，５０７，５０８の幅Ｌ₁，Ｌ₂，Ｌ₃，Ｌ₄，Ｌ₅，Ｌ₆，Ｌ₇，Ｌ₈は、全て等しく設定されている。また、４個のＰ型高濃度拡散領域２１，２２，２３，２４同士は上層電極９ａによって接続されており、５個のＮ型高濃度拡散領域３１，３２，３３，３４，３５同士は上層電極９ｂによって接続されている。本実施形態の図５に示すＰＮ接合ダイオードは、第１実施形態の図２に示した製造方法によって、同じように製造することができる。
【００７３】
本実施形態においても、ＰＮ接合領域を覆うブリッジ部が等幅に設定された高融点絶縁保護膜であるＬＯＣＯＳ酸化膜を基礎としているので、ＰＮ接合領域の幅も全てのＰＮ接合に渡って等しくなり、その結果、全てのＰＮ接合領域の耐圧が等しくなる点は第２実施形態と同様である。一方、第２実施形態の図４のＰＮ接合ダイオードにおいてはＰＮ接合領域が６本形成されているが、同じ占有面積であるにもかかわらず、本実施形態の図５のＰＮ接合ダイオードにおいては、ＰＮ接合領域が８本形成されている。従って、図５のＰＮ接合ダイオードは図４のＰＮ接合ダイオードに比べ、４／３倍のサージ電流に対する許容量を持っている。逆に言えば、同じサージ電流許容量であれば、図５のＰＮ接合ダイオードは図４のＰＮ接合ダイオードに比べ、ダイオード占有面積を３／４に縮小することができる。
【００７４】
図５に例示したＰＮ接合ダイオードでは、８本のＰＮ接合領域を並列接続した。サージ電流に対する必要な許容量を確保するために、図５に示したＰＮ接合領域を数１０本並列接続した場合においても、ＬＯＣＯＳ酸化膜のブリッジ部の本数に比例してサージ電流に対する許容量を増大させることができる点は、第２実施形態と同様である。
【００７５】
（第４の実施形態）
第１〜３の実施形態では、ベースとなるＰ型高濃度拡散領域とエミッタとなるＮ型高濃度拡散領域が、全て同じ大きさで矩形状であるＰＮ接合ダイオードであった。第４の実施形態は、Ｐ型高濃度拡散領域とＮ型高濃度拡散領域が、矩形状ではあるが、大きさが異なる構造を持つＰＮ接合ダイオードに関する。以下、本実施形態について図に基づいて説明する。
【００７６】
図６は、本実施形態におけるＰＮ接合ダイオードの平面図である。第３の実施形態と同様の部分については同一の符号をつけ、その説明を省略する。
【００７７】
図６に示すように、本実施形態においてもＰ型高濃度拡散領域２１，２２，２３，２４とＮ型高濃度拡散領域３１，３２，３３，３４，３５が交互に配置され、ＬＯＣＯＳ酸化膜のブリッジ部５０１，５０２，５０３，５０４，５０５，５０６，５０７，５０８の幅Ｌ₁，Ｌ₂，Ｌ₃，Ｌ₄，Ｌ₅，Ｌ₆，Ｌ₇，Ｌ₈が全て等しく設定されている点は、第３実施形態の図５のＰＮ接合ダイオードと同様である。一方、Ｐ型高濃度拡散領域に対応する４個のＬＯＣＯＳ開口部５２，５４，５６，５８の長さＬ_PとＮ型高濃度拡散領域に対応する５個のＬＯＣＯＳ開口部５１，５３，５５，５７，５９の長さＬ_Nを異なった値にしている点で、図５のＰＮ接合ダイオードと異なっている。
【００７８】
同じ大きさの矩形状のＰ型高濃度拡散領域とＮ型高濃度拡散領域が図５のように並んで配置されると、隣り合ったのＰ型高濃度拡散領域とＮ型高濃度拡散領域の角部同士では、隣り合った辺の中央部同士よりも電界が集中する。このため、許容量を越えた大きなサージ電流が発生すると、図５に示すＰＮ接合ダイオードでは、角部が破壊され易い。一方、本実施形態の図６に示すＰＮ接合ダイオードにおいては、隣り合って配置されるＰ型高濃度拡散領域とＮ型高濃度拡散領域の各々に対応したＬＯＣＯＳ開口部の長さＬ_p，Ｌ_Nを異にして、角部同士の距離をブリッジ部の幅Ｌ₁＝Ｌ₂＝Ｌ₃＝Ｌ₄＝Ｌ₅＝Ｌ₆＝Ｌ₇＝Ｌ₈より長くしている。従って、隣り合って配置されるＰ型高濃度拡散領域とＮ型高濃度拡散領域の角部同士での電流経路の抵抗は、ＰＮ接合領域の幅での電流経路の抵抗より大きい。このようにして角部同士の電界集中を緩和し、サージ電流の角部での集中を回避することで、角部での破壊を低減することができる。
【００７９】
Ｐ型高濃度拡散領域の長さＬ_PとＮ型高濃度拡散領域の長さＬ_Nを変えるに際して、基板がＮ型の場合は、Ｐ型高濃度拡散領域の角部が破壊し易いので、角部の電流集中を避けるにはベースとなるＰ型高濃度拡散領域の長さＬ_PをエミッタとなるＮ型高濃度拡散領域の長さＬ_Nより長くすることが望ましい。逆に、基板がＰ型の場合は、Ｎ型高濃度拡散領域の角部が破壊し易いので、エミッタとなるＮ型高濃度拡散領域の長さＬ_NをベースとなるＰ型高濃度拡散領域の長さＬ_Pより長くすることが望ましい。
【００８０】
（第５の実施形態）
第１〜第４の実施形態のＰＮ接合ダイオードは、高濃度拡散領域に対する下層電極のコンタクト領域とＬＯＣＯＳ開口部との間隔が、全周に渡って等しく配置されたＰＮ接合ダイオードであった。第５の実施形態では、コンタクト領域とＬＯＣＯＳ開口部との間隔が、矩形の等幅ブリッジ部と両端部で異なるＰＮ接合ダイオードに関する。以下、本実施形態について図に基づいて説明する。
【００８１】
図７は、本実施形態におけるＰＮ接合ダイオードの平面図である。第３の実施形態と同様の部分については同一の符号をつけ、その説明を省略する。
【００８２】
図７に示すように、本実施形態におけるＰＮ接合ダイオードは、各高濃度拡散領域２１，２２，２３，２４，３１，３２，３３，３４，３５に対する各下層電極のコンタクト領域７１，７２，７３，７４，７５，７６，７７，７８，７９とＬＯＣＯＳ開口部５０との間隔に関して、矩形の両端部での間隔Ｌ_yが、等幅ブリッジ部での間隔Ｌ_xより大きくなるように（Ｌ_x＜Ｌ_y）配置されている。
【００８３】
各高濃度拡散領域２１，２２，２３，２４，３１，３２，３３，３４，３５と下層電極７ａ，７ｂでは下層電極のほうが比抵抗が小さいため、等幅ブリッジ部での間隔Ｌ_xより矩形の両端部での間隔Ｌ_yを大きくすることで、端部までの電流経路の抵抗が大きくなる。従って、端部に流れ込む電流が減って、端部でサージ電流の集中を回避することができる。
【００８４】
（第６の実施形態）
第１〜３の実施形態では、ベースとなるＰ型高濃度拡散領域とエミッタとなるＮ型高濃度拡散領域が、全て同じ大きさで矩形状であるＰＮ接合ダイオードであった。第６の実施形態は、Ｐ型高濃度拡散領域とＮ型高濃度拡散領域が、同じ大きさではあるが、略矩形状で角部が丸められている構造を持つＰＮ接合ダイオードに関する。以下、本実施形態について図に基づいて説明する。
【００８５】
図８は、本実施形態におけるＰＮ接合ダイオードの平面図である。第３の実施形態と同様の部分については同一の符号をつけ、その説明を省略する。
【００８６】
図８に示すように、本実施形態においてもＰ型高濃度拡散領域２１，２２，２３，２４とＮ型高濃度拡散領域３１，３２，３３，３４，３５が交互に配置され、ＬＯＣＯＳ酸化膜のブリッジ部５０１，５０２，５０３，５０４，５０５，５０６，５０７，５０８の幅Ｌ₁，Ｌ₂，Ｌ₃，Ｌ₄，Ｌ₅，Ｌ₆，Ｌ₇，Ｌ₈が全て等しく設定されている点は、第３実施形態の図５のＰＮ接合ダイオードと同様である。一方、Ｐ型高濃度拡散領域とＮ型高濃度拡散領域に対応する９個のＬＯＣＯＳ開口部５０の矩形の角部が丸められている点で、図５のＰＮ接合ダイオードと異なっている。
【００８７】
本実施形態においては、隣り合って配置されるＰ型高濃度拡散領域とＮ型高濃度拡散領域に対応するＬＯＣＯＳ開口部の矩形の角部を丸めることで、角部同士の距離をブリッジ部の幅Ｌ₁＝Ｌ₂＝Ｌ₃＝Ｌ₄＝Ｌ₅＝Ｌ₆＝Ｌ₇＝Ｌ₈より長くしている。これにより、第４実施形態と同様に、サージ電流の角部での集中を回避し、図５のＰＮ接合ダイオードで起きる角部での破壊を低減することができる。
【００８８】
また、図６に示すＰＮ接合ダイオードのＰＮ接合領域の実質的な長さがＬ_Nであるのに対し、図８に示すＰＮ接合ダイオードのＰＮ接合領域の長さはＬ_PNとなる（Ｌ_PN＝Ｌ_P＞Ｌ_N）。従って、図８のＰＮ接合ダイオードは、図６のＰＮ接合ダイオードに比べ、サージ電流に対してより大きな許容量を持っている。
【００８９】
尚、図８に示すＰＮ接合ダイオードではＬＯＣＯＳ開口部５０の矩形の角部が丸められており、一方高濃度拡散領域２１，３１に対するコンタクト領域７１，７２は矩形形状のままで、コンタクト領域７１，７２とＬＯＣＯＳ開口部５０との間隔に関して、矩形の両端部での間隔が、等幅ブリッジ部での間隔より大きくなるように配置されている。従って、第５の実施形態と同様に、端部に流れ込む電流が減って、端部でサージ電流の集中を回避する効果も有する。
【００９０】
（第７の実施形態）
第４の実施形態は、ベースとなるＰ型高濃度拡散領域とエミッタとなるＮ型高濃度拡散領域が矩形状で大きさの異なるＰＮ接合ダイオードであった。また、第６の実施形態は、ベースとなるＰ型高濃度拡散領域とエミッタとなるＮ型高濃度拡散領域が、同じ大きさではあるが角部が丸められた略矩形状のＰＮ接合ダイオードであった。第７の実施形態では、Ｐ型高濃度拡散領域とＮ型高濃度拡散領域が、大きさの異なる略矩形状であることに加え、各拡散領域の略矩形状の終端部に、各拡散領域と同型の低濃度拡散ウェルを形成した構造を持つＰＮ接合ダイオードに関する。以下、本実施形態について図に基づいて説明する。
【００９１】
図９（ａ）は本実施形態におけるＰＮ接合ダイオードの平面図であり、図９（ｂ）は、図９（ａ）におけるＡ−Ａ’線に沿った拡大断面図である。第４の実施形態と同様の部分については同一の符号をつけ、その説明を省略する。
【００９２】
図９（ａ）に示すように、本実施形態においては、Ｐ型高濃度拡散領域２１，２２，２３，２４とＮ型高濃度拡散領域３１，３２，３３，３４，３５が交互に配置され、４個のＬＯＣＯＳ開口部５２，５４，５６，５８の長さＬ_PとＮ型高濃度拡散領域に対応する５個のＬＯＣＯＳ開口部５１，５３，５５，５７，５９の長さＬ_Nは異なった値となっている。また、図中、ＬＯＣＯＳ酸化膜のブリッジ部５０１，５０２，５０３，５０４，５０５，５０６，５０７，５０８の幅Ｌ₁，Ｌ₂，Ｌ₃，Ｌ₄，Ｌ₅，Ｌ₆，Ｌ₇，Ｌ₈は全て等しく設定されているが、Ｐ型高濃度拡散領域に対応するＬＯＣＯＳ開口部５２，５４，５６，５８とＮ型高濃度拡散領域に対応するＬＯＣＯＳ開口部５１，５３，５５，５７，５９は、いずれも角部が丸めらた略矩形状となっている。本実施形態においては、さらに、略矩形状の各拡散領域の終端部の周囲に各拡散領域と同型の低濃度拡散ウェル２０２〜２０９，３０２〜３１１が形成されている。低濃度拡散ウェル２０２〜２０９，３０２〜３１１の拡散深さは、約５μｍである。
【００９３】
本実施形態のＰＮ接合ダイオードの製造工程においては、最初に低濃度拡散ウェル２０２〜２０９，３０２〜３１１を形成した後、第１実施形態の図２に示した製造工程によって、同じように製造することができる。低濃度拡散ウェル２０２〜２０９，３０２〜３１１の形成は、ダイオードと共に形成されるＣＭＯＳ製造工程の図３（ａ）に示したＰ型ウェル領域とＮ型ウェル領域の形成と同じ条件であれば、同時に行なうことができる。
【００９４】
本実施形態においては、各拡散領域の終端部の周囲に同型の低濃度拡散ウェルを形成しているので、終端部の耐圧が上り、終端部でのサージ電流の集中を回避することができる。また、図９のＰＮ接合ダイオードにおいては、終端部での低濃度拡散ウェルの形成に加えて、第６実施形態と同様にＰ型高濃度拡散領域とＮ型高濃度拡散領域を角部が丸められた略矩形状にしており、第４実施形態と同様にＰ型高濃度拡散領域とＮ型高濃度拡散領域の大きさが異なったものにしている。従って、大きなサージ電流が発生した際の角部での電界集中による破壊に対しては、図９のＰＮ接合ダイオードでは、図６や図８のＰＮ接合ダイオードに比べ、さらにサージ耐量がより大きくなっている。
【００９５】
尚、各拡散領域の終端部の周囲に低濃度拡散ウェルを形成することは、第１〜第６の実施形態で説明したＰＮ接合ダイオードに適用しても良いことは、言うまでもない。
【００９６】
（第８の実施形態）
第１〜第７の実施形態は、上層電極が矩形形状であり、上層電極の電極幅が一定のＰＮ接合ダイオードであった。第８の実施形態では、上層電極が矩形形状ではなく、並んだＬＯＣＯＳ開口部を横断して配置される上層電極の電極幅が、パッドに近くなるほど大きく設定されているＰＮ接合ダイオードに関する。以下、本実施形態について図に基づいて説明する。
【００９７】
図１０は、本実施形態におけるＰＮ接合ダイオードの平面図である。第３の実施形態と同様の部分については同一の符号をつけ、その説明を省略する。
図１０に示すように、本実施形態におけるＰＮ接合ダイオードは、パッド９０ａ，９０ｂがＬＯＣＯＳ開口部５０を間に挟んでその両側に配置されており、各上層電極９ａ，９ｂの電極幅Ｌ_ea，Ｌ_ebが、それぞれ、パッド９０ａ，９０ｂに近くなるほど大きく設定されている。これに従って、下層電極７ａに接続する上層電極９ａのコンタクト領域９２，９４，９６，９８の長さもパッド９０ａに近くなるほど長く設定されており、下層電極７ｂに接続する上層電極９ｂのコンタクト領域９１，９３，９５，９７，９９の長さもパッド９０ｂに近くなるほど長く設定されている。
【００９８】
サージ電流は一方のパッドから流入し，もう一方のパッドから流出していくので、それぞれ、対応する下層電極７ａ，７ｂを並列接続している上層電極９ａ，９ｂにおいては、それぞれのパッド９０ａ，９０ｂに近いほど大きなサージ電流が流れる。従って、上層電極９ａ，９ｂにおいてそれぞれパッド９０ａ，９０ｂに近い部分ほど幅を大きくきくすることで、サージ電流を均一に流すことができ、パッド近くでのサージ電流による破壊を防止することができる。
【００９９】
（第９の実施形態）
第６の実施形態は、Ｐ型高濃度拡散領域とＮ型高濃度拡散領域が、同じ大きさで矩形の角部が丸められたＰＮ接合ダイオードであった。第９の実施形態では、Ｐ型高濃度拡散領域とＮ型高濃度拡散領域が、同心円状に等間隔に配置されている構造を持つＰＮ接合ダイオードに関する。以下、本実施形態について図に基づいて説明する。
【０１００】
図１１に、本実施形態におけるＰＮ接合ダイオードを示す。図１１（ａ）は本実施形態におけるＰＮ接合ダイオードの平面図であり、図１１（ｂ）は図１１（ａ）におけるＡ−Ａ’線に沿った拡大断面図である。尚、第６の実施形態と同様の部分については同一の符号をつけその説明を省略するが、図１１では、図１で示したＴＥＯＳからなる上層の層間絶縁膜８、Ａｌからなる上層電極９ａ，９ｂ、ＳｉＮからなる保護膜１０は図示を省略した。
【０１０１】
図１１に示すように、本実施形態では、３個のＰ型高濃度拡散領域２１，２２，２３と２個のＮ型高濃度拡散領域３１，３２が、交互に等間隔に同心円状に配置されている。図中のＬＯＣＯＳ酸化膜のブリッジ部５０１，５０２，５０３，５０４の幅Ｌ₁，Ｌ₂，Ｌ₃，Ｌ₄は、全て等しく設定されている。
【０１０２】
図１１に示すＰＮ接合ダイオードおいては、５個のＬＯＣＯＳ開口部５１，５２，５３，５４，５５とそれに対応したＰ型高濃度拡散領域およびＮ型高濃度拡散領域が円形状になっているので、矩形状の拡散領域のような角部が存在しない。従って、角部同士でのサージ電流の集中といったことも起こり得ず、円周の全域にわたってサージ電流を半径方向に均等に流すことができる。このように、図１１に示したＰＮ接合ダイオードはＰＮ接合領域が無駄なく配置されており、第６の実施形態である図８のＰＮ接合ダイオードと比べても、さらに小型化されたＰＮ接合ダイオードとなっている。
【０１０３】
（第１０の実施形態）
第１〜９の実施形態は、いずれも、ベースとなるＰ型高濃度拡散領域とエミッタとなるＮ型高濃度拡散領域の形状と配置を最適にして、サージ耐量を高めたものであった。第１０の実施形態では、Ｐ型高濃度拡散領域とＮ型高濃度拡散領域の形状と配置に加えて、ＰＮ接合ダイオードの周囲をＰ型の第３高濃度拡散領域で取り囲み、電極を介して接地した構造に関する。以下、本実施形態について図に基づいて説明する。
【０１０４】
図１２に、本実施形態におけるＰＮ接合ダイオードを示す。図１２（ａ）は本実施形態におけるＰＮ接合ダイオードの平面図であり、図１２（ｂ）は図１２（ａ）におけるＡ−Ａ’線に沿った拡大断面図である。尚、第４の実施形態と同様の部分については同一の符号をつけその説明を省略するが、図１２では、図１で示したＴＥＯＳからなる上層の層間絶縁膜８、Ａｌからなる上層電極９ａ，９ｂ、ＳｉＮからなる保護膜１０は図示を省略した。
【０１０５】
図１２に示す本実施形態のＰＮ接合ダイオードでは、２個のＰ型高濃度拡散領域２１，２２と３個のＮ型高濃度拡散領域３１，３２，３３が交互に配置されているが、これら５個の拡散領域２１，２２，３１，３２，３３の下にＰ型の第３高濃度拡散領域２２０を配し、さらに５個の拡散領域２１，２２，３１，３２，３３の周りを、ＬＯＣＯＳ酸化膜の外周部５００ｒ，５０１ｒに形成した開口部５０ｒとそれに対応したＰ型の第３高濃度拡散領域２２１で取り囲んだ構造となっている。Ｐ型の第３高濃度拡散領域２２０，２２１は、図１２（ｂ）に示すように接続しており、コンタクト部７０ｒと電極７ｒを介して接地されている。
【０１０６】
図１２に示すＰＮ接合ダイオードの製造方法は、最初に、低濃度Ｎ型シリコン（半導体）基板１１に酸化シリコン膜を積層した後に所定部分を開口し、１×１０¹³ｃｍ^-2の条件でボロン（Ｂ）をイオン注入して、Ｐ型の埋め込み層である第３高濃度拡散領域２２０を形成しておく。次に、酸化シリコン膜を除去した後、低濃度Ｎ型シリコン層１を１０μｍエピタキシャル成長する。その後、所定部分に１×１０¹³ｃｍ^-2の条件でボロン（Ｂ）をイオン注入して、アイソレーション層であるＰ型の第３高濃度拡散領域２２１を形成する。これにより、ダイオード形成位置を取り囲んだ構造の第３高濃度拡散領域２２０，２２１が完成する。その後は、第１実施形態の図２に示した製造工程に従い、本実施形態のＰＮ接合ダイオードを製造することができる。
【０１０７】
本実施形態においては、ＰＮ接合ダイオードを接地されたＰ型の第３高濃度拡散領域２２０，２２１で取り囲んでいるので、サージ電流が大きくてＰＮ接合領域では吸収できず溢れ出た状態になっても、ダイオードを取り囲んだＰ型の第３高濃度拡散領域２２０，２２１が溢れ出たサージ電流であるノイズ（注入された電子、ホール）を吸収する。従って、ダイオードの周辺に形成された半導体装置において、サージ電流によって発生したノイズによるＬＯＧＩＣ回路の誤動作を防止することができる。
【０１０８】
（第１１の実施形態）
第１０の実施形態は、ＰＮ接合ダイオードの周囲をＰ型の第３高濃度拡散領域で取り囲んで、サージ電流が大きな場合におけるダイオードの周辺に形成された半導体装置の誤動作を防止するものであった。第１１の実施形態では、Ｐ型の第３高濃度拡散領に変えて、ＰＮ接合ダイオードの周囲を絶縁領域で取り囲んだ構造に関する。以下、本実施形態について図に基づいて説明する。
【０１０９】
図１３に、本実施形態におけるＰＮ接合ダイオードを示す。図１３（ａ）は本実施形態におけるＰＮ接合ダイオードの平面図であり、図１３（ｂ）は図１３（ａ）におけるＡ−Ａ’線に沿った拡大断面図である。尚、第１０の実施形態と同様の部分については同一の符号をつけその説明を省略するが、図１３では、図１で示したＴＥＯＳからなる上層の層間絶縁膜８、Ａｌからなる上層電極９ａ，９ｂ、ＳｉＮからなる保護膜１０は図示を省略した。
【０１１０】
図１３に示す本実施形態では、２個のＰ型高濃度拡散領域２１，２２と３個のＮ型高濃度拡散領域３１，３２，３３が交互に配置されているが、これら５個の拡散領域２１，２２，３１，３２，３３の周りを、ＬＯＣＯＳ酸化膜の外周部５００ｒの下にある絶縁領域４０１，４０２で取り囲んだ構造のＰＮ接合ダイオードとなっている。
【０１１１】
図１３に示すＰＮ接合ダイオードの製造方法は、最初に低濃度Ｎ型シリコン（半導体）基板１１を２枚用意し、一方の基板表面を酸化して酸化シリコン膜４０２を形成する。次に、通常の方法で、２枚の基板を貼り合わせて、貼り合わせ基板を形成する。その後、酸化したほうの基板を研磨して、１０μｍ厚の低濃度Ｎ型シリコン層１に加工する。次に、レジストあるいは酸化膜をマスクにして、埋め込み酸化シリコン膜４０２に到達するまで低濃度Ｎ型シリコン層１をほぼ垂直にドライエッチングし、溝を形成する。次に、溝の側壁を熱酸化して酸化シリコン（ＳｉＯ₂）膜４０１を形成した後、ポリシリコン（Ｓｉ）７００を積層して、溝を塞ぐ。その後、表面に残ったポリシリコンをエッチバックし、化学機械研磨で表面を平らにする。これにより、ダイオード形成位置を取り囲んだ構造の絶縁領域４０１，４０２が完成する。その後は、第１実施形態の図２に示した製造工程に従い、本実施形態のＰＮ接合ダイオードを製造することができる。図１３（ａ）の平面図においては、酸化シリコン（ＳｉＯ₂）膜４０１とポリシリコン（Ｓｉ）７００は、それぞれ実線で示した。
【０１１２】
本実施形態においては、ＰＮ接合ダイオードを絶縁領域４０１，４０２で取り囲んでいるので、サージ電流が大きくてＰＮ接合領域から溢れ出た状態になっても、ダイオードを取り囲んだ絶縁領域４０１，４０２が溢れ出たサージ電流を完全に遮断する。従って、ダイオードの周辺に形成された半導体装置において、溢れ出たサージ電流によって発生するノイズによる誤動作を防止することができる。
【０１１３】
（他の実施形態）
上記各実施形態においては、高融点絶縁保護膜としてＬＯＣＯＳ酸化膜を用いたが、これに限らず、酸化シリコン（ＳｉＯ）膜であってもよいし、窒化シリコン（ＳｉＮ）膜であってもよい。また、これらの膜を積層して使用することも可能である。
【０１１４】
さらに、これら高融点絶縁保護膜の形成方法としては、物理的あるいは化学的な気相成長により膜形成してもよいし、ＬＯＣＯＳ酸化膜の形成で用いられたように、基板の酸化処理や窒化処理によって膜形成してもよい。
【０１１５】
また、上記実施形態において、基板として低濃度Ｎ型シリコン基板を用いたが、これに限らず、低濃度Ｐ型シリコン基板であってもよい。さらに、任意のシリコン基板上に、厚さ１０μｍ以上でＮ型あるいはＰ型の不純物を低濃度に含有するエピタキシャル膜を形成した基板を用いてもよい。
【０１１６】
以上述べたように、本案によれば容易にサージ耐量の高い保護素子を実現でき、ＩＣ設計技術向上に寄与するところ大である。
【図面の簡単な説明】
【図１】（ａ）は本発明における第１の実施形態のダイオードの構造を示す平面図であり、（ｂ）はその拡大断面図である。
【図２】本発明におけるダイオードの概略の製造工程を示す工程別の断面図である。
【図３】本発明のダイオードと共に同じ基板の別位置に形成されるＣＭＯＳ半導体装置の概略の製造工程を示す工程別の断面図である。
【図４】本発明における第２の実施形態のダイオードの構造を示す平面図である。
【図５】本発明における第３の実施形態のダイオードの構造を示す平面図である。
【図６】本発明における第４の実施形態のダイオードの構造を示す平面図である。
【図７】本発明における第５の実施形態のダイオードの構造を示す平面図である。
【図８】本発明における第６の実施形態のダイオードの構造を示す平面図である。
【図９】（ａ）は本発明における第７の実施形態のダイオードの構造を示す平面図であり、（ｂ）はその拡大断面図である。
【図１０】本発明における第８の実施形態のダイオードの構造を示す平面図である。
【図１１】（ａ）は本発明における第９の実施形態のダイオードの構造を示す平面図であり、（ｂ）はその拡大断面図である。
【図１２】（ａ）は本発明における第１０の実施形態のダイオードの構造を示す平面図であり、（ｂ）はその拡大断面図である。
【図１３】（ａ）は本発明における第１１の実施形態のダイオードの構造を示す平面図であり、（ｂ）はその拡大断面図である。
【図１４】（ａ）は従来のダイオードの構造を示す平面図であり、（ｂ）はその拡大断面図である。
【図１５】従来のダイオードの概略の製造工程を示す工程別の断面図である。
【符号の説明】
１低濃度Ｎ型シリコン基板
２Ｐ型高濃度拡散領域（ベース）
３ａ、３ｂＮ型高濃度拡散領域（エミッタ）
４ａ、４ｂＰＮ接合領域
５下層の層間絶縁膜（ＢＰＳＧ）
５０ＬＯＣＯＳ酸化膜の開口部
５００ＬＯＣＯＳ酸化膜（高融点絶縁保護膜）
５００ａ、５００ｂＬＯＣＯＳ酸化膜のブリッジ部
７ａ、７ｂ下層電極（Ａｌ）
８上層の層間絶縁膜（ＴＥＯＳ）
９ａ、９ｂ上層電極（Ａｌ）
９０ａ、９０ｂパッド
１０保護膜（ＳｉＮ）[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a diode and a manufacturing method thereof, and more particularly to a PN junction diode used for input / output protection of a semiconductor device and a manufacturing method thereof.
[0002]
[Prior art]
In semiconductor devices, PN junction diodes have conventionally been mainly used as input / output protection elements of semiconductor devices in order to prevent them from being destroyed by electrostatic discharge (ESD) or surge voltage / current. It was. An example of this type of PN junction diode is a PN junction diode as shown in FIG.
[0003]
FIG. 14A is a plan view of a conventional PN junction diode, and FIG. 14B is an enlarged cross-sectional view along the line A-A ′ in FIG.
[0004]
In the conventional PN junction diode shown in FIGS. 14A and 14B, as can be seen from FIG. 14B, a P-type high-concentration diffusion region 2 serving as a base is formed on a low-concentration N-type silicon (semiconductor) substrate 1. N-type high-concentration diffusion regions 3a and 3b serving as emitters are disposed on both sides of the base, and semiconductor portions between the base and the emitter become PN junction regions 4a and 4b, thereby forming a PN junction diode. Has been. In the plan view of FIG. 14A, the P-type high concentration diffusion region 2 and the N-type high concentration diffusion regions 3a and 3b are indicated by broken lines, respectively.
[0005]
As shown in FIG. 14B, the P-type high concentration diffusion region 2 and the N-type high concentration diffusion regions 3a and 3b are respectively connected to the Al electrodes 7a, 7a through the openings of the interlayer insulating film 5 made of BPSG. 7b is connected. As shown in the plan view of FIG. 14A, the base electrode connected to the P-type high concentration diffusion region 2 is 7a, and the N-type high concentration diffusion regions 3a and 3b are connected to each other by the emitter electrode 7b. Yes. In the plan view of FIG. 14A, the electrodes 7a and 7b are indicated by solid lines, and the high concentration diffusion regions 2, 3a and 3b and the contact regions 71, 72 and 73 of the electrodes 7a and 7b are indicated by dotted lines. It is shown in Further, the entire diode is covered with a protective film 10 made of silicon nitride (SiN), and is connected to the outside through pads 70a and 70b indicated by solid lines in FIG. 14A formed in the opening of the protective film 10. The
[0006]
In the plan view of FIG. 14A, each of the high concentration diffusion regions 2, 3a, 3b has a rectangular shape of about 10 μm × 500 μm. In a PN junction diode as an input / output protection element of a semiconductor device, several tens of PN junction diodes shown in FIG. 14 are normally connected in parallel to cope with a large surge current.
[0007]
Next, a manufacturing method of the PN junction diode shown in FIG. 14 will be described with reference to FIG. FIG. 15 shows an enlarged cross section along the line A-A ′ in FIG.
[0008]
As shown in FIG. 15A, a first mask 100 corresponding to the base is formed on the low-concentration N-type silicon (semiconductor) substrate 1, and P-type impurities are ion-implanted at a high concentration. A P-type high concentration diffusion region 2 is formed.
[0009]
Next, as shown in FIG. 15B, after removing the first mask 100 corresponding to the base, a second mask 101 corresponding to the emitter is formed, and N-type impurities are ion-implanted at a high concentration. Then, N-type high concentration diffusion regions 3a and 3b serving as emitters are formed on both sides of the P-type high concentration diffusion region 2 serving as a base. As a result, the semiconductor portion between the P-type high concentration diffusion region 2 and the N-type high concentration diffusion regions 3a and 3b becomes the PN junction regions 4a and 4b.
[0010]
Next, as shown in FIG. 15C, after removing the second mask 101 corresponding to the emitter, a BPSG film is laminated on the entire surface as the interlayer insulating film 5, and the P-type high-concentration diffusion region 2 and the N-type are formed. Openings 61, 62, 63 for connecting to the high concentration diffusion regions 3a, 3b are formed.
[0011]
Next, as shown in FIG. 15D, an Al film is laminated on the entire surface, and then patterned into a predetermined shape to form a base electrode 7a and an emitter electrode 7b.
[0012]
Next, as shown in FIG. 15E, after a SiN film as a protective film 10 is laminated on the entire surface, a pad opening for connection to the outside is formed, and the PN junction diode shown in FIG. Is completed.
[0013]
[Problems to be solved by the invention]
When a surge such as ESD is applied to the N-type high concentration diffusion regions 3a and 3b in FIG. 14 which are emitters, the PN junction regions 4a and 4b are immediately reverse-biased to generate avalanche, and the surge current is generated at the emitter. It flows from a certain N-type high concentration diffusion region 3a, 3b to a P-type high concentration diffusion region 2 which is a base. In the PN junction diode having the structure shown in FIG. 14, the base P-type high-concentration diffusion region 2 and the emitter N-type high-concentration diffusion regions 3a and 3b are separated from each other._ca, L_cbThere is. This width L_ca, L_cbAre set equal in the design stage.
[0014]
However, in the PN junction diode having the structure shown in FIG. 14, as shown in FIG. 15, the P-type high concentration diffusion region 2 and the N-type high concentration diffusion regions 3a and 3b are separately ionized using dedicated photomasks. It is formed by injection. Therefore, when the mask is misaligned, as shown in FIG. 14B, the width L of the PN junction regions 4a and 4b._ca, L_cbAre different (in the figure, L_ca<L_cb). As a result, the junction breakdown voltage of the narrow PN junction region 4a is lower than the junction breakdown voltage of the wide PN junction region 4b. As indicated by the difference in the thickness of the arrows in the figure, a larger surge current flows in the narrow PN junction region 4a than in the wide PN junction region 4b. That is, in the manufacturing process, the width L as shown in FIG._ca, L_cbIn the diode having different values, the surge current is biased toward the PN junction region having a low junction breakdown voltage, so that the withstand capability against the surge of the element is lowered as compared with the designed diode without mask alignment deviation. In the diode in which a plurality of diodes shown in FIG. 14 are connected in parallel, if the width of the PN junction region varies during the manufacturing process, the characteristics of the diode are substantially controlled by the characteristics of the PN junction region having the narrowest width. Thus, the effect of parallel connection to cope with a large surge current cannot be obtained.
[0015]
Further, in the PN junction diode having the structure of FIG. 14, the interlayer insulating film 5 is formed of a BPSG film. When a large surge current flows, the PN junction regions 4a and 4b are heated to a high temperature of about 900 ° C. by the surge energy. Thus, there is a problem that the BPSG film is partially dissolved. Once the BPSG film has melted, the surge current disappears, and the BPSG film after returning to room temperature and solidifying deteriorates the insulating action, and leak current is likely to occur in the PN junction regions 4a and 4b.
[0016]
Further, in the PN junction diode having the structure of FIG. 14, as shown in the plan view of FIG. 14A, the width of the Al wirings 7a and 7b connected to the respective high concentration diffusion regions 2, 3a and 3b can be widened. Therefore, the wiring width is not sufficient for a large surge current, and there is a problem that the wiring is burnt out.
[0017]
Accordingly, an object of the present invention is to provide a PN junction diode that can flow a surge current uniformly and has a high surge resistance, and a method for manufacturing the same.
[0018]
[Means for Solving the Problems]
According to the first aspect of the present invention, there is provided a LOCOS oxide film including three openings disposed on a semiconductor and divided by two equal width bridge portions, and an opening at the center of the three openings. Deeper than the LOCOS oxide film through the semiconductor, and deeper than the LOCOS oxide film through the first high-concentration diffusion region of P-type or N-type and the openings at both ends of the three openings. A monolithic bridge having two second high-concentration diffusion regions, each of which is disposed in the first P-type or N-type opposite to the first high-concentration diffusion region, and includes the two LOCOS oxide films. Two PN junction regions made of semiconductor between the first high-concentration diffusion region and the second high-concentration diffusion region are formed at equal widths, and the two second high-concentration diffusion regions The regions are connected to each other via electrodesThe planar shape of the opening of the LOCOS oxide film is a rectangle having a long side of the equal-width bridge made of the LOCOS oxide film, and the opening for forming the first high-concentration diffusion region and the The length in the direction along the equal width bridge made of the LOCOS oxide film is different from the opening for forming the second high concentration diffusion region.It is set as the diode characterized by this.
[0019]
  According to this, as a mask for forming the first high concentration diffusion region and the second high concentration diffusion region, a commonLOCOS oxide filmTherefore, PN junction regions having the same width can be formed on both sides of the first high concentration diffusion region. For this reason, the surge current is not biased to one of the PN junctions connected in parallel, and the surge resistance of the diode can be substantially increased.
[0020]
  The LOCOS oxide film disposed on the PN junction region is not a film having a melting point of 1000 ° C. or lower like the BPSG film, but has a melting point higher than that of silicon (Si, melting point 1420 ° C.). Even if a current flows and the PN junction generates heat, the LOCOS oxide film has a higher melting point than Si serving as the substrate, so that the LOCOS oxide film does not melt before the substrate Si. Therefore, once a large surge current flows, the protective effect against the surge current can be maintained without deteriorating the insulating action and making it unusable thereafter.
In the diode, the planar shape of the opening of the LOCOS oxide film is a rectangle having a long side of the equal-width bridge portion made of the LOCOS oxide film. Thereby, the planar shape of the first high-concentration diffusion region and the second high-concentration diffusion region disposed in the semiconductor deeper than the LOCOS oxide film through the opening is also the equal-width bridge portion formed of the LOCOS oxide film. Is formed in a rectangular shape having a longitudinal direction. According to this, since the PN junction region is formed between the adjacent rectangular first high-concentration diffusion region and second high-concentration diffusion region with the same width throughout the longitudinal direction, the entire PN junction region is spread over the entire longitudinal direction. Surge current can flow evenly. Therefore, the surge resistance of the diode can be substantially increased.
In the diode, the opening for forming the first high-concentration diffusion region and the opening for forming the second high-concentration diffusion region are along a uniform width bridge made of the LOCOS oxide film. The lengths in different directions are different. As a result, the longitudinal lengths of the first term high concentration diffusion region and the second high concentration diffusion region are different, and the distance between the corners of the first high concentration diffusion region and the second high concentration diffusion region is different. Becomes longer than the width of the PN junction region. When the lengths in the longitudinal direction of adjacent first term high-concentration diffusion regions and second high-concentration diffusion regions are equal, surge currents tend to concentrate at the corners, but the lengths in the longitudinal direction are different as described above. By arranging in this way, the resistance of the current path is increased between the corners, and the surge current can be prevented from concentrating between the corners.
[0021]
  According to a second aspect of the present invention, there is provided a LOCOS oxide film including three openings arranged on a semiconductor and divided by two equal-width bridge portions as one set of opening groups, and m sets of the opening groups. , M first high-concentration diffusions that are arranged in the semiconductor deeper than the LOCOS oxide film through the central opening of each of the m sets of openings and are made of either P-type or N-type. The region is disposed in the semiconductor deeper than the LOCOS oxide film through the openings at both ends of each of the m groups of openings, and the first high-concentration diffusion region is formed in a P-type or N-type that is opposite to the first high-concentration diffusion region 2 m second high-concentration diffusion regions, and disposed under a uniform width bridge portion made of two LOCOS oxide films in each of the m sets of aperture groups, and the first high-concentration diffusion region and the The PN junction region made of semiconductor between the second high-concentration diffusion regions has the same width. m is the formation, the first high concentration diffusion region between the said m are connected with each other through the electrode, a second highly doped regions between the 2m pieces are connected with each other through the electrodeThe planar shape of the opening of the LOCOS oxide film is a rectangle having a long side of the equal-width bridge made of the LOCOS oxide film, and the opening for forming the first high-concentration diffusion region and the The length in the direction along the equal width bridge made of the LOCOS oxide film is different from the opening for forming the second high concentration diffusion region.It is set as the diode characterized by this.
[0022]
  According to this, by connecting 2 m PN junctions in parallel, it is possible to secure a necessary surge resistance even for a large surge current, and the width of the PN junction region through the opening of the LOCOS oxide film. Are equally arranged over all the PN junctions, the surge current is not biased to any one of the PN junctions, and the surge resistance of the diode against the surge current can be substantially increased. Further, since the LOCOS oxide film is disposed on the PN junction region, the protective action against the surge current can be maintained as described above.
  In the diode, as in the diode according to claim 1, the planar shape of the opening of the LOCOS oxide film is a rectangle whose long side is the equal-width bridge portion made of the LOCOS oxide film. The surge current can be made to flow uniformly over the entire length of the adjacent rectangular first high concentration diffusion region and second high concentration diffusion region, and the surge resistance of the diode can be substantially increased. Further, the opening for forming the first high concentration diffusion region and the opening for forming the second high concentration diffusion region have a length in a direction along the equal width bridge made of the LOCOS oxide film. By making these different, the resistance of the current path increases between the corners of the adjacent first high-concentration diffusion region and the second high-concentration diffusion region, and concentration of surge current can be avoided between the corners. it can.
[0023]
  According to a third aspect of the present invention, a LOCOS oxide film including (n + 1) openings arranged on a semiconductor and divided by n equal-width bridge portions, and among the (n + 1) openings A plurality of one type of P-type or N-type is disposed in the semiconductor deeper than the LOCOS oxide film through each opening of the first opening group consisting of every other opening. Via a pair of first high-concentration diffusion regions and each opening of a second opening group consisting of every other opening adjacent to each opening of the first opening group. A set of a plurality of second high-concentration diffusion regions disposed in a semiconductor deeper than the LOCOS oxide film and made of P-type or N-type opposite to the first high-concentration diffusion regions; Each of the LOCOS oxide films is disposed under the equal width bridge portion, and the front N PN junction regions made of a semiconductor between the first high concentration diffusion region and the second high concentration diffusion region are formed with an equal width, and the plurality of first high concentration diffusion regions are mutually connected via electrodes. The plurality of second high concentration diffusion regions are connected to each other through electrodes.The planar shape of the opening of the LOCOS oxide film is a rectangle having a long side of the equal-width bridge made of the LOCOS oxide film, and the opening for forming the first high-concentration diffusion region and the The length in the direction along the equal width bridge made of the LOCOS oxide film is different from the opening for forming the second high concentration diffusion region.It is set as the diode characterized by this.
[0024]
  According to this, the first high-concentration diffusion region and the second high-concentration diffusion region are alternately arranged adjacent to each other, and n PN junctions are connected in parallel, thereby ensuring the necessary surge withstand and the diode. It can be downsized. In addition, since the width of the PN junction region is uniformly arranged over all the PN junctions through the opening of the LOCOS oxide film, the surge current is not biased to any one of the PN junctions, and the diode against the surge current The surge resistance can be substantially increased. Further, since the LOCOS oxide film is disposed on the PN junction region, the protective action against the surge current can be maintained as described above.
  In the diode, as in the diode according to claim 1, the planar shape of the opening of the LOCOS oxide film is a rectangle whose long side is the equal-width bridge portion made of the LOCOS oxide film. The surge current can be made to flow uniformly over the entire length of the adjacent rectangular first high concentration diffusion region and second high concentration diffusion region, and the surge resistance of the diode can be substantially increased. Further, the opening for forming the first high concentration diffusion region and the opening for forming the second high concentration diffusion region have a length in a direction along the equal width bridge made of the LOCOS oxide film. By making these different, the resistance of the current path increases between the corners of the adjacent first high-concentration diffusion region and the second high-concentration diffusion region, and concentration of surge current can be avoided between the corners. it can.
[0027]
  Claim4The invention described in 1 is characterized in that a corner of the rectangular opening of the LOCOS oxide film is rounded to form a substantially rectangular shape. As a result, the first high-concentration diffusion region and the second high-concentration diffusion region formed through the opening are also formed in a substantially rectangular shape with rounded corners, so that the distance between the longitudinal ends of the two is high. Becomes longer than the width of the PN junction region. For this reason, it is possible to avoid the surge current from being concentrated between the end portions of the first high concentration diffusion region and the second high concentration diffusion region.
[0028]
  Claim5According to the invention described in the above, in at least one of the first high-concentration diffusion region and the second high-concentration diffusion region formed in a rectangular shape through the rectangular opening, the periphery of both end portions in the longitudinal direction In addition, a low-concentration diffusion region having a lower concentration than that of the one high-concentration diffusion region is formed by the same type of impurity as the one high-concentration diffusion region. According to this, by forming the same type low-concentration diffusion region around both ends in the longitudinal direction, the withstand voltage at both ends increases, and the surge current concentration at both ends can be avoided.
[0029]
  Claim6The shape of the contact surface of each electrode that is formed inside the rectangular opening and contacts the first high concentration diffusion region and the second high concentration diffusion region is the long side of the opening. The distance from the short side of the opening is larger than the distance from the equal-width bridge portion made of the LOCOS oxide film. Since the distance between the contact surface of the electrode in contact with the first high-concentration diffusion region and the second high-concentration diffusion region and the LOCOS oxide film is larger at the rectangular end portion than the equal-width bridge portion, the current up to the end portion The resistance of the path is increased, the current flowing into the end portion is reduced, and surge current concentration at the end portion can be avoided.
[0031]
  Claim7According to the invention described in item 1, each of the first high concentration diffusion region and the second high concentration diffusion region is formed on an opening of the LOCOS oxide film for forming the first high concentration diffusion region and the second high concentration diffusion region. A first lower layer electrode and a second lower layer electrode formed corresponding to the first lower layer electrode are provided, and an interlayer insulating film is formed on the first lower layer electrode and the second lower layer electrode, and the interlayer insulating film corresponds to the first lower layer electrode. Thus, a first interlayer insulating film opening is formed, a second interlayer insulating film opening is formed corresponding to the second lower layer electrode, and a first upper layer electrode and a second upper layer electrode are formed on the interlayer insulating film. The first upper layer electrode is connected to the first lower layer electrode corresponding to the first high-concentration diffusion region through the first interlayer insulating film opening, and the second upper layer electrode is connected to the second interlayer insulating film opening. It is connected to the second lower layer electrode corresponding to the second high concentration diffusion region There.
[0032]
In this way, by forming the electrode in a two-layer configuration, a surge current can be caused to flow in the vertical direction from the upper layer electrode to the narrower lower electrode connected to each diffusion region. As a result, the wiring resistance can be sufficiently reduced, a large surge current can be dealt with, and the problem that the wiring burns out does not occur.
[0033]
  Claim8The invention described in 1 is characterized in that the shortest widths in the plane of the first upper electrode and the second upper electrode are larger than the shortest widths in the plane of the first lower electrode and the second lower electrode, respectively. Thus, by making the widths of the first upper layer electrode and the second upper layer electrode wider than those of the first lower layer electrode and the second lower layer electrode and approaching a solid shape, the wiring resistance of the upper layer electrode can be sufficiently reduced, An upper layer electrode that can cope with a large surge current can be obtained.
[0034]
  Claim9The protective film is formed on the first upper layer electrode and the second upper layer electrode, and an opening is formed in the protective film corresponding to the first upper layer electrode, and is exposed through the opening. A first pad is formed by the first upper layer electrode, an opening is formed in the protective film corresponding to the second upper layer electrode, and a second pad is formed by the second upper layer electrode exposed through the opening. The first pad and the second pad are arranged on both sides of the opening of the LOCOS oxide film, and the widths of the first upper layer electrode and the second upper layer electrode are respectively set to the first pad and the second pad. It is characterized in that it is made larger as it gets closer to the second pad.
  Since the surge current flows in from one pad and flows out from the other pad, a larger surge current flows closer to each pad in the upper layer electrode. Therefore, by increasing the width of the upper layer electrode closer to the pad, the surge current can be made to flow uniformly, and destruction due to the surge current near the pad can be prevented.
[0036]
  Claim10According to the invention, the first high-concentration diffusion region, the second high-concentration diffusion region, and the PN junction region disposed in the semiconductor are surrounded by a P-type third high-concentration diffusion region, It is characterized in that the concentration diffusion region is grounded through an electrode. According to this, even if the surge current is large and cannot be absorbed in the PN junction region and overflows, the P-type third high-concentration diffusion region surrounding the diode flows the overflow surge current. Become. Therefore, in the semiconductor device formed around the diode, it is possible to prevent malfunction caused by the overflowing surge current.
[0037]
  Claim11The invention described in 1 is characterized in that the first high-concentration diffusion region, the second high-concentration diffusion region, and the PN junction region disposed in the semiconductor are surrounded by an insulating region. According to this, even if the surge current is large and cannot be absorbed in the PN junction region and overflows, the insulating region surrounding the diode completely blocks the surge current overflowing. Therefore, in the semiconductor device formed around the diode, it is possible to prevent malfunction caused by the overflowing surge current.
[0039]
  Claim12The invention described inA LOCOS oxide film having three openings arranged on a semiconductor and divided by two equal-width bridge parts, and a semiconductor deeper than the LOCOS oxide film through the central opening of the three openings The first high-concentration diffusion region made of P-type or N-type and the openings at both ends of the three openings are disposed in the semiconductor deeper than the LOCOS oxide film, The concentration diffusion region has two second high concentration diffusion regions made of P-type or N-type opposite to the concentration diffusion region, and is disposed under the equal width bridge portion made of the two LOCOS oxide films. Two PN junction regions made of a semiconductor between one high-concentration diffusion region and the second high-concentration diffusion region are formed with an equal width, and the two second high-concentration diffusion regions are connected to each other through electrodes. The planar shape of the opening of the LOCOS oxide film Is a rectangle with a long side of the equal-width bridge portion made of the LOCOS oxide film, and an opening for forming the first high-concentration diffusion region and an opening for forming the second high-concentration diffusion region Is a method of manufacturing a diode having different lengths in the direction along the equal-width bridge made of the LOCOS oxide film,Provided with three openings arranged on a semiconductor and divided by two equal width bridge partsAboveA step of providing a LOCOS oxide film, and a central opening of the three openings.AboveImpurities are ion-implanted into the semiconductor and then heat-treated to form a P-type or N-type deeper than the LOCOS oxide film.AboveThrough the step of forming the first high-concentration diffusion region and the openings at both ends of the three openings.AboveImpurities are ion-implanted into the semiconductor and then heat-treated, deeper than the LOCOS oxide film.AboveContrary to the first high-concentration diffusion region, it consists of P-type or N-typeAboveThe method includes a step of forming two second high concentration diffusion regions and a step of connecting the two second high concentration diffusion regions to each other through electrodes.
[0040]
  According to this manufacturing method, since the same LOCOS oxide film is used as a mask for ion implantation in the step of forming the first high concentration diffusion region and the step of forming the second high concentration diffusion region disposed on both sides thereof, two sheets are used. The problem of misalignment that occurs when using this mask is not generated. Therefore, the widths of the two PN junction regions formed between the first high concentration diffusion region and the second high concentration diffusion region can be formed equally as designed. As a result, the surge current is not biased to one of the PN junctions connected in parallel, and the surge resistance is high.Claim 1A diode can be manufactured.
[0041]
  Further, P-type impurities and N-type impurities are ion-implanted into the three openings of the LOCOS oxide film formed on the semiconductor, and then heat-treated to deepen the first high-concentration diffusion region and the second high-concentration region deeper than the LOCOS oxide film. Since the concentration diffusion region is formed, the LOCOS oxide film is disposed on the PN junction region made of a semiconductor between the first high concentration diffusion region and the second high concentration diffusion region. In the diode manufactured in this way, even if a large surge current flows in the PN junction region, the LOCOS oxide film does not melt before Si serving as the substrate. Therefore, even if a large surge current flows once, the insulating action of the LOCOS oxide film does not deteriorate and can be used repeatedly.Claim 1A diode can be manufactured.
[0042]
  Claim13The invention described inA LOCOS oxide film having three sets of openings arranged on a semiconductor and divided by two equal-width bridges as one set of openings, and each of the m sets of openings. The m first high-concentration diffusion regions that are arranged in the semiconductor deeper than the LOCOS oxide film through the central opening of each of the P-type and N-type, and the m sets of openings 2m second high-concentration diffusion regions which are disposed in the semiconductor deeper than the LOCOS oxide film through the openings at both ends of each of the first and second high-concentration diffusion regions and are P-type or N-type opposite to the first high-concentration diffusion region And is arranged under a uniform width bridge portion made of two LOCOS oxide films in each of the m groups of openings, and between the first high concentration diffusion region and the second high concentration diffusion region. 2 m PN junction regions made of a semiconductor are formed with the same width. The first high concentration diffusion regions are connected to each other through electrodes, the 2m second high concentration diffusion regions are connected to each other through electrodes, and the planar shape of the opening of the LOCOS oxide film is as follows: A rectangle having a long side of the equal-width bridge portion made of the LOCOS oxide film, and an opening for forming the first high-concentration diffusion region and an opening for forming the second high-concentration diffusion region A method of manufacturing a diode having different lengths in the direction along the equal-width bridge made of the LOCOS oxide film,Three openings arranged on a semiconductor and divided by two equal-width bridge portions are used as one set of opening groups, and m sets of the opening groups are provided.AboveA step of providing a LOCOS oxide film, and a central opening of each of the m sets of openings.AboveImpurities are ion-implanted into the semiconductor and then heat-treated to form a P-type or N-type deeper than the LOCOS oxide film.AboveForming m first high-concentration diffusion regions, and opening portions at both ends of each of the m sets of opening groups;AboveImpurities are ion-implanted into the semiconductor and then heat-treated, deeper than the LOCOS oxide film.AboveContrary to the first high-concentration diffusion region, it consists of P-type or N-typeAboveA step of forming 2m of the second high-concentration diffusion regions, a step of connecting the m first high-concentration diffusion regions to each other through an electrode, and an electrode of the 2m second high-concentration diffusion regions. And a step of connecting to each other.
[0043]
  According to this manufacturing method, the widths of the 2m parallel-connected PN junction regions formed between the first high concentration diffusion region and the second high concentration diffusion region can be all formed as designed. . As a result, the surge current is not biased to any one of the PN junctions connected in parallel, and the surge resistance necessary for a large surge current is obtained.Claim 2A diode can be manufactured. In addition, since the LOCOS oxide film is disposed on the PN junction region, even if a large surge current flows once, the insulating action of the LOCOS oxide film is not deteriorated and can be used repeatedly.Claim 2A diode can be manufactured.
[0044]
  Claim14The invention described inA LOCOS oxide film having (n + 1) openings disposed on a semiconductor and divided by n equal-width bridges, and an opening located every other of the (n + 1) openings A plurality of first high-concentration diffusion regions which are arranged in the semiconductor deeper than the LOCOS oxide film through the respective openings of the first opening group consisting of: P type or N type. A pair, and adjacent to each opening of the first opening group, through each opening of the second opening group consisting of every other opening, deeper than the LOCOS oxide film into the semiconductor. A plurality of sets of second high-concentration diffusion regions that are P-type or N-type opposite to the first high-concentration diffusion regions, and each of the n LOCOS oxide films is formed. The first high-concentration diffusion region and the front are disposed under the width bridge portion. N PN junction regions made of a semiconductor between the second high concentration diffusion regions are formed with equal width, the plurality of first high concentration diffusion regions are connected to each other through electrodes, and the plurality of first concentration regions are connected. The two high-concentration diffusion regions are connected to each other through electrodes, and the planar shape of the opening of the LOCOS oxide film is a rectangle having a long side of the equal-width bridge portion made of the LOCOS oxide film; The opening for forming the first high concentration diffusion region and the opening for forming the second high concentration diffusion region have different lengths in the direction along the equal width bridge made of the LOCOS oxide film. A manufacturing method comprising:(N + 1) openings arranged on a semiconductor and divided by n equal-width bridge portionsAboveA step of providing a LOCOS oxide film, and through each of the openings of the first opening group consisting of openings located every other one of the (n + 1) openings.AboveImpurities are ion-implanted into the semiconductor and then heat-treated to form a P-type or N-type deeper than the LOCOS oxide film.AboveA step of forming a plurality of first high-concentration diffusion regions, and an opening portion of each of the second opening groups composed of every other opening portion adjacent to each opening portion of the first opening group. ThroughAboveImpurities are ion-implanted into the semiconductor and then heat-treated, deeper than the LOCOS oxide film.AboveContrary to the first high-concentration diffusion region, it consists of P-type or N-typeAboveForming a plurality of second high-concentration diffusion regions; connecting the plurality of first high-concentration diffusion regions to each other through electrodes; and connecting the plurality of second high-concentration diffusion regions to each other with electrodes. And a step of connecting to each other.
[0045]
  According to this manufacturing method, the widths of the PN junction regions formed by the first high-concentration diffusion regions and the second high-concentration diffusion regions that are alternately arranged adjacent to each other can be formed equally as designed. As a result, the surge current is not biased to any one of the PN junctions connected in parallel, and a small size with the required surge resistance even for large surge currents.Claim 3A diode can be manufactured. In addition, since the LOCOS oxide film is disposed on the PN junction region, even if a large surge current flows once, the insulating action of the LOCOS oxide film is not deteriorated and can be used repeatedly.Claim 3A diode can be manufactured.
[0047]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0048]
(First embodiment)
FIG. 1 shows a PN junction diode according to the first embodiment. FIG. 1A is a plan view of a PN junction diode in the present embodiment, and FIG. 1B is an enlarged cross-sectional view along the line A-A ′ in FIG. Parts similar to those of the conventional PN junction diode shown in FIG.
[0049]
Also in the PN junction diode shown in FIG. 1, a P-type high-concentration diffusion region 2 serving as a base is disposed on a low-concentration N-type silicon (semiconductor) substrate 1 as in the conventional PN junction diode shown in FIG. N-type high concentration diffusion regions 3a and 3b serving as emitters are disposed on both sides of the base. The impurity of the low concentration N-type silicon (semiconductor) substrate 1 is phosphorus (P), and the concentration is about 1 × 10.¹⁵cm^-3It is. In the plan view of FIG. 1A, each of the high concentration diffusion regions 2, 3a, 3b has a rectangular shape of about 10 μm × 500 μm. The semiconductor portion between the base and the emitter becomes the PN junction regions 4a and 4b to form a PN junction diode, as in the conventional case.
[0050]
On the other hand, in the PN junction diode of this embodiment shown in FIG. 1, unlike the conventional PN junction diode shown in FIG. 14, the PN junction regions 4a and 4b are bridge portions 500a of LOCOS oxide films, which are refractory insulating protective films. It is arranged below 500b. Further, the width L of the bridge portions 500a and 500b_1a, L_1bAre equally formed and the width L of the PN junction regions 4a and 4b disposed below_ca, L_cbAre equally formed. In the plan view of FIG. 1A, the three LOCOS openings 50 are indicated by solid lines. The width L of the bridge portion of the LOCOS oxide film shown in FIG._la, L_lbIs usually L_la= L_lb= Set to about 3 μm.
[0051]
Further, as shown in FIG. 1B, the P-type high concentration diffusion region 2 and the N-type high concentration diffusion regions 3a and 3b are respectively connected through openings of the lower interlayer insulating film 5 made of BPSG. The lower layer electrodes 7a and 7b made of Al are connected, and the lower layer electrodes 7a and 7b are connected to the upper layer electrodes 9a and 9b made of Al through the openings of the upper interlayer insulating film 8 made of TEOS. Is done.
[0052]
In the plan view of FIG. 1A, the lower layer electrodes 7a and 7b and the upper layer electrodes 9a and 9b are shown by solid lines. Also, the contact regions 71, 72, 73 of each high-concentration diffusion region and each lower layer electrode, and the contact regions 91, 92, 93 of the lower layer electrode and upper layer electrode are indicated by dotted lines, respectively. The contact regions 71, 72, 73 of the respective high concentration diffusion regions and the respective lower layer electrodes are spaced from the LOCOS opening 50 (L_x, L_y) To be equal over the entire circumference (L_x= L_y) Is arranged.
[0053]
As shown in FIG. 1A, the lower layer electrode 7a corresponding to the P type high concentration diffusion region 2 is connected to the upper layer electrode 9a of the base, and the lower layer electrode corresponding to the N type high concentration diffusion regions 3a and 3b. The electrode 7b is connected to the upper layer electrode 9b of the emitter. The entire diode is covered with a protective film 10 made of SiN and connected to the outside via pads 90a and 90b indicated by solid lines in FIG.
[0054]
The upper layer electrodes 9a and 9b are rectangular and have an electrode width L._ea, L_ebAre set equal (L_ea= L_eb) The LOCOS openings 50 are arranged to equally bisect across the three LOCOS openings 50 arranged side by side. The pads 90a and 90b are arranged side by side outside the opening at one end of the three LOCOS openings 50 arranged side by side.
[0055]
Next, a method of manufacturing the PN junction diode shown in FIG. 1 will be described with reference to FIG. FIG. 2 shows an enlarged cross section along the line A-A ′ in FIG. Also, since the PN junction diode shown in FIG. 2 is manufactured simultaneously with the manufacture of the CMOS semiconductor device formed at another position on the same substrate, referring to the manufacturing process of the CMOS semiconductor device shown in FIG. A manufacturing process of the PN junction diode 2 will be described.
[0056]
First, a low concentration N-type silicon (semiconductor) substrate 1 shown in FIG. The low concentration N-type silicon (semiconductor) substrate 1 contains phosphorus (P) as an impurity, and its concentration is 1 × 10.¹⁵cm^-3Degree. On the other hand, as shown in FIG. 3A, at the CMOS formation position, first, the N channel MOS portion is 1 × 10 × 1.¹³cm^-2Boron (B) is ion-implanted under the conditions described above to form a P-type well region 201. Similarly, the P channel MOS part has 1 × 10¹³cm^-2Under the conditions, phosphorus (P) is ion-implanted to form an N-type well region 301.
[0057]
Next, as shown in FIGS. 2B and 3B, LOCOS oxide films 500, 500a, and 500b having predetermined openings serving as a high melting point insulating protective film are formed. The LOCOS oxide films 500, 500a, and 500b are formed by the following procedure that is normally used. First, a SiN film serving as a mask for thermal oxidation is laminated on the entire surface of the low-concentration N-type silicon (semiconductor) substrate 1, and the SiN film is etched using a resist having a predetermined opening as a mask to form LOCOS. A part corresponding to the part is opened. Next, the silicon surface exposed at the opening of the SiN film is thermally oxidized to form a LOCOS oxide film, and finally the SiN film is removed. The thickness of the LOCOS oxide film is about 0.6 μm. As shown in FIG. 3B, after the LOCOS oxide film 500 is formed at the CMOS formation position, a gate oxide film 601 made of a silicon oxide film and a gate electrode 602 made of a polysilicon film are formed by a commonly used method. To do.
[0058]
Next, as shown in FIG. 2C, after the opening of the LOCOS oxide film corresponding to the emitter is covered with the first resist 102, the opening corresponding to the base is made using the LOCOS oxide film as a substantial mask. To 2 × 10¹⁴cm^-2Boron (B) ions are implanted under the following conditions. Thereafter, heat treatment is performed at 1000 ° C. or higher for several hours to form a P-type high concentration diffusion region 2 serving as a base. The diffusion depth of the P-type high concentration diffusion region 2 is about 3 μm. At the same time, as shown in FIG. 3C, P-type high concentration diffusion regions 21 and 22 corresponding to the P channel are formed at the CMOS formation position.
[0059]
Next, as shown in FIG. 2D, after removing the first resist 102, the opening of the LOCOS oxide film corresponding to the base is covered with the second resist 103, and then the LOCOS oxide film is substantially formed. As a typical mask, 4 × 10 from the opening corresponding to the emitter¹⁶cm^-2Phosphorus (P) ions are implanted under the following conditions. Thereafter, heat treatment is performed at 1000 ° C. or more for about 1 hour, and N-type high concentration diffusion regions 3a and 3b serving as emitters are formed on both sides of the P-type high concentration diffusion region 2 serving as a base. The diffusion depth of the N-type high concentration diffusion regions 3a and 3b is about 2 μm. As a result, the semiconductor portion between the P-type high concentration diffusion region 2 and the N-type high concentration diffusion regions 3a and 3b becomes the PN junction regions 4a and 4b. At the same time, as shown in FIG. 3D, N-type high concentration diffusion regions 31 and 32 corresponding to the N channel are formed at the CMOS formation position.
[0060]
Next, as shown in FIG. 2E, after removing the second resist 103, a BPSG film is laminated on the entire surface as the lower interlayer insulating film 5, and the P-type high-concentration diffusion region 2 and the N-type high concentration are stacked. Openings 61, 62, 63 for connecting to the diffusion regions 3a, 3b are formed. The thickness of the BPSG film is about 0.6 μm.
[0061]
Next, as shown in FIG. 2F, an Al film is laminated on the entire surface to a thickness of about 1 μm, and then patterned into a predetermined shape to form lower layer electrodes 7a and 7b.
[0062]
Also at the CMOS formation position shown in FIG. 3E, the lower interlayer insulating film 5 made of BPSG film and the lower electrode 7 made of Al are formed by the steps of FIGS. 2E and 2F.
[0063]
Next, as shown in FIG. 2G, after laminating the TEOS film as the upper interlayer insulating film 8, openings corresponding to the respective lower layer electrodes 7a and 7b are formed, and an Al film is laminated on the entire surface. To do. Thereafter, the Al film is patterned into a predetermined shape to form upper layer electrodes 9a and 9b. Finally, after a SiN film as the protective film 10 is laminated on the entire surface, a pad opening for connection to the outside is formed, and the PN junction diode shown in FIG. 1 is completed. Note that, at the CMOS formation position shown in FIG. 3, the CMOS semiconductor device is completed through the same process as that shown in FIG. 2G after the process shown in FIG. 3E (not shown).
[0064]
According to the manufacturing method shown in FIG. 2, the P-type high concentration diffusion region 2 as the base and the N-type high concentration diffusion regions 3a and 3b as the emitter are ion-implanted using the same LOCOS as a mask. Thus, since there is no mask alignment operation in the process of FIG. 2, there is no mask misalignment that can occur in the conventional process of FIG. Therefore, the width L of the left and right bridge portions 500a and 500b of the LOCOS_1a, L_1bAre set to be the same, the width L of the left and right PN junction regions after impurity diffusion_ca, L_cbWill be the same. As a result, the breakdown voltages of the left and right PN junction regions 4a and 4b are also uniform. In addition, since the left and right PN junction regions 4a and 4b are formed under the LOCOS oxide film having a high melting point, the PN junction regions 4a and 4b can withstand temperature rise that occurs when a surge is applied.
[0065]
(Second Embodiment)
In the first embodiment, N-type high-concentration diffusion regions serving as emitters are arranged on both sides of a P-type high-concentration diffusion region serving as a base on the basis of a LOCOS oxide film having an equal-width bridge portion covering the PN junction region. The structure of the PN junction diode and the manufacturing method thereof were shown. In a PN junction diode as an input / output protection element of a semiconductor device, in order to cope with a large surge current, usually several tens of PN junction diodes shown in FIG. 1 are connected in parallel. The second embodiment relates to a PN junction diode having a structure in which a plurality of the PN junction diodes of the first embodiment are connected in parallel. Hereinafter, this embodiment will be described with reference to the drawings, taking as an example a PN junction diode in which three PN junction diodes of the first embodiment are arranged in parallel.
[0066]
FIG. 4 is a plan view of the PN junction diode in the present embodiment. The same parts as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
[0067]
As shown in FIG. 4, in the second embodiment, each of the three P-type high concentration diffusion regions 21, 22, and 23 is centered, and two N-type high concentration diffusion regions 31a and 31b are provided on both sides thereof. , 32a, 32b, 33a, 33b, and the width L of the bridge portions 501a, 501b, 502a, 502b, 503a, 503b of the LOCOS oxide film in the drawing._1a, L_1b, L_2a, L_2b, L_3a, L_3bAre all set equal. The three P-type high concentration diffusion regions 21, 22, 23 are connected to each other by the upper layer electrode 9a, and the six N-type high concentration diffusion regions 31a, 31b, 32a, 32b, 33a, 33b are connected to the upper layer. The electrodes 9b are connected. The PN junction diode shown in FIG. 4 of the present embodiment can be manufactured in the same manner by the manufacturing method shown in FIG. 2 of the first embodiment.
[0068]
Also in this embodiment, the width L of the six bridge portions covering the PN junction region in the LOCOS oxide film which is a high melting point insulating protective film._1a, L_1b, L_2a, L_2b, L_3a, L_3bAre set to be equal, the widths of the six PN junction regions formed by ion implantation using the same LOCOS oxide film as a mask are also equal throughout. As a result, the withstand voltages of the six PN junction regions are equal throughout, and the PN junction diode of FIG. 4 in which six PN junction regions having the same withstand voltage are connected in parallel is the PN junction diode shown in FIG. In comparison with this, it is possible to secure a tolerance three times as large as the surge current.
[0069]
In the PN junction diode illustrated in FIG. 4, six PN junction regions are connected in parallel. In a PN junction diode as an input / output protection element of a semiconductor device, several tens of PN junction regions shown in FIG. 4 are usually connected in parallel in order to secure a necessary tolerance for surge current. As described above, even when the number of bridge portions of the LOCOS oxide film covering the PN junction region is increased, the width of the PN junction region can be formed to be equal over the entire width based on the bridge portions formed to have the same width. The allowable amount for the surge current can be increased in proportion to the number of bridge portions.
[0070]
(Third embodiment)
In the second embodiment, N-type high-concentration diffusion regions serving as emitters are arranged on both sides of a P-type high-concentration diffusion region serving as a base on the basis of a LOCOS oxide film having an equal-width bridge portion covering the PN junction region. A PN junction diode having a structure in which three PN junction diodes are arranged in parallel is shown. The third embodiment relates to a PN junction diode having a structure in which a plurality of P-type high concentration diffusion regions serving as a base and a plurality of N type high concentration diffusion regions serving as an emitter are alternately arranged. Hereinafter, as an example, a PN junction diode in which four P-type high-concentration diffusion regions serving as a base and five N-type high-concentration diffusion regions serving as an emitter are alternately arranged to form eight PN junction regions will be described. Embodiments will be described with reference to the drawings.
[0071]
FIG. 5 is a plan view of the PN junction diode in the present embodiment. The same parts as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
[0072]
As shown in FIG. 5, in the third embodiment, four P-type high concentration diffusion regions 21, 22, 23, 24 and five N-type high concentration diffusion regions 31, 32, 33, 34, 35 are provided. Alternatingly arranged, the width L of the bridge portions 501, 502, 503, 504, 505, 506, 507, 508 of the LOCOS oxide film in the figure₁, L₂, L_Three, L_Four, L_Five, L₆, L₇, L₈Are all set equal. Further, the four P-type high concentration diffusion regions 21, 22, 23, 24 are connected to each other by the upper layer electrode 9a, and the five N-type high concentration diffusion regions 31, 32, 33, 34, 35 are the upper layers. The electrodes 9b are connected. The PN junction diode shown in FIG. 5 of the present embodiment can be manufactured in the same manner by the manufacturing method shown in FIG. 2 of the first embodiment.
[0073]
Also in this embodiment, since the bridge portion covering the PN junction region is based on the LOCOS oxide film which is a high melting point insulating protective film set to have an equal width, the width of the PN junction region is also equal over all PN junctions. As a result, the withstand voltages of all the PN junction regions are the same as in the second embodiment. On the other hand, in the PN junction diode of FIG. 4 of the second embodiment, six PN junction regions are formed. However, in the PN junction diode of FIG. Eight PN junction regions are formed. Therefore, the PN junction diode of FIG. 5 has a tolerance for a surge current 4/3 times that of the PN junction diode of FIG. Conversely, if the surge current allowance is the same, the PN junction diode of FIG. 5 can reduce the area occupied by the diode to 3/4 compared to the PN junction diode of FIG.
[0074]
In the PN junction diode illustrated in FIG. 5, eight PN junction regions are connected in parallel. In order to secure the necessary allowable amount for the surge current, even when several PN junction regions shown in FIG. 5 are connected in parallel, the allowable amount for the surge current is proportional to the number of bridge portions of the LOCOS oxide film. The points that can be increased are the same as in the second embodiment.
[0075]
(Fourth embodiment)
In the first to third embodiments, the P-type high concentration diffusion region serving as the base and the N-type high concentration diffusion region serving as the emitter are all PN junction diodes having the same size and a rectangular shape. The fourth embodiment relates to a PN junction diode having a structure in which the P-type high concentration diffusion region and the N-type high concentration diffusion region are rectangular but have different sizes. Hereinafter, the present embodiment will be described with reference to the drawings.
[0076]
FIG. 6 is a plan view of the PN junction diode in the present embodiment. The same parts as those in the third embodiment are denoted by the same reference numerals, and the description thereof is omitted.
[0077]
As shown in FIG. 6, also in this embodiment, the P-type high concentration diffusion regions 21, 22, 23, and 24 and the N-type high concentration diffusion regions 31, 32, 33, 34, and 35 are alternately arranged to form the LOCOS oxide film. Width L of the bridge portions 501, 502, 503, 504, 505, 506, 507, 508₁, L₂, L_Three, L_Four, L_Five, L₆, L₇, L₈Are set to be equal to each other in the same manner as the PN junction diode of FIG. 5 of the third embodiment. On the other hand, the length L of the four LOCOS openings 52, 54, 56, 58 corresponding to the P-type high concentration diffusion region_PAnd the length L of the five LOCOS openings 51, 53, 55, 57, 59 corresponding to the N-type high concentration diffusion region_NIs different from the PN junction diode of FIG.
[0078]
When the rectangular P-type high concentration diffusion region and the N-type high concentration diffusion region having the same size are arranged side by side as shown in FIG. 5, the adjacent P-type high concentration diffusion region and N-type high concentration diffusion region are arranged. At the corners, the electric field concentrates more than the central portions of adjacent sides. For this reason, when a large surge current exceeding the allowable amount is generated, the corner portion of the PN junction diode shown in FIG. 5 is easily broken. On the other hand, in the PN junction diode shown in FIG. 6 of the present embodiment, the length L of the LOCOS opening corresponding to each of the P-type high concentration diffusion region and the N-type high concentration diffusion region arranged adjacent to each other._p, L_NThe distance between the corners is the width L of the bridge portion.₁= L₂= L_Three= L_Four= L_Five= L₆= L₇= L₈It is longer. Therefore, the resistance of the current path at the corners of the P-type high concentration diffusion region and the N-type high concentration diffusion region arranged adjacent to each other is larger than the resistance of the current path at the width of the PN junction region. In this way, the electric field concentration between the corners is relaxed, and the concentration at the corners of the surge current is avoided, whereby the breakage at the corners can be reduced.
[0079]
Length L of P-type high concentration diffusion region_PAnd length L of the N-type high concentration diffusion region_NWhen the substrate is N-type, the corner portion of the P-type high concentration diffusion region is easily broken. Therefore, in order to avoid current concentration in the corner portion, the length L of the P-type high concentration diffusion region serving as a base is reduced._PThe length L of the N-type high concentration diffusion region that becomes the emitter_NIt is desirable to make it longer. Conversely, when the substrate is P-type, the corners of the N-type high-concentration diffusion region are liable to be destroyed, and therefore the length L of the N-type high-concentration diffusion region serving as the emitter_NLength L of P-type high concentration diffusion region based on_PIt is desirable to make it longer.
[0080]
(Fifth embodiment)
The PN junction diodes of the first to fourth embodiments are PN junction diodes in which the distance between the contact region of the lower layer electrode with respect to the high concentration diffusion region and the LOCOS opening is equally arranged over the entire circumference. The fifth embodiment relates to a PN junction diode in which the distance between the contact region and the LOCOS opening is different between the rectangular equal width bridge portion and both ends. Hereinafter, the present embodiment will be described with reference to the drawings.
[0081]
FIG. 7 is a plan view of the PN junction diode in the present embodiment. The same parts as those in the third embodiment are denoted by the same reference numerals, and the description thereof is omitted.
[0082]
As shown in FIG. 7, the PN junction diode in the present embodiment has contact regions 71, 72, 73 of the lower layer electrodes for the respective high concentration diffusion regions 21, 22, 23, 24, 31, 32, 33, 34, 35. , 74, 75, 76, 77, 78, 79 and the LOCOS opening 50, the distance L at both ends of the rectangle._yIs the distance L at the equal width bridge_x(L_x<L_y) Is arranged.
[0083]
In each of the high-concentration diffusion regions 21, 22, 23, 24, 31, 32, 33, 34, and 35 and the lower layer electrodes 7a and 7b, the lower layer electrode has a smaller specific resistance._xMore distance L between both ends of the rectangle_yBy increasing, the resistance of the current path to the end increases. Therefore, the current flowing into the end portion is reduced, and the surge current can be prevented from being concentrated at the end portion.
[0084]
(Sixth embodiment)
In the first to third embodiments, the P-type high concentration diffusion region serving as the base and the N-type high concentration diffusion region serving as the emitter are all PN junction diodes having the same size and a rectangular shape. The sixth embodiment relates to a PN junction diode having a structure in which a P-type high-concentration diffusion region and an N-type high-concentration diffusion region have the same size but have a substantially rectangular shape with rounded corners. Hereinafter, the present embodiment will be described with reference to the drawings.
[0085]
FIG. 8 is a plan view of the PN junction diode in the present embodiment. The same parts as those in the third embodiment are denoted by the same reference numerals, and the description thereof is omitted.
[0086]
As shown in FIG. 8, also in this embodiment, P-type high concentration diffusion regions 21, 22, 23, and 24 and N-type high concentration diffusion regions 31, 32, 33, 34, and 35 are alternately arranged, and a LOCOS oxide film is formed. Width L of the bridge portions 501, 502, 503, 504, 505, 506, 507, 508₁, L₂, L_Three, L_Four, L_Five, L₆, L₇, L₈Are set to be equal to each other in the same manner as the PN junction diode of FIG. 5 of the third embodiment. On the other hand, it differs from the PN junction diode of FIG. 5 in that the rectangular corners of the nine LOCOS openings 50 corresponding to the P-type high concentration diffusion region and the N-type high concentration diffusion region are rounded.
[0087]
In the present embodiment, by rounding the rectangular corners of the LOCOS opening corresponding to the P-type high-concentration diffusion region and the N-type high-concentration diffusion region arranged adjacent to each other, the distance between the corners can be reduced. Width L₁= L₂= L_Three= L_Four= L_Five= L₆= L₇= L₈It is longer. As a result, similar to the fourth embodiment, it is possible to avoid the surge current from being concentrated at the corners, and to reduce the breakage at the corners that occurs in the PN junction diode of FIG.
[0088]
The substantial length of the PN junction region of the PN junction diode shown in FIG._NIn contrast, the length of the PN junction region of the PN junction diode shown in FIG._PN(L_PN= L_P> L_N). Therefore, the PN junction diode of FIG. 8 has a larger tolerance for surge current than the PN junction diode of FIG.
[0089]
In the PN junction diode shown in FIG. 8, the rectangular corners of the LOCOS opening 50 are rounded, while the contact regions 71 and 72 for the high-concentration diffusion regions 21 and 31 remain rectangular. With respect to the distance between 72 and the LOCOS opening 50, the distance between the both ends of the rectangle is set to be larger than the distance between the equal-width bridge portions. Therefore, as in the fifth embodiment, the current flowing into the end portion is reduced, and there is an effect of avoiding surge current concentration at the end portion.
[0090]
(Seventh embodiment)
The fourth embodiment is a PN junction diode in which a P-type high concentration diffusion region serving as a base and an N-type high concentration diffusion region serving as an emitter are rectangular and have different sizes. The sixth embodiment is a substantially rectangular PN junction diode in which a P-type high-concentration diffusion region serving as a base and an N-type high-concentration diffusion region serving as an emitter have the same size but rounded corners. there were. In the seventh embodiment, the P-type high-concentration diffusion region and the N-type high-concentration diffusion region have a substantially rectangular shape having different sizes, and each diffusion region has a substantially rectangular end portion. The present invention relates to a PN junction diode having a structure in which a low concentration diffusion well of the same type is formed. Hereinafter, the present embodiment will be described with reference to the drawings.
[0091]
FIG. 9A is a plan view of the PN junction diode in the present embodiment, and FIG. 9B is an enlarged cross-sectional view taken along line A-A ′ in FIG. The same parts as those in the fourth embodiment are denoted by the same reference numerals, and the description thereof is omitted.
[0092]
As shown in FIG. 9A, in this embodiment, the P-type high concentration diffusion regions 21, 22, 23, and 24 and the N-type high concentration diffusion regions 31, 32, 33, 34, and 35 are alternately arranged. The length L of the four LOCOS openings 52, 54, 56, 58_PAnd the length L of the five LOCOS openings 51, 53, 55, 57, 59 corresponding to the N-type high concentration diffusion region_NHave different values. In the figure, the width L of the bridge portions 501, 502, 503, 504, 505, 506, 507, 508 of the LOCOS oxide film.₁, L₂, L_Three, L_Four, L_Five, L₆, L₇, L₈Are set equally, but the LOCOS openings 52, 54, 56, 58 corresponding to the P-type high concentration diffusion region and the LOCOS openings 51, 53, 55, 57, 59 corresponding to the N-type high concentration diffusion region. Each has a substantially rectangular shape with rounded corners. In the present embodiment, low-concentration diffusion wells 202 to 209 and 302 to 311 of the same type as the diffusion regions are further formed around the end portions of the substantially rectangular diffusion regions. The diffusion depth of the low concentration diffusion wells 202 to 209 and 302 to 311 is about 5 μm.
[0093]
In the manufacturing process of the PN junction diode of the present embodiment, the low concentration diffusion wells 202 to 209 and 302 to 311 are first formed, and then manufactured in the same manner by the manufacturing process shown in FIG. 2 of the first embodiment. be able to. The low concentration diffusion wells 202 to 209 and 302 to 311 are formed under the same conditions as the formation of the P type well region and the N type well region shown in FIG. Can be done at the same time.
[0094]
In the present embodiment, since the same type low concentration diffusion well is formed around the termination portion of each diffusion region, the withstand voltage of the termination portion is increased, and the surge current concentration at the termination portion can be avoided. Further, in the PN junction diode of FIG. 9, in addition to the formation of the low concentration diffusion well at the terminal portion, the corners of the P type high concentration diffusion region and the N type high concentration diffusion region are rounded as in the sixth embodiment. As in the fourth embodiment, the P-type high concentration diffusion region and the N-type high concentration diffusion region are different in size. Therefore, with respect to the breakdown due to the electric field concentration at the corner when a large surge current is generated, the PN junction diode of FIG. 9 has a surge resistance higher than that of the PN junction diode of FIGS. ing.
[0095]
Needless to say, the formation of the low-concentration diffusion well around the terminal end of each diffusion region may be applied to the PN junction diode described in the first to sixth embodiments.
[0096]
(Eighth embodiment)
In the first to seventh embodiments, the upper layer electrode is a PN junction diode having a rectangular shape and the electrode width of the upper layer electrode is constant. The eighth embodiment relates to a PN junction diode in which the upper layer electrode is not rectangular but the width of the upper layer electrode arranged across the aligned LOCOS openings is set to be larger as it is closer to the pad. Hereinafter, the present embodiment will be described with reference to the drawings.
[0097]
FIG. 10 is a plan view of the PN junction diode in the present embodiment. The same parts as those in the third embodiment are denoted by the same reference numerals, and the description thereof is omitted.
As shown in FIG. 10, in the PN junction diode according to the present embodiment, pads 90a and 90b are disposed on both sides of the LOCOS opening 50, and the electrode width L of each upper layer electrode 9a and 9b._ea, L_ebHowever, it is set so as to be closer to the pads 90a and 90b. Accordingly, the lengths of the contact regions 92, 94, 96, 98 of the upper layer electrode 9a connected to the lower layer electrode 7a are also set longer as they become closer to the pad 90a, and the contact regions 91, The lengths of 93, 95, 97, and 99 are also set longer as they become closer to the pad 90b.
[0098]
The surge current flows in from one pad and flows out from the other pad. Therefore, in the upper layer electrodes 9a and 9b connecting the corresponding lower layer electrodes 7a and 7b in parallel, the pads 90a and 90b are respectively connected. Larger surge current flows closer to. Therefore, by increasing the width of the upper layer electrodes 9a and 9b closer to the pads 90a and 90b, the surge current can be made to flow uniformly, and the destruction due to the surge current near the pad can be prevented.
[0099]
(Ninth embodiment)
The sixth embodiment is a PN junction diode in which a P-type high concentration diffusion region and an N-type high concentration diffusion region have the same size and rounded rectangular corners. The ninth embodiment relates to a PN junction diode having a structure in which a P-type high concentration diffusion region and an N-type high concentration diffusion region are arranged concentrically at equal intervals. Hereinafter, the present embodiment will be described with reference to the drawings.
[0100]
FIG. 11 shows a PN junction diode in the present embodiment. FIG. 11A is a plan view of the PN junction diode in the present embodiment, and FIG. 11B is an enlarged cross-sectional view along the line A-A ′ in FIG. The same parts as those in the sixth embodiment are denoted by the same reference numerals and description thereof is omitted, but in FIG. 11, the upper interlayer insulating film 8 made of TEOS and the upper electrode 9a made of Al shown in FIG. 9b, the protective film 10 made of SiN is not shown.
[0101]
As shown in FIG. 11, in this embodiment, the three P-type high concentration diffusion regions 21, 22, 23 and the two N-type high concentration diffusion regions 31, 32 are alternately arranged concentrically at equal intervals. Has been. The width L of the bridge portions 501, 502, 503, and 504 of the LOCOS oxide film in the figure.₁, L₂, L_Three, L_FourAre all set equal.
[0102]
In the PN junction diode shown in FIG. 11, the five LOCOS openings 51, 52, 53, 54, 55 and the corresponding P-type high concentration diffusion region and N-type high concentration diffusion region are circular. Therefore, there is no corner like a rectangular diffusion region. Therefore, the surge current cannot be concentrated at the corners, and the surge current can be evenly supplied in the radial direction over the entire circumference. As described above, the PN junction diode shown in FIG. 11 has the PN junction region disposed without waste, and is further downsized compared to the PN junction diode of FIG. 8 of the sixth embodiment. It has become.
[0103]
(Tenth embodiment)
In each of the first to ninth embodiments, the surge resistance is improved by optimizing the shape and arrangement of the P-type high concentration diffusion region serving as the base and the N-type high concentration diffusion region serving as the emitter. In the tenth embodiment, in addition to the shape and arrangement of the P-type high-concentration diffusion region and the N-type high-concentration diffusion region, the PN junction diode is surrounded by the P-type third high-concentration diffusion region via the electrodes Related to grounded structure. Hereinafter, the present embodiment will be described with reference to the drawings.
[0104]
FIG. 12 shows a PN junction diode in the present embodiment. FIG. 12A is a plan view of the PN junction diode in the present embodiment, and FIG. 12B is an enlarged cross-sectional view taken along the line A-A ′ in FIG. In addition, although the same code | symbol is attached | subjected about the part similar to 4th Embodiment, the description is abbreviate | omitted, but in FIG. 12, the upper interlayer insulating film 8 which consists of TEOS shown in FIG. 1, and the upper layer electrode 9a which consists of Al 9b, the protective film 10 made of SiN is not shown.
[0105]
In the PN junction diode of this embodiment shown in FIG. 12, two P-type high concentration diffusion regions 21, 22 and three N-type high concentration diffusion regions 31, 32, 33 are alternately arranged. A P-type third high-concentration diffusion region 220 is arranged under the five diffusion regions 21, 22, 31, 32, 33, and around the five diffusion regions 21, 22, 31, 32, 33, The LOCOS oxide film is surrounded by an opening 50r formed in the outer peripheral portions 500r and 501r and a P-type third high-concentration diffusion region 221 corresponding thereto. The P-type third high-concentration diffusion regions 220 and 221 are connected as shown in FIG. 12B, and are grounded via the contact portion 70r and the electrode 7r.
[0106]
In the manufacturing method of the PN junction diode shown in FIG. 12, first, after a silicon oxide film is laminated on the low concentration N-type silicon (semiconductor) substrate 11, a predetermined portion is opened and 1 × 10¹³cm^-2Boron (B) is ion-implanted under the conditions described above to form a third high-concentration diffusion region 220 that is a P-type buried layer. Next, after removing the silicon oxide film, the low-concentration N-type silicon layer 1 is epitaxially grown by 10 μm. Then, 1 × 10¹³cm^-2Boron (B) is ion-implanted under the conditions described above to form a P-type third high-concentration diffusion region 221 that is an isolation layer. Thereby, the third high-concentration diffusion regions 220 and 221 having a structure surrounding the diode formation position are completed. Thereafter, the PN junction diode of this embodiment can be manufactured according to the manufacturing process shown in FIG. 2 of the first embodiment.
[0107]
In this embodiment, since the PN junction diode is surrounded by the P-type third high-concentration diffusion regions 220 and 221 that are grounded, the surge current is so large that the PN junction region cannot be absorbed and overflows. Also, the P-type third high-concentration diffusion regions 220 and 221 that surround the diode absorb noise (injected electrons and holes) that is a surge current. Accordingly, in the semiconductor device formed around the diode, malfunction of the LOGIC circuit due to noise generated by the surge current can be prevented.
[0108]
(Eleventh embodiment)
In the tenth embodiment, the PN junction diode is surrounded by a P-type third high-concentration diffusion region to prevent malfunction of the semiconductor device formed around the diode when the surge current is large. . The eleventh embodiment relates to a structure in which the PN junction diode is surrounded by an insulating region in place of the P-type third high-concentration diffusion region. Hereinafter, the present embodiment will be described with reference to the drawings.
[0109]
FIG. 13 shows a PN junction diode in the present embodiment. FIG. 13A is a plan view of a PN junction diode in the present embodiment, and FIG. 13B is an enlarged cross-sectional view along the line A-A ′ in FIG. In addition, although the same code | symbol is attached | subjected about the part similar to 10th Embodiment, the description is abbreviate | omitted, but in FIG. 13, the upper layer insulating film 8 which consists of TEOS shown in FIG. 1, and the upper layer electrode 9a which consists of Al 9b, the protective film 10 made of SiN is not shown.
[0110]
In the present embodiment shown in FIG. 13, two P-type high concentration diffusion regions 21 and 22 and three N-type high concentration diffusion regions 31, 32, and 33 are alternately arranged. The region 21, 22, 31, 32, 33 is a PN junction diode having a structure surrounded by insulating regions 401, 402 under the outer peripheral portion 500r of the LOCOS oxide film.
[0111]
In the PN junction diode manufacturing method shown in FIG. 13, two low-concentration N-type silicon (semiconductor) substrates 11 are prepared first, and the surface of one substrate is oxidized to form a silicon oxide film 402. Next, two substrates are bonded together by a normal method to form a bonded substrate. Thereafter, the oxidized substrate is polished and processed into a low concentration N-type silicon layer 1 having a thickness of 10 μm. Next, using the resist or oxide film as a mask, the low-concentration N-type silicon layer 1 is dry-etched almost vertically until reaching the buried silicon oxide film 402 to form a groove. Next, the sidewall of the groove is thermally oxidized to form silicon oxide (SiO₂) After the film 401 is formed, polysilicon (Si) 700 is laminated to close the groove. Thereafter, the polysilicon remaining on the surface is etched back, and the surface is flattened by chemical mechanical polishing. Thus, the insulating regions 401 and 402 having a structure surrounding the diode forming position are completed. Thereafter, the PN junction diode of this embodiment can be manufactured according to the manufacturing process shown in FIG. 2 of the first embodiment. In the plan view of FIG. 13A, silicon oxide (SiO₂) The film 401 and the polysilicon (Si) 700 are indicated by solid lines.
[0112]
In this embodiment, since the PN junction diode is surrounded by the insulating regions 401 and 402, the insulating regions 401 and 402 surrounding the diode overflow even when the surge current is large and overflows from the PN junction region. Completely cut off the surge current. Therefore, in the semiconductor device formed around the diode, it is possible to prevent malfunction due to noise generated by the overflowing surge current.
[0113]
(Other embodiments)
In each of the above embodiments, the LOCOS oxide film is used as the high melting point insulating protective film. However, the present invention is not limited to this, and a silicon oxide (SiO) film or a silicon nitride (SiN) film may be used. . Further, these films can be used by being laminated.
[0114]
Further, as a method of forming these high melting point insulating protective films, the film may be formed by physical or chemical vapor deposition, or as used in the formation of the LOCOS oxide film, the substrate is oxidized or nitrided. A film may be formed by treatment.
[0115]
In the above embodiment, the low concentration N-type silicon substrate is used as the substrate. However, the present invention is not limited to this, and a low concentration P-type silicon substrate may be used. Furthermore, a substrate in which an epitaxial film having a thickness of 10 μm or more and containing an N-type or P-type impurity at a low concentration may be used on an arbitrary silicon substrate.
[0116]
As described above, according to the present plan, a protection element having a high surge resistance can be easily realized, which greatly contributes to the improvement of IC design technology.
[Brief description of the drawings]
FIG. 1A is a plan view showing a structure of a diode according to a first embodiment of the present invention, and FIG. 1B is an enlarged cross-sectional view thereof.
FIG. 2 is a cross-sectional view showing a schematic manufacturing process of a diode according to the present invention.
FIG. 3 is a cross-sectional view showing a schematic manufacturing process of a CMOS semiconductor device formed at a different position on the same substrate together with the diode of the present invention.
FIG. 4 is a plan view showing a structure of a diode according to a second embodiment of the present invention.
FIG. 5 is a plan view showing a structure of a diode according to a third embodiment of the present invention.
FIG. 6 is a plan view showing a structure of a diode according to a fourth embodiment of the present invention.
FIG. 7 is a plan view showing a structure of a diode according to a fifth embodiment of the present invention.
FIG. 8 is a plan view showing a structure of a diode according to a sixth embodiment of the present invention.
FIG. 9A is a plan view showing a structure of a diode according to a seventh embodiment of the present invention, and FIG. 9B is an enlarged cross-sectional view thereof.
FIG. 10 is a plan view showing a structure of a diode according to an eighth embodiment of the present invention.
11A is a plan view showing a structure of a diode according to a ninth embodiment of the present invention, and FIG. 11B is an enlarged cross-sectional view thereof.
12A is a plan view showing the structure of a diode according to a tenth embodiment of the present invention, and FIG. 12B is an enlarged cross-sectional view thereof.
13A is a plan view showing the structure of a diode according to an eleventh embodiment of the present invention, and FIG. 13B is an enlarged cross-sectional view thereof.
14A is a plan view showing the structure of a conventional diode, and FIG. 14B is an enlarged cross-sectional view thereof.
FIG. 15 is a cross-sectional view showing a schematic manufacturing process of a conventional diode according to processes.
[Explanation of symbols]
1 Low-concentration N-type silicon substrate
2 P type high concentration diffusion region (base)
3a, 3b N-type high concentration diffusion region (emitter)
4a, 4b PN junction region
5 Lower interlayer insulation film (BPSG)
50 LOCOS oxide opening
500 LOCOS oxide film (high melting point insulating protective film)
500a, 500b LOCOS oxide bridge
7a, 7b Lower layer electrode (Al)
8 Upper interlayer insulation film (TEOS)
9a, 9b Upper layer electrode (Al)
90a, 90b pad
10 Protective film (SiN)

Claims

A LOCOS oxide film comprising three openings disposed on a semiconductor and divided by two equal-width bridges;
A first high-concentration diffusion region made of P-type or N-type and disposed in the semiconductor deeper than the LOCOS oxide film through the central opening of the three openings;
The second openings are formed in the semiconductor deeper than the LOCOS oxide film through openings at both ends of the three openings, and are P-type or N-type opposite to the first high-concentration diffusion region. Having a high concentration diffusion region,
Two PN junction regions made of a semiconductor between the first high-concentration diffusion region and the second high-concentration diffusion region are arranged below the equal-width bridge portion made of the two LOCOS oxide films. Formed,
The two second high-concentration diffusion regions are connected to each other through electrodes ,
The planar shape of the opening of the LOCOS oxide film is a rectangle whose long side is an equal-width bridge made of the LOCOS oxide film,
The opening for forming the first high-concentration diffusion region and the opening for forming the second high-concentration diffusion region have different lengths along the equal-width bridge made of the LOCOS oxide film. A diode characterized by that.

A LOCOS oxide film comprising three openings arranged on a semiconductor and divided by two equal-width bridge portions as one set of opening groups, and m sets of the opening groups;
The m first high-concentration diffusion regions that are arranged in the semiconductor deeper than the LOCOS oxide film through the central opening of each of the m sets of openings and are made of either P-type or N-type. When,
2 m pieces of P-type or N-type which are disposed in the semiconductor deeper than the LOCOS oxide film through the openings at both ends of each of the m sets of opening groups and are opposite to the first high-concentration diffusion region. A second high concentration diffusion region,
A PN junction made of a semiconductor between the first high-concentration diffusion region and the second high-concentration diffusion region, disposed below the equal-width bridge portion made of two LOCOS oxide films in each of the m groups of openings. 2m areas are formed with equal width,
The m first high-concentration diffusion regions are connected to each other through electrodes,
The 2m second high-concentration diffusion regions are connected to each other through electrodes ,
The planar shape of the opening of the LOCOS oxide film is a rectangle whose long side is an equal-width bridge made of the LOCOS oxide film,
The opening for forming the first high-concentration diffusion region and the opening for forming the second high-concentration diffusion region have different lengths along the equal-width bridge made of the LOCOS oxide film. A diode characterized by that.

A LOCOS oxide film comprising (n + 1) openings disposed on a semiconductor and divided by n equal-width bridges;
Among the (n + 1) openings, the first openings are arranged in the semiconductor deeper than the LOCOS oxide film through the openings of the first opening group consisting of every other opening. A set of a plurality of first high-concentration diffusion regions made of any one of the molds;
Arranged in the semiconductor deeper than the LOCOS oxide film through each opening of the second opening group composed of every other opening adjacent to each opening of the first opening group; A plurality of second high-concentration diffusion regions each having a P-type or N-type opposite to the first high-concentration diffusion region;
A PN junction region made of a semiconductor between the first high-concentration diffusion region and the second high-concentration diffusion region is arranged under a uniform width bridge portion made of each of the n LOCOS oxide films, and has a uniform width. n are formed,
The plurality of first high concentration diffusion regions are connected to each other through electrodes,
The plurality of second high-concentration diffusion regions are connected to each other through electrodes ,
The planar shape of the opening of the LOCOS oxide film is a rectangle equal width bridge portion consisting of the LOCOS oxide film and the long sides,
The opening for forming the first high-concentration diffusion region and the opening for forming the second high-concentration diffusion region have different lengths along the equal-width bridge made of the LOCOS oxide film. A diode characterized by that.

4. The diode according to claim 1, wherein corners of the rectangular opening of the LOCOS oxide film are rounded to form a substantially rectangular shape . 5.

In at least one of the first high-concentration diffusion region and the second high-concentration diffusion region formed in a rectangular shape through the rectangular opening, the one around the both ends of the rectangle in the longitudinal direction 5. The diode according to claim 1, wherein a low-concentration diffusion region having a lower concentration than that of the one high-concentration diffusion region is formed by an impurity having the same type as that of the high-concentration diffusion region .

The shape of the contact surface of each electrode formed inside the rectangular opening and in contact with the first high concentration diffusion region and the second high concentration diffusion region is:
The distance between the short side of the opening and the short side of the opening is larger than the distance from the equal width bridge made of the LOCOS oxide film that forms the long side of the opening. diode according to One.

The first high concentration diffusion region and the second high concentration diffusion region are formed corresponding to each of the first high concentration diffusion region and the second high concentration diffusion region on the opening of the LOCOS oxide film for forming the first high concentration diffusion region and the second high concentration diffusion region. A first lower electrode and a second lower electrode are provided;
An interlayer insulating film is formed on the first lower layer electrode and the second lower layer electrode;
In the interlayer insulating film, a first interlayer insulating film opening is formed corresponding to the first lower layer electrode, and a second interlayer insulating film opening is formed corresponding to the second lower layer electrode,
A first upper layer electrode and a second upper layer electrode are formed on the interlayer insulating film;
The first upper layer electrode is connected to the first lower layer electrode corresponding to the first high-concentration diffusion region through the first interlayer insulating film opening , and the second upper layer electrode is connected to the first lower layer electrode through the second interlayer insulating film opening. 7. The diode according to claim 1 , wherein the diode is connected to a second lower layer electrode corresponding to the two high-concentration diffusion regions .

8. The diode according to claim 7 , wherein a shortest width in a plane of each of the first upper electrode and the second upper electrode is larger than a shortest width in a plane of each of the first lower electrode and the second lower electrode. .

A protective film is formed on the first upper electrode and the second upper electrode;
An opening is formed in the protective film corresponding to the first upper layer electrode, and a first pad is formed by the first upper layer electrode exposed through the opening ;
An opening is formed in the protective film corresponding to the second upper layer electrode, and a second pad is formed by the second upper layer electrode exposed through the opening,
The first pad and the second pad are disposed on both sides of the opening of the LOCOS oxide film, and the widths of the first upper layer electrode and the second upper layer electrode are respectively set to the first pad and the second pad. 9. The diode according to claim 7 , wherein the diode is made larger as it approaches 2 pads .

The first high-concentration diffusion region, the second high-concentration diffusion region, and the PN junction region disposed in the semiconductor are surrounded by a P-type third high-concentration diffusion region, and the third high-concentration diffusion region is used as an electrode. 10. The diode according to claim 1 , wherein the diode is grounded .

10. The first high-concentration diffusion region, the second high-concentration diffusion region, and the PN junction region that are disposed in a semiconductor are surrounded by an insulating region. Diodes.

A LOCOS oxide film comprising three openings disposed on a semiconductor and divided by two equal-width bridges;
A first high-concentration diffusion region made of P-type or N-type and disposed in the semiconductor deeper than the LOCOS oxide film through the central opening of the three openings;
The second openings are formed in the semiconductor deeper than the LOCOS oxide film through openings at both ends of the three openings, and are P-type or N-type opposite to the first high-concentration diffusion region. Having a high concentration diffusion region,
Two PN junction regions made of a semiconductor between the first high-concentration diffusion region and the second high-concentration diffusion region are arranged below the equal-width bridge portion made of the two LOCOS oxide films. Formed,
The two second high-concentration diffusion regions are connected to each other through electrodes,
The planar shape of the opening of the LOCOS oxide film is a rectangle whose long side is an equal-width bridge made of the LOCOS oxide film,
The opening for forming the first high-concentration diffusion region and the opening for forming the second high-concentration diffusion region have different lengths along the equal-width bridge made of the LOCOS oxide film. A method of manufacturing a diode, comprising:
Providing the LOCOS oxide film comprising three openings disposed on the semiconductor and divided by the two equal width bridge portions;
Impurities are ion-implanted into the semiconductor through the central opening of the three openings, and then heat-treated, so that the first high-concentration diffusion region that is P-type or N-type deeper than the LOCOS oxide film is formed. Forming, and
Impurities are ion-implanted into the semiconductor through the openings at both ends of the three openings, and then heat-treated to form a P-type that is deeper than the LOCOS oxide film and opposite to the first high-concentration diffusion region. Or forming the two second high-concentration diffusion regions made of N-type,
And a step of connecting the two second high-concentration diffusion regions to each other through electrodes.

A LOCOS oxide film comprising three openings arranged on a semiconductor and divided by two equal-width bridge portions as one set of opening groups, and m sets of the opening groups;
The m first high-concentration diffusion regions which are arranged in the semiconductor deeper than the LOCOS oxide film through the central opening of each of the m sets of openings and are made of either P-type or N-type. When,
2 m pieces of P-type or N-type which are disposed in the semiconductor deeper than the LOCOS oxide film through openings at both ends of each of the m sets of opening groups and are opposite to the first high concentration diffusion region. A second high concentration diffusion region,
A PN junction made of a semiconductor between the first high-concentration diffusion region and the second high-concentration diffusion region, disposed below the equal-width bridge portion made of two LOCOS oxide films in each of the m groups of openings. 2m areas are formed with equal width,
The m first high-concentration diffusion regions are connected to each other through electrodes,
The 2m second high-concentration diffusion regions are connected to each other through electrodes,
The planar shape of the opening of the LOCOS oxide film is a rectangle whose long side is an equal-width bridge made of the LOCOS oxide film,
The opening for forming the first high-concentration diffusion region and the opening for forming the second high-concentration diffusion region have different lengths along the equal-width bridge made of the LOCOS oxide film. A method of manufacturing a diode, comprising:
Providing the LOCOS oxide film having m openings as a set of three openings arranged on the semiconductor and divided by the two equal-width bridge portions;
Impurities are ion-implanted into the semiconductor through the central opening of each of the m groups of openings, and then heat-treated, so that the first high-concentration diffusion that is P-type or N-type deeper than the LOCOS oxide film Forming m regions,
Impurities are ion-implanted into the semiconductor through openings at both ends of each of the m groups of openings, and then heat-treated, deeper than the LOCOS oxide film and opposite to the first high-concentration diffusion region, Forming 2m of the second high-concentration diffusion region made of P-type or N-type;
Connecting the m first high-concentration diffusion regions to each other through an electrode;
Connecting the 2m second high-concentration diffusion regions to each other through electrodes. A method for manufacturing a diode.

A LOCOS oxide film comprising (n + 1) openings disposed on a semiconductor and divided by n equal-width bridges;
Of the (n + 1) openings, the first openings are arranged in the semiconductor deeper than the LOCOS oxide film through the openings of the first opening group consisting of every other opening. A set of a plurality of first high-concentration diffusion regions made of any one of the molds;
Arranged in the semiconductor deeper than the LOCOS oxide film through each opening of the second opening group composed of every other opening adjacent to each opening of the first opening group; A plurality of second high-concentration diffusion regions each having a P-type or N-type opposite to the first high-concentration diffusion region;
A PN junction region made of a semiconductor between the first high-concentration diffusion region and the second high-concentration diffusion region is arranged under a uniform width bridge portion made of each of the n LOCOS oxide films, and has a uniform width. n are formed,
The plurality of first high concentration diffusion regions are connected to each other through electrodes,
The plurality of second high-concentration diffusion regions are connected to each other through electrodes,
The planar shape of the opening of the LOCOS oxide film is a rectangle whose long side is an equal-width bridge made of the LOCOS oxide film,
The opening for forming the first high-concentration diffusion region and the opening for forming the second high-concentration diffusion region have different lengths along the equal-width bridge made of the LOCOS oxide film. A method of manufacturing a diode, comprising:
Providing the LOCOS oxide film comprising (n + 1) openings disposed on the semiconductor and divided by n equal-width bridge portions;
Impurities are ion-implanted into the semiconductor through the openings of the first opening group consisting of every other opening among the (n + 1) openings, and then heat-treated, Forming a plurality of the first high-concentration diffusion regions made of P-type or N-type deeper than a LOCOS oxide film;
Impurities are ion-implanted into the semiconductor through the openings of the second openings composed of every other opening adjacent to the openings of the first openings, and thereafter Performing a heat treatment to form a plurality of second high-concentration diffusion regions made of P-type or N-type, which are deeper than the first LOCOS oxide film and opposite to the first high-concentration diffusion regions;
Connecting the plurality of first high-concentration diffusion regions to each other through electrodes;
And a step of connecting the plurality of second high-concentration diffusion regions to each other through electrodes.