JP4034524B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device using a silicon oxide film doped with fluorine as an interlayer insulating film and a method for manufacturing the same.
[0002]
[Prior art]
With higher integration and higher speed of semiconductor devices, reduction of inter-wiring capacitance and inter-layer capacitance is required. To that end, development of technology for lowering resistance of metal wiring and lowering dielectric constant of inter-layer insulation film is progressing. It is out.
[0003]
As a technique for reducing the dielectric constant of an interlayer insulating film, the introduction of an insulating film called a film obtained by adding fluorine to a silicon oxide film that has been used conventionally (hereinafter referred to as an FSG film) is known.
[0004]
FIG. 4 shows a conventional multilayer wiring structure using an FSG film. 4, 71 is a TEOS oxide film, 72 is a Ti / TiN film, 73 is an Al wiring, 74 is a Ti / TiN film, 75 is an FSG film, 76 is a SiON film, 77 is a Ti / TiN film, and 78 is the uppermost layer. Al wiring, 79 is a Ti / TiN film, 80 is a TEOS oxide film, and 81 is a SiN film.
[0005]
The FSG film 75 releases fluorine in a thermal process. Therefore, when the wiring layers 77 to 79 are directly formed on the FSG film 75, the released fluorine diffuses into the wiring layers 77 to 79, and the adhesion between the FSG film 75 and the wiring layers 77 to 79 is lowered. In particular, since the wiring layers 77 to 79 which are the uppermost wiring layers are required to have strong adhesiveness for wire bonding, deterioration of the adhesiveness becomes a serious problem. Therefore, as shown in FIG. 4, the FSG film 75 is capped with a SiON film 76 which is a film having low gas permeability.
[0006]
When the SiON film 76 having low gas permeability is used under the wiring layers 77 to 79 which are the uppermost wiring layers, water (dehydrated and condensed) from the TEOS oxide film 71 is formed by a heat treatment process performed after the wiring layers 77 to 79 are formed. H ₂ O) is blown at high pressure without being removed due to the presence of the SiON film 76.
[0007]
As a result, the Si—F bond in the FSG film 75 causes a hydrolysis reaction with the water, and corrosive HF is generated. This HF creates a cavity at the interface between the FSG film 75 and the SiON film 76, and the adhesion between the FSG film 75 and the SiON film 76 decreases. In the worst case, peeling occurs at the interface between the FSG film 75 and the SiON film 76. . Further, HF diffuses into the lower wiring layers 72 to 74, and the wiring layers 72 to 74 are corroded, resulting in an increase in wiring resistance.
[0008]
[Problems to be solved by the invention]
As described above, in order to solve the problem caused by fluorine released from the FSG film, if the FSG film is capped with a SiON film having a low gas permeability, it is generated from the TEOS oxide film in the heat treatment process after the formation of the uppermost wiring layer. There is a problem that the Si—F bond in the FSG film undergoes a hydrolysis reaction due to H ₂ O which is blown at a high pressure without being released, and corrosive HF is generated.
[0009]
The present invention has been made in view of the above circumstances, and the object of the present invention is to release fluorine and F from the same film when an insulating film containing fluorine is used as an interlayer insulating film between wirings. It is an object of the present invention to provide a semiconductor device and a method for manufacturing the same that can prevent generation of a contained substance.
[0010]
[Means for Solving the Problems]
Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows. In other words, in order to achieve the above object, a semiconductor device according to the present invention includes a TEOS oxide film formed on a semiconductor substrate, a first wiring formed on the TEOS oxide film, and the TEOS oxide film. the formed to cover the first wiring, an insulating film containing fluorine, and a second wiring formed on an insulating film including the fluorine, an insulating film containing fluorine and the second wiring And an SiON film formed in contact with the insulating film containing fluorine selectively.
[0011]
The semiconductor device according to the present invention may include two or more of the limitations described in claims 2 to 4 at the same time.
[0012]
The method for manufacturing a semiconductor device according to the present invention includes a step of forming a TEOS oxide film on a semiconductor substrate, a step of forming a first wiring on the TEOS oxide film, and the first step on the TEOS oxide film. forming an insulating film containing fluorine so as to cover the first wiring, forming in contact with the SiON film to the insulating film containing fluorine on an insulating layer including the fluorine, the second on the SiON film A step of forming a conductive film to be a wiring, and etching the conductive film and the SiON film to form a second wiring made of the conductive film on the insulating film containing fluorine, and forming the SiON film on the insulating film And a step of leaving only under the second wiring.
[0013]
In the present invention, the fluorine rather than the entire surface of the insulating film including only the on the insulating film including the second fluorine under wiring provided SiON film. Therefore, the gas generated in the TEOS oxide film by the heat treatment after the formation of the second wiring can be released to the outside from the insulating film containing fluorine . Accordingly, it is possible to prevent the gas generated in the TEOS oxide film from reacting with the fluorine in the insulating film containing fluorine to generate a substance containing F. In addition, since the insulating film containing fluorine under the second wiring is capped by the SiON film , diffusion of fluorine into the wiring is prevented, and deterioration of the adhesion of the second wiring can be prevented.
[0014]
The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention (hereinafter referred to as embodiments) will be described with reference to the drawings.
[0016]
1 and 2 are process cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
[0017]
First, as shown in FIG. 1A, RIE (Reactive Ion Etching) wiring is formed on a Si substrate (not shown) according to a known method. In the figure, 1 is a TEOS oxide film, 2 is a Ti / TiN film, 3 is an Al wiring, and 4 is a Ti / TiN film. Elements such as MOS transistors are integrated on the Si substrate.
[0018]
Next, as shown in FIG. 1B, an FSG film 5 is deposited on the entire surface so as to cover the lower wiring layers 2 to 4 and the surface is flattened, and then an undoped SiON film is formed on the FSG film 5. 6. Ti / TiN film 7, Al film 8 and Ti / TiN film 9 are sequentially deposited. The FSG film 5 is deposited using, for example, a plasma CVD method. The relative dielectric constant of the FSG film 5 is, for example, 4.0 or less.
[0019]
Next, as shown in FIG. 1C, after forming a photoresist pattern 10 on the Ti / TiN film 9, using the photoresist pattern 10 as a mask, the Ti / TiN film 9, the Al film 8, Ti / TiN The TiN film 7 and the SiON film 6 are etched by the RIE method to form the uppermost wiring layers 6-9. At this time, the SiON film 6 exists under the Al wiring 8, but does not exist in other regions. This is a structural difference from the prior art.
[0020]
Next, after removing the photoresist pattern 7 by ashing, as shown in FIG. 2D, a TEOS oxide film 11 is deposited on the entire surface so as to cover the wiring layers 6 to 9, and the surface is flattened.
[0021]
Thereafter, in order to improve the reliability of the uppermost wiring layers 6 to 9, heat treatment is performed at 400 ° C. for 20 minutes. At this time, H ₂ O dehydrated from the TEOS oxide film 1 can escape to the outside from the FSG film 5 in the region where the SiON film 6 is not formed.
[0022]
Therefore, the hydrolysis reaction of the Si—F bond in the FSG film 5 does not occur, and corrosive HF does not occur. Furthermore, various problems caused by HF, that is, the adhesion between the FSG film 5 and the SiON film 6 due to the generation of a cavity between the FSG film 5 and the SiON film 6, peeling of the wiring layers 6 to 9, and the lower layer Naturally, problems such as an increase in the wiring resistance of the wiring layers 2 to 4 do not occur.
[0023]
Further, since the FSG film 5 under the wiring layers 6 to 9 is capped with the SiON film 6, the fluorine released from the FSG film 5 by the heat treatment diffuses into the wiring layers 6 to 9, and the FSG film 5 and the wiring There is no problem that the adhesion with the layers 6 to 9 is lowered.
[0024]
Next, as shown in FIG. 2E, a SiN film 12 is deposited on the TEOS oxide film 11 and the surface is flattened.
[0025]
Thereafter, heat treatment is performed at 400 ° C. for 60 minutes in order to improve the reliability of elements such as MOS transistors formed on the Si substrate.
[0026]
At this time, H ₂ O dehydrated and condensed from the TEOS oxide film 1 can escape to the outside from the FSG film 5 in the region where the SiON film 6 is not formed and the SiN film 12 thereon, so that FIG. HF is not generated, as in the case of the process (1).
[0027]
Further, as in the case of the process of FIG. 1C, since the FSG film 5 under the wiring layers 6 to 9 is capped with the SiON film 6, the FSG releases FSG by fluorine released from the FSG film 5 by the heat treatment. There is no problem that the adhesion between the film 5 and the wiring layers 6 to 9 is lowered.
[0028]
2E is followed by a known process such as opening a via hole in the uppermost wiring layers 6 to 9 in the SiN film 12 and taking wire bonding.
[0029]
FIG. 3 shows the results of a pad peeling strength test by wire bonding for each of the present invention and the conventional Al multilayer wiring layer structure. From the figure, it can be seen that the same wire bonding strength as in the prior art can be obtained even in the multilayer wiring structure of the present invention having fewer SiON films than in the prior art.
[0030]
Further, when the interface between the FSG film 5 and the SiON film 6 was examined by cross-sectional SEM observation, it was confirmed that there was no abnormality.
[0031]
The present invention is not limited to the above embodiment. For example, in the above embodiment, the FSG film 5 (SiOF film) is used as the insulating film containing fluorine, but a SiONF film may be used. Further, instead of the TEOS oxide films 1 and 11, an undoped SiN film or a silicon oxide film may be used.
[0032]
In the above embodiment, the Ti / TiN film is used as the liner film, but other films such as an Nb film may be used.
[0033]
Furthermore, the Al film used for the Al wirings 3 and 8 may be a pure Al film or an AlCu film to which a small amount of Cu is added.
[0034]
In the above embodiment, the uppermost wiring layers 6-9 are formed between the two lower wiring layers 2-4. However, in order to enhance the effect of the present invention, the uppermost wiring layers 6-9 are formed. -9 are preferably formed immediately above the lower wiring layers 2-4.
[0035]
Furthermore, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some constituent requirements are deleted from all the constituent requirements shown in the embodiment, if the problem described in the column of the problem to be solved by the invention can be solved, the configuration in which this constituent requirement is deleted Can be extracted as an invention. In addition, various modifications can be made without departing from the scope of the present invention.
[0036]
【The invention's effect】
As described in detail above, according to the present invention, when an insulating film containing fluorine is used as an interlayer insulating film between wirings, a semiconductor device capable of preventing the release of fluorine from the film and the generation of a substance containing fluorine, and the semiconductor device A manufacturing method can be realized.
[Brief description of the drawings]
FIG. 1 is a process cross-sectional view showing a method for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 2 is a process cross-sectional view showing a method for manufacturing the semiconductor device following FIG. The figure which shows the result of having tried the pad peeling strength test by wire bonding about each of the multilayer wiring structure of Al. [FIG. 4] Sectional drawing which shows Al wiring of the multilayer structure which used the FSG film for the conventional interlayer insulation film Explanation】
1 ... TEOS oxide film (first insulating film)
2 ... Ti / TiN film 3 ... Al wiring (first wiring)
4 ... Ti / TiN film 5 ... FSG film (second insulating film)
6 ... SiON film (third insulating film)
7 ... Ti / TiN film 8 ... Al film (Al distribution: second wiring)
9 ... Ti / TiN film 10 ... photoresist pattern 11 ... TEOS oxide film 12 ... SiN film

Claims (7)

A TEOS oxide film formed on a semiconductor substrate;
A first wiring formed on the TEOS oxide film;
An insulating film formed on the TEOS oxide film so as to cover the first wiring and containing fluorine;
A second wiring formed on the insulating film containing fluorine ;
A semiconductor device comprising: a SiON film selectively formed in contact with the fluorine-containing insulating film between the second wiring and the fluorine-containing insulating film.   The semiconductor device according to claim 1, wherein the first and second wirings are Al wirings. The semiconductor device according to claim 1, wherein the insulating film containing fluorine is a SiOF film.   The semiconductor device according to claim 1, wherein the second wiring is an uppermost wiring. Forming a TEOS oxide film on a semiconductor substrate;
Forming a first wiring on the TEOS oxide film;
Forming an insulating film containing fluorine on the TEOS oxide film so as to cover the first wiring;
Forming contact the SiON film in the insulating film containing fluorine on the insulating film including the fluorine,
Forming a conductive film to be a second wiring on the SiON film ;
Etching the conductive film and the SiON film , forming a second wiring made of the conductive film on the insulating film containing fluorine, and leaving the SiON film only under the second wiring; A method for manufacturing a semiconductor device, comprising: 6. The method of manufacturing a semiconductor device according to claim 5 , wherein the insulating film containing fluorine is formed by a plasma CVD method. 6. The method of manufacturing a semiconductor device according to claim 5 , wherein a heat treatment is performed after the step of forming the TEOS oxide film covering the second wiring and the SiON film remaining under the second wiring .

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