JP4000170B2 - Chip size package - Google Patents

Description

The present invention is, for example, relates to a chip size package of the same external size as the sensor substrate for detecting an acceleration or pressure.

  Conventionally, as shown in FIGS. 11 and 12, an acceleration sensor chip 101 in which a piezoresistor (not shown) as a sensing unit is formed, and a signal processing circuit that processes an output signal of the acceleration sensor chip 101 are formed. The acceleration sensor chip 101 and the IC between the mounted IC chip 102, the mounting substrate 105 having a box shape with one surface open, and the frame portion 111 of the acceleration sensor chip 101 fixed to the inner bottom surface. There has been proposed a sensor module including a lid 106 that closes the one surface of the mounting substrate 105 so as to accommodate the chip 102 (see, for example, Patent Document 1).

  In the sensor module having the configuration shown in FIGS. 11 and 12, the acceleration sensor chip 101, the IC chip 102 fixed to the acceleration sensor chip 101, the pad 116 of the acceleration sensor chip 101, and the pad 121 of the IC chip 102 are used. And a bonding wire 108 electrically connected to each other to form a sensor device.

In the sensor module having the configuration shown in FIGS. 11 and 12, the IC chip 102 is provided with a stopper for restricting excessive displacement of the movable part constituted by the weight part 112 and each bending part 113 of the acceleration sensor chip 101. It is also fixed to the main surface side of the acceleration sensor chip 101 so that a gap with a predetermined interval is formed between the main surface of the acceleration sensor chip 101 and a plurality of main surface sides of the acceleration sensor chip 101. Each of the pads 116 is electrically connected to a part of the plurality of pads 121 on the main surface side of the IC chip 102 via the bonding wires 108, and each of the remaining pads 121 of the IC chip 102 is mounted on the mounting substrate via the bonding wires 109. 105 is electrically connected to a terminal pattern 151 provided on the one surface side.
JP 2005-169541 A

  By the way, in the sensor device in the sensor module shown in FIG. 11 and FIG. 12, the acceleration sensor chip 101 that is the sensor unit and the IC chip 102 that is the IC unit are arranged so as to overlap each other in the thickness direction. And the pad 121 on the main surface side of the IC chip 102 are electrically connected via the bonding wire 108, and the mounting height becomes relatively high. .

The present invention has been made in view of the above circumstances, an object thereof is to provide a chip size package Ru results in low profile as compared to the conventional.

The invention according to claim 1 is a sensor substrate formed using an SOI substrate having a silicon layer on an insulating layer on a support substrate made of a silicon substrate, and has a through-hole wiring and is formed to have the same outer dimensions as the sensor substrate. Chip size comprising a through-hole wiring formation substrate sealed on the surface side of the silicon layer in the SOI substrate, and a cover substrate formed in the same outer dimensions as the sensor substrate and sealed on the back side of the support substrate in the SOI substrate The sensor board includes a movable part and a piezoresistor formed on the movable part, and an IC part that cooperates with the sensor part and is electrically connected to the through-hole wiring. And an area for bonding with the through-hole wiring forming substrate, an IC portion is formed so as to surround the sensor portion, and a bonding area portion is formed so as to surround the IC portion, The esophore and the IC portion are formed on the same silicon layer, and the frame-shaped first sealing metal layer is formed on the surface side of the silicon layer in the bonding region portion, and the first sealing metal layer A first electrical connection metal layer for electrically connecting the IC portion and the through-hole wiring is formed inside the first sealing metal layer and the first electrical connection metal layer. However, the through hole wiring formation substrate is formed with the same metal material with the same thickness, and the frame-shaped second sealing metal layer bonded to the first sealing metal layer is formed, A second electrical connection metal layer electrically connected to the through-hole wiring is formed inside the second encapsulation metal layer, and the second electrical connection metal layer and the second electrical connection The metal layer is formed of the same metal material with the same thickness, and the sensor substrate and the through-hole wiring formation substrate have active bonding surfaces. The first sealing metal layer and the second sealing metal layer whose bonding surface is activated are bonded at room temperature, and the first electrical connection metal layer and bonding surface whose bonding surface is activated It is characterized in that the second electrical connection metal layer in which is activated is joined at room temperature .

According to the present invention, since the piezoresistor and the IC part are formed on the silicon layer of the same SOI substrate, the height can be reduced as compared with the prior art, and the IC part is formed so as to surround the sensor part. Therefore, the layout of the wiring between the sensor unit and the IC unit can be facilitated, the deterioration of the output characteristics of the sensor unit due to the external stress from the IC unit side can be prevented, and the sensor substrate can be joined. A frame-shaped first sealing metal layer is formed on the surface side of the silicon layer in the region, and the IC portion and the through-hole wiring are electrically connected to the inside of the first sealing metal layer. A first metal layer for electrical connection is formed , and the first sealing metal layer and the first metal layer for electrical connection are formed of the same metal material with the same thickness, and the through hole The wiring forming substrate is bonded to the first sealing metal layer. A second sealing metal layer is formed, and a second electrical connection metal layer electrically connected to the through-hole wiring is formed inside the second sealing metal layer. The second sealing metal layer and the second electrical connection metal layer are formed of the same metal material with the same thickness, and the sensor substrate and the through-hole wiring formation substrate are activated on the bonding surface. The first sealing metal layer and the second sealing metal layer whose bonding surface is activated are bonded at room temperature, and the first electrical connection metal layer and the bonding surface whose bonding surface is activated are active. Since the second metal layer for electrical connection that has been formed is bonded at room temperature , the residual stress of the sensor substrate due to the bonding of the through-hole wiring forming substrate can be reduced.

According to a second aspect of the present invention, in the first aspect of the invention, the sensor unit is swingably supported on the frame unit via four flexures in which a weight unit disposed inside the frame unit extends in all directions. And a three-axis acceleration sensor unit capable of detecting accelerations in three directions orthogonal to each other, wherein the movable part is configured by a weight part and each bending part, and each of the portions corresponding to each bending part in the silicon layer A piezoresistor is formed .

In the invention of claim 1, which figure lower profile than the conventional, moreover, with the layout of the wiring between the sensor unit and the IC portion is facilitated, the output of the sensor section due to external stress from the IC side There is an effect that deterioration of characteristics can be prevented .

  In this embodiment, as shown in FIGS. 1 and 2, an n-type silicon layer (active layer) 10c is formed on an insulating layer (buried oxide film) 10b made of a silicon oxide film on a support substrate 10a made of a silicon substrate. An example of an acceleration sensor provided with the sensor device 1 formed using the SOI substrate 10 as a sensor substrate will be described.

  As shown in FIG. 4, the acceleration sensor of the present embodiment is formed using the sensor substrate 1 and the first silicon substrate 20 and is electrically connected to the IC portion E <b> 2 of the sensor substrate 1. And a first package substrate (through-hole wiring forming substrate) 2 sealed on one surface side (upper surface side in FIG. 4) of the sensor substrate 1 and a second silicon substrate 30. A second package substrate (cover substrate) 3 sealed on the other surface side (lower surface side in FIG. 4) of the sensor substrate 1 is provided. Here, the outer peripheral shape of the sensor substrate 1 and each package substrate 2, 3 is rectangular, and each package substrate 2, 3 is formed to have the same outer dimensions as the sensor substrate 1. In this embodiment, the thickness of the support substrate 10a in the SOI substrate 10 is about 300 μm to 500 μm, the thickness of the insulating layer 10b is about 0.3 μm to 1.5 μm, and the thickness of the silicon layer 10c is about 4 μm to 10 μm. The thickness of the first silicon substrate 20 is about 200 μm to 300 μm, and the thickness of the second silicon substrate 30 is about 100 to 300 μm. However, these numerical values are not particularly limited. The surface of the silicon layer 10c, which is the main surface of the SOI substrate 10, is a (100) plane.

  As shown in FIGS. 1 and 2, the sensor substrate 1 has piezoresistors Rx1 to Rx4, Ry1 to Ry4, and Rz1 to Rz4 formed on a movable portion that includes a weight portion 12 and a bending portion 13 described later. A sensor unit E1 and an IC unit E2 cooperating with the sensor unit E1 are provided. In the sensor substrate 1, the sensor part E1 is formed in the central part, the IC part E2 is formed so as to surround the sensor part E1, and a bonding area part E3 described later is formed so as to surround the IC part E2. .

  The sensor portion E1 in the sensor substrate 1 includes a frame portion 11 having a frame shape (in this embodiment, a rectangular frame shape), and a weight portion 12 disposed inside the frame portion 11 is on one surface side (FIG. 1B). Is supported by the frame portion 11 via four flexible strip-shaped bending portions 13 having flexibility. In other words, the sensor part E1 of the sensor substrate 1 swings to the frame part 11 via the four bending parts 13 in which the weight part 12 arranged inside the frame-like frame part 11 is extended from the weight part 12 in four directions. It is supported freely. Here, the frame portion 11 is formed using the support substrate 10a, the insulating layer 10b, and the silicon layer 10c of the SOI substrate 10 described above. On the other hand, each bending part 13 is formed using the silicon layer 10 c in the SOI substrate 10 and is sufficiently thinner than the frame part 11.

  The weight part 12 is continuously integrated with each of the rectangular parallelepiped core part 12a supported by the frame part 11 via the four flexure parts 13 and the four corners of the core part 12a when viewed from the one surface side of the sensor substrate 1. And four accompanying portions 12b having a rectangular parallelepiped shape connected to each other. In other words, the weight portion 12 is formed integrally with the core portion 12a and the core portion 12a in which the other end portion of each bending portion 13 whose one end portion is connected to the inner side surface of the frame portion 11 is connected to the outer surface. It has four accompanying parts 12b arranged in the space between the part 12a and the frame part 11. That is, each appendage portion 12b is disposed in a space surrounded by the frame portion 11 and the core portion 12a and the two bent portions 13 and 13 extending in a direction orthogonal to each other when viewed from the one surface side of the sensor substrate 1. In addition, a slit 14 is formed between each of the accompanying portions 12b and the frame portion 11, and the interval between the adjacent accompanying portions 12b with the bending portion 13 interposed therebetween is longer than the width dimension of the bending portion 13. Yes. Here, the core portion 12a is formed using the support substrate 10a, the insulating layer 10b, and the silicon layer 10c of the SOI substrate 10 described above, and each accompanying portion 12b is formed using the support substrate 10a of the SOI substrate 10. It is formed. Thus, on the one surface side of the sensor substrate 1, the surface of each associated portion 12b is separated from the plane including the surface of the core portion 12a to the other surface side of the sensor substrate 1 (the lower surface side in FIG. 1B). Is located. Note that the above-described frame portion 11, weight portion 12, and each bending portion 13 of the sensor substrate 1 may be formed using a lithography technique and an etching technique.

  By the way, as shown in the lower right of each of FIGS. 1A and 1B, one direction along one side of the frame portion 11 in a plane parallel to the one surface of the sensor substrate 1 is the positive direction of the x-axis. If one direction along the side orthogonal to the one side is defined as the positive direction of the y-axis and one direction of the thickness direction of the sensor substrate 1 is defined as the positive direction of the z-axis, the weight portion 12 is extended in the x-axis direction. The pair of flexible portions 13 and 13 sandwiching the core portion 12a and the pair of flexible portions 13 and 13 extending in the y-axis direction and sandwiching the core portion 12a are supported by the frame portion 11. Will be. In the orthogonal coordinates defined by the three axes of the above-described x axis, y axis, and z axis, the center position of the weight portion 12 on the surface of the portion of the sensor substrate 1 formed by the silicon layer 10c is the origin.

  The bending portion 13 (the bending portion 13 on the right side of FIG. 1A) extending from the core portion 12a of the weight portion 12 in the positive direction of the x-axis is a pair of piezoresistors Rx2 and Rx4 in the vicinity of the core portion 12a. Is formed, and one piezoresistor Rz2 is formed in the vicinity of the frame portion 11. On the other hand, the bending portion 13 (the bending portion 13 on the left side of FIG. 1A) extended from the core portion 12a of the weight portion 12 in the negative direction of the x-axis is a pair of piezoresistors Rx1 in the vicinity of the core portion 12a. , Rx3 are formed, and one piezoresistor Rz3 is formed in the vicinity of the frame portion 11. Here, the four piezoresistors Rx1, Rx2, Rx3, and Rx4 formed in the vicinity of the core portion 12a are formed to detect acceleration in the x-axis direction, and the planar shape is an elongated rectangular shape. The wiring (not shown) (diffuse layer wiring, metal) formed on the sensor substrate 1 so as to constitute the left bridge circuit Bx in FIG. 3 is formed so that the longitudinal direction coincides with the longitudinal direction of the bending portion 13. Connected by wiring). Note that the piezoresistors Rx1 to Rx4 are formed in a stress concentration region where stress is concentrated in the bent portion 13 when acceleration in the x-axis direction is applied.

  Further, the bending portion 13 (the upper bending portion 13 in FIG. 1A) extended from the core portion 12a of the weight portion 12 in the positive direction of the y-axis is a pair of piezoresistors Ry1, in the vicinity of the core portion 12a. Ry3 is formed, and one piezoresistor Rz1 is formed in the vicinity of the frame portion 11. On the other hand, the bending portion 13 (the lower bending portion 13 in FIG. 1A) extended from the core portion 12a of the weight portion 12 in the negative direction of the y-axis is a pair of piezoresistors Ry2 in the vicinity of the core portion 12a. , Ry4 are formed, and one piezoresistor Rz4 is formed at the end on the frame part 11 side. Here, the four piezoresistors Ry1, Ry2, Ry3, and Ry4 formed in the vicinity of the core portion 12a are formed to detect acceleration in the y-axis direction, and the planar shape is an elongated rectangular shape. The wiring (not shown) (diffusion layer wiring, metal) formed on the sensor substrate 1 so as to form the central bridge circuit By in FIG. 3 is formed so that the longitudinal direction coincides with the longitudinal direction of the bending portion 13. Connected by wiring). Note that the piezoresistors Ry1 to Ry4 are formed in a stress concentration region where stress is concentrated in the flexure 13 when acceleration in the y-axis direction is applied.

  Further, the four piezoresistors Rz1, Rz2, Rz3, Rz4 formed in the vicinity of the frame portion 11 are formed for detecting acceleration in the z-axis direction, and constitute the right bridge circuit Bz in FIG. In this manner, the sensor substrate 1 is connected by wiring (not shown) (diffusion layer wiring, metal wiring, etc.) formed on the sensor substrate 1. However, the piezoresistors Rz1 and Rz4 formed in one set of the bent portions 13 and 13 of the two bent portions 13 and 13 are formed so that the longitudinal direction thereof coincides with the longitudinal direction of the bent portions 13 and 13. On the other hand, the piezoresistors Rz2 and Rz3 formed in the other set of flexures 13 and 13 are formed such that the longitudinal direction coincides with the width direction (short direction) of the flexures 13 and 13. Yes.

  The piezoresistors Rx1 to Rx4, Ry1 to Ry4, Rz1 to Rz4, and the diffusion layer wirings described above are formed by doping p-type impurities with appropriate concentrations at respective formation sites in the silicon layer 10c. .

  Here, an example of operation | movement of the sensor part E1 of the sensor board | substrate 1 is demonstrated.

  Now, assuming that acceleration is applied to the sensor substrate 1 in the positive x-axis direction while no acceleration is applied to the sensor substrate 1, the frame portion 11 is caused by the inertial force of the weight 12 acting in the negative x-axis direction. Accordingly, the weight 12 is displaced, and as a result, the bending portions 13 and 13 whose longitudinal direction is the x-axis direction are bent, and the resistance values of the piezoresistors Rx1 to Rx4 formed in the bending portions 13 and 13 are changed. Will do. In this case, the piezoresistors Rx1 and Rx3 are subjected to tensile stress, and the piezoresistors Rx2 and Rx4 are subjected to compressive stress. In general, a piezoresistor has a characteristic that a resistance value (resistivity) increases when subjected to a tensile stress, and a resistance value (resistivity) decreases when subjected to a compressive stress. Therefore, the piezoresistors Rx1 and Rx3 are resistant. The value increases, and the resistance values of the piezoresistors Rx2 and Rx4 decrease. Therefore, if a constant DC voltage is applied from the external power source between the pair of input terminals VDD and GND shown in FIG. 3, the potential difference between the output terminals X1 and X2 of the left bridge circuit Bx shown in FIG. It changes according to the magnitude of the acceleration in the x-axis direction. Similarly, when acceleration in the y-axis direction is applied, the potential difference between the output terminals Y1 and Y2 of the central bridge circuit By shown in FIG. 3 changes according to the magnitude of the acceleration in the y-axis direction, and the z-axis When acceleration in the direction is applied, the potential difference between the output terminals Z1 and Z2 of the right bridge circuit Bz shown in FIG. 3 changes according to the magnitude of acceleration in the z-axis direction. Thus, the above-described sensor substrate 1 detects the change in the output voltage of each of the bridge circuits Bx to Bz, so that the acceleration in the x-axis direction, the y-axis direction, and the z-axis direction that acted on the sensor substrate 1 is detected. Can be detected. In this embodiment, the weight part 12 and each bending part 13 comprise the movable part, and the sensor part E1 comprises the 3-axis acceleration sensor part.

  The IC portion E2 of the sensor substrate 1 is an integrated circuit (CMOS IC) using CMOS, and an integrated circuit that cooperates with the sensor portion E1 is formed. Here, the integrated circuit of the IC section E2 is a signal processing circuit that outputs the signal output from the bridge circuit Bx, By, Bz of the sensor section E1 by performing signal processing such as amplification, offset adjustment, temperature compensation, etc. An EEPROM or the like that stores data used in the processing circuit is integrated. The plurality of pads 42 formed in the IC portion E2 are electrically connected to the above-described bridge circuits Bx, By, Bz through the signal processing circuit, and the above-described bridge circuit without passing through the signal processing circuit. Some are electrically connected to Bx, By, Bz.

  By the way, the sensor substrate 1 is formed so that the IC portion E2 surrounds the sensor portion E1, and further, a bonding region portion E3 is formed so as to surround the IC portion E2. In short, the sensor substrate 1 includes the sensor part E1, the IC part E2, and the bonding area part so that the IC part E2 surrounds the sensor part E1 located at the center part in plan view and the bonding part E3 surrounds the IC part E2. The layout of E3 is designed.

  Here, in the IC part E2 of the sensor substrate 1, the occupation area of the ICE2 in the sensor substrate 1 is reduced by using a multilayer wiring technique. Here, on the surface side of the silicon layer 10c of the sensor substrate 1, a surface insulating film 16 composed of a laminated film of a silicon oxide film and a silicon nitride film on the silicon oxide film is formed. In the IC part E2, On the surface side of the surface insulating film 16, a multilayer structure portion 41 made of an interlayer insulating film or a passivation film is formed, and a plurality of pads 42 are exposed by removing appropriate portions of the passivation film. The plurality of pads 42 formed in the IC portion E2 are electrically connected to the above-described bridge circuits Bx, By, Bz through the signal processing circuit, and the above-described bridge circuit without passing through the signal processing circuit. Some are electrically connected to Bx, By, Bz.

  Further, in the bonding region portion E3 of the sensor substrate 1, a plurality of holes for electrically connecting the through-hole wiring 24 of the first package substrate 2 and the pads 42 of the IC portion E2 are formed on the surface insulating film 16. A first electrical connection metal layer 19 is formed, and a frame-shaped (rectangular frame-shaped) first sealing metal layer 18 is formed. Each pad 42 of the IC portion 42 and the first electrical connection metal layer 19 are formed. The connecting metal layer 19 is electrically connected via the lead wiring 43. Here, in the sensor substrate 1, a plurality of first electrical connection metal layers 19 are arranged in the circumferential direction of the bonding region E <b> 3 inside the first sealing metal layer 18. 4 and 5, the sensor substrate 1 is directly bonded to the second sealing metal layer 28 provided on the first package substrate 2 with the first sealing metal layer 18. Then, the first electrical connection metal layer 19 is directly joined and electrically connected to the second electrical connection metal layer 29 provided on the first package substrate 2.

  In the first sealing metal layer 18 and the first electrical connection metal layer 19, an adhesion improving Ti film is interposed between the bonding Au film and the insulating film 16. In other words, the first sealing metal layer 18 and the first electrical connection metal layer 19 are a laminated film of a Ti film formed on the surface insulating film 16 and an Au film formed on the Ti film. It is comprised by. In short, since the first electrical connection metal layer 19 and the first sealing metal layer 18 are formed of the same metal material, the first electrical connection metal layer 19 and the first sealing metal layer 19 are formed. The metal layer 18 can be formed at the same time, and the first electrical connection metal layer 19 and the first sealing metal layer 18 can be formed to have substantially the same thickness. Note that the first sealing metal layer 18 and the first electrical connection metal layer 19 have a Ti film thickness of 15 to 50 nm and an Au film thickness of 500 nm. Is an example and is not particularly limited. Here, the material of each Au film is not limited to pure gold, and may be added with impurities. Further, in this embodiment, a Ti film is interposed as an adhesion improving layer for adhesion between each Au film and the surface insulating film 16, but the material of the adhesion layer is not limited to Ti, for example, Cr, Nb, Zr, TiN, TaN, etc. may be used.

  As shown in FIGS. 6 and 7, the first package substrate 2 is formed on the surface of the first silicon substrate 20 on the sensor substrate 1 side (the lower surface side in FIG. 4) with the weight portion 12 of the sensor substrate 1 and each of the weights 12. A displacement space forming recess 21 that secures a displacement space of the movable portion constituted by the bending portion 13 is formed, and a plurality of through holes 22 penetrating in the thickness direction are formed in the peripheral portion of the displacement space forming recess 21. An insulating film 23 made of a thermal insulating film (silicon oxide film) is formed across both surfaces in the thickness direction and the inner surface of the through hole 22, and insulation is provided between the through hole wiring 24 and the inner surface of the through hole 22. A part of the film 23 is interposed. Here, the first package substrate 2 has an opening area of the displacement space forming recess 21 so that the sensor portion E1 and the IC portion E2 of the sensor substrate 1 are within the projection area of the opening surface of the displacement space forming recess 21. The multilayer structure portion 41 of the IC portion E2 is disposed in the displacement space forming recess 21 (see FIGS. 4 and 5). The plurality of through-hole wirings 24 of the first package substrate 2 are formed apart from each other in the circumferential direction of the first package substrate 2. Moreover, although Cu is adopted as the material of the through-hole wiring 24, it is not limited to Cu, and for example, Ni may be adopted.

  In addition, the first package substrate 2 has a plurality of second electric circuits described above that are electrically connected to the respective through-hole wirings 24 around the displacement space forming recesses 21 on the surface on the sensor substrate 1 side. A connecting metal layer 29 is formed. The first package substrate 2 is formed with the above-described frame-shaped (rectangular frame-shaped) second sealing metal layer 28 over the entire circumference of the peripheral portion of the surface on the sensor substrate 1 side. The plurality of second electrical connection metal layers 29 are disposed on the inner side of the second sealing metal layer 28 (here, the second sealing metal layer 28 and each electrical connection metal layer 29 is formed on the same level surface of the insulating film 23). Here, the second electrical connection metal layer 29 has an elongated rectangular outer peripheral shape, one end portion in the longitudinal direction is joined to the through-hole wiring 24, and the other end side portion is the sensor substrate 1. The first electrical connection metal layer 19 is joined and electrically connected. In short, the positions of the through-hole wiring 24 and the first electrical connection metal layer 19 corresponding to the through-hole wiring 24 in the circumferential direction of the first package substrate 2 are shifted, and the second electrical connection metal The layer 29 is arranged so that the longitudinal direction thereof coincides with the circumferential direction of the second sealing metal layer 28 and straddles the through-hole wiring 24 and the first electrical connection metal layer 19.

  In addition, the second sealing metal layer 28 and the second electrical connection metal layer 29 have an adhesion improving Ti film interposed between the bonding Au film and the insulating film 23. In other words, the second sealing metal layer 28 and the second electrical connection metal layer 29 are formed of a laminated film of a Ti film formed on the insulating film 23 and an Au film formed on the Ti film. It is configured. In short, since the second electrical connection metal layer 29 and the second sealing metal layer 28 are formed of the same metal material, the second electrical connection metal layer 29 and the second sealing metal layer 28 are formed. The metal layer 28 can be formed at the same time, and the second electrical connection metal layer 29 and the second sealing metal layer 28 can be formed to have substantially the same thickness. The second sealing metal layer 28 and the second electrical connection metal layer 29 have a Ti film thickness of 15 to 50 nm and an Au film thickness of 500 nm. Here, the material of each Au film is not limited to pure gold, and may be added with impurities. In the present embodiment, a Ti film is interposed as an adhesion improving adhesive layer between each Au film and the insulating film 23. However, the material of the adhesion layer is not limited to Ti, and, for example, Cr, Nb Zr, TiN, TaN, etc. may be used.

  A plurality of external connection electrodes 25 electrically connected to the respective through-hole wirings 24 are formed on the surface of the first package substrate 2 opposite to the sensor substrate 1 side. The outer peripheral shape of each external connection electrode 25 is rectangular.

  As shown in FIG. 8, the second package substrate 3 has a predetermined depth (for example, 5 μm to 10 μm) that forms a displacement space of the weight portion 12 on the surface of the second silicon substrate 30 facing the sensor substrate 1. (About) recesses 31 are formed. Here, the recess 31 is formed using a lithography technique and an etching technique. In the present embodiment, the concave portion 31 that forms the displacement space of the weight portion 12 is formed on the surface of the second package substrate 3 that faces the sensor substrate 1, but the core portion 12a of the weight portion 12 and The thickness of the portion formed using the support substrate 10a in each accompanying portion 12b is compared with the thickness of the portion formed using the support substrate 10a in the frame portion 11 of the sensor substrate 1. If the weight portion 12 is made thinner by the allowable displacement amount in the thickness direction, the other surface side of the sensor substrate 1 may be located on the other surface side without forming the concave portion 31 on the second package substrate 3. A gap is formed between the weight portion 12 and the second package substrate 3 so that the weight portion 12 can be displaced in the direction intersecting with the weight portion 12.

  By the way, the sensor substrate 1 and the first package substrate 2 are bonded to the first sealing metal layer 18 and the second sealing metal layer 28 as described above. The electrical connection metal layer 19 and the second electrical connection metal layer 29 are joined, and the sensor substrate 1 and the second package substrate 3 are joined to each other at their peripheral surfaces. Here, in manufacturing the acceleration sensor of the present embodiment, as shown in FIG. 9, a sensor wafer 10W in which a plurality of sensor substrates 1 are formed on an SOI wafer serving as a basis of the SOI substrate 10 described above, and the first silicon described above. A first package wafer 20W in which a plurality of first package substrates 2 are formed on a first silicon wafer that is the basis of the substrate 20, and a second silicon wafer that is the basis of the second silicon substrate 30 described above. After the wafer level package structure 100 is formed by bonding the second package wafer 30W on which the plurality of package substrates 3 are formed at the wafer level to room temperature, a dividing step (dicing step) for dividing into individual acceleration sensors (FIG. 9C shows the wafer level package shown in FIG. 9A). It is a schematic cross-sectional view of a portion surrounded by a circle A of structure 100). Therefore, the first package substrate 2 and the second package substrate 3 have the same outer size as the sensor substrate 1, so that a small chip size package can be realized and manufacture is facilitated. In the present embodiment, the bonding region E3 of the sensor substrate 1, the first package substrate 2 and the second package substrate 3 form an airtight package, and the weight portion 12 is included in the airtight package. And a movable part constituted by each bending part 13 can be displaced.

  Here, in the present embodiment, as a method of joining the sensor substrate 1 to the first package substrate 2 and the second package substrate 3, the sensor substrate 1 is made at a lower temperature in order to reduce the residual stress (thermal stress). The room-temperature bonding method is used.

  Hereinafter, processes characteristic of the method of manufacturing the acceleration sensor according to the present embodiment will be described with reference to FIG. 10, and FIGS. 10A to 10F correspond to the AA ′ cross section of FIG. The cross section of the part to show is shown.

  First, diffusion layer wiring for forming the piezoresistors Rx1 to Rx4, Ry1 to Ry4, Rz1 to Rz4, bridge circuits Bx, By, and Bz and the IC portion E2 on the main surface side of the SOI substrate 10 (surface side of the silicon layer 10c). Is formed using a CMOS process technology or the like, thereby obtaining the structure shown in FIG. Here, at the stage where the step of exposing each pad 42 of the IC portion E2 is completed, the multilayer structure portion 41 is formed on the entire surface of the surface insulating film 16, and the sensor portion E1 and the bonding portion of the multilayer structure portion 41 are joined. The metal wiring is not provided in the part formed in the site | part corresponding to the use area | region part E3.

  After the step of exposing each of the pads 42 is completed, the resist layer patterned so as to expose the portions formed in the portions corresponding to the sensor portion E1 and the bonding region portion E3 of the multilayer structure portion 41, respectively. Is formed on the main surface side of the SOI substrate 10 and is then formed in the bonding region E3 of the sensor substrate 1 with the first package substrate 2 in the multilayer structure 41 using the resist layer as an etching mask. The structure shown in FIG. 10B is obtained by performing a flattening step of flattening the surface of the bonding region E3 by etching back the existing portion, and then removing the resist layer. Etch back is performed by wet etching, and the second insulating film made of the silicon nitride film of the surface insulating film 16 is used as an etching stopper layer.

  Thereafter, a metal layer forming step for forming the above-described lead-out wiring 43, the first sealing metal layer 18 and the first electrical connection metal layer 19 on the main surface side of the SOI substrate 10 is performed, and then the SOI substrate 10 On the main surface side of the above-mentioned surface insulating film 16, covering the portions corresponding to the frame portion 11, the core portion 12 a of the weight portion 12, the bending portions 13, the IC portion E 2, and the joining region portion E 3, respectively. A resist layer patterned to be exposed is formed, and using the resist layer as an etching mask, the exposed portion of the surface insulating film 16 is etched to pattern the surface insulating film 16 and insulate the SOI substrate 10 from the main surface side. As shown in FIG. 10 (c), a surface side patterning step is performed to etch to a depth reaching the layer 10b, and then the resist layer is removed. Get an elephant. In the metal layer forming step, the lead-out wiring 43, the first sealing metal layer 18, and the first electrical connection metal layer 19 are formed using a thin film forming technique such as a sputtering method, a lithography technique, an etching technique, and the like. Forming. Further, in the surface side patterning step, the insulating layer 10b is used as an etching stopper layer, and by performing the surface side patterning step, the silicon layer 10c in the SOI substrate 10 has a portion corresponding to the frame portion 11 and a core. The site | part corresponding to the part 12a, the site | part corresponding to each bending part 13, the site | part corresponding to IC part E2, and the site | part corresponding to the area | region part E3 for joining remain. In the etching in this surface side patterning step, for example, dry etching may be performed using an inductively coupled plasma (ICP) type dry etching apparatus, and as an etching condition, the insulating layer 10b functions as an etching stopper layer. Set the following conditions.

  After removing the resist layer subsequent to the surface patterning step, the portion corresponding to the frame portion 11 and the portion corresponding to the core portion 12a in the silicon oxide film 10d laminated on the support substrate 10a on the back side of the SOI substrate 10 Forming a resist layer patterned so as to cover a portion corresponding to each of the accompanying portions 12b, a portion corresponding to the IC portion E2, and a portion corresponding to the bonding region portion E3 and to expose the other portion; The silicon oxide film 10d is patterned by etching the exposed portion of the silicon oxide film 10d using the resist layer as an etching mask, and after removing the resist layer, the SOI substrate 10 is used as the etching mask using the silicon oxide film 10d as an etching mask. To the depth reaching the insulating layer 10b from the back surface side pattern that is dry etched substantially perpendicularly By performing the packaging step, the structure shown in FIG. 10 (d). In this back side patterning step, the insulating layer 10b is used as an etching stopper layer, and by performing the back side patterning step, the support substrate 10a in the SOI substrate 10 has a portion corresponding to the frame portion 11 and a core portion. A portion corresponding to 12a, a portion corresponding to each of the accompanying portions 12b, a portion corresponding to the IC portion E2, and a portion corresponding to the joining region portion E3 remain. For example, the above-described ICP type dry etching apparatus may be used as the etching apparatus in the back surface side patterning step, and the etching conditions are set such that the insulating layer 10b functions as an etching stopper layer.

  After the back side patterning step, an unnecessary portion of the insulating layer 10b is left with a portion corresponding to the frame portion 11, a portion corresponding to the core portion 12a, a portion corresponding to the IC portion E2, and a portion corresponding to the bonding region portion E3. The structure shown in FIG. 10E is obtained by performing a separation step of forming the frame part 11, each bending part 13, and the weight part 12 by etching and removing by etching. In this separation step, the silicon oxide film 10d on the back surface side of the SOI substrate 10 is also removed by etching.

  After the above-described separation step, a first bonding step is performed in which the sensor substrate 1 and the second package substrate 3 are directly bonded by a room temperature bonding method, and then the sensor substrate 1 and the first package substrate 2 are The structure shown in FIG. 10F is obtained by performing a second joining step in which the sealing metal layers 18 and 28 and the electrical connection metal layers 19 and 29 are directly joined. In short, in the first bonding step, the sensor substrate 1 and the second package substrate 3 are bonded by Si-Si room temperature bonding, and in the second bonding step, the sensor substrate 1 and the first package substrate 2 are bonded. The metal layers 18 and 28 for sealing and the metal layers 19 and 29 for electrical connection are bonded to each other by metal-metal (Au—Au in this case) room temperature bonding. In the normal temperature bonding method, the bonding surfaces are contacted with each other after the bonding surfaces are cleaned and activated by irradiating the bonding surfaces with argon plasma, ion beam or atomic beam in vacuum before bonding. And bond directly at room temperature. Here, in the second bonding step, the first sealing metal layer 18 and the second sealing metal layer 28 are directly applied by applying an appropriate load at room temperature by the above-described room temperature bonding method. Simultaneously with the bonding, the first electrical connection metal layer 19 and the second electrical connection metal layer 29 are directly bonded.

  By the way, in the manufacturing method of the acceleration sensor of this embodiment, the acceleration sensor is obtained by performing all the processes until the above-described second bonding process is completed at the wafer level for each of the sensor substrate 1 and each of the package substrates 2 and 3. A plurality of wafer level package structures 100 (see FIG. 9) are formed, and a dividing process (dicing process) for dividing the wafer level package structures 100 into individual acceleration sensors is performed. Therefore, the size of each of the package substrates 2 and 3 can be matched to the size of the sensor substrate 1 and the mass productivity can be improved.

  The sensor substrate 1 of the present embodiment described above is formed using the SOI substrate 10 and has a movable portion, and the piezo resistors Rx1 to Rx4, Ry1 to Ry4, and Rz1 to Rz4 are formed on the movable portion. E1 and an IC part E2 cooperating with the sensor part E1, and the piezoresistors Rx1 to Rx4, Ry1 to Ry4, Rz1 to Rz4 and the IC part E2 are formed in the silicon layer 10b (that is, the piezoresistors Rx1 to Rx1). Since Rx4, Ry1 to Ry4, Rz1 to Rz4 and the IC part E2 are formed on the silicon layer 10c of the same SOI substrate 10, the acceleration sensor chip 101, the IC chip 102, and the bonding wire shown in FIGS. Compared with the conventional sensor device composed of 108, the height can be reduced and the productivity can be improved by simplifying the manufacturing process. The achieved.

  Here, the sensor substrate 1 has a bending portion that is a part where the thickness of the silicon layer 10c forms the piezoresistors Rx1 to Rx4, Ry1 to Ry4, Rz1 to Rz4 in the movable portion according to the desired sensitivity of the sensor portion E1. 13 is required (5 μm in the present embodiment), and the sensitivity of the sensor unit E1 can be increased compared to the case where the thickness of the silicon layer 10c is determined with priority given to the performance of the IC unit E2. The sensitivity of the sensor part E1 depends on the mass of the weight part 12, the width of the bending part 13, and the like. However, since the sensitivity depends particularly on the thickness of the bending part 13, the sensitivity of the sensor part E1 is increased. Above, the thickness of the flexure 13 is important.

  In addition, as described above, the sensor substrate 1 of the present embodiment has the sensor portion E1 attached to the frame portion 11 via the four bent portions 13 in which the weight portion 12 disposed inside the frame portion 11 is extended in all directions. This is a three-axis acceleration sensor unit that is swingably supported and can detect accelerations in three directions orthogonal to each other, and a piezoresistor Rx1 at an appropriate position in each part corresponding to each bending portion 13 in the silicon layer 10c of the SOI substrate 10. ~ Rx4, Ry1 to Ry4, Rz1 to Rz4 are formed, and the IC part E2 is formed so as to surround the sensor part E1, so that the layout design of the wiring between the sensor part E1 and the IC part E2 is facilitated and the IC It is possible to prevent deterioration of output characteristics of the sensor unit E1 due to external stress from the part E2 side.

  The technical idea of the present invention is not limited to an acceleration sensor, and can be applied to, for example, a pressure sensor having a piezoresistor in a movable part formed of a diaphragm part.

The sensor apparatus in embodiment is shown, (a) is a schematic plan view, (b) is a schematic sectional drawing. It is a principal part schematic sectional drawing of the sensor apparatus same as the above. It is a circuit diagram of the sensor part of the sensor apparatus same as the above. It is a schematic sectional drawing of the acceleration sensor same as the above. The acceleration sensor same as the above is shown, (a) is a principal part schematic sectional drawing, (b) is another principal part schematic sectional drawing. The 1st board | substrate for packages in the same as the above is shown, (a) is a schematic plan view, (b) is A-A 'schematic sectional drawing of (a). It is a bottom view of the 1st board | substrate for packages in the same as the above. The 2nd board | substrate for packages in the same as the above is shown, (a) is a schematic plan view, (b) is a schematic sectional drawing. The wafer level package structure in the same as above is shown, (a) is a schematic plan view, (b) is a schematic side view, (c) is a schematic cross-sectional view of the main part. It is principal process sectional drawing for demonstrating the manufacturing method of the acceleration sensor same as the above. It is a schematic sectional drawing of the sensor module provided with the sensor apparatus which shows a prior art example. It is a schematic exploded perspective view of a sensor module same as the above.

Explanation of symbols

1 Sensor device (sensor substrate)
DESCRIPTION OF SYMBOLS 10 SOI substrate 10a Support substrate 10b Insulating layer 10c Silicon layer 11 Frame part 12 Weight part 13 Deflection part E1 Sensor part E2 IC part Rx1-Rx4 Piezoresistor Ry1-Ry4 Piezoresistor Rz1-Rz4 Piezoresistor

Claims (2)

A sensor substrate formed using an SOI substrate having a silicon layer on an insulating layer on a support substrate made of a silicon substrate, and a surface of the silicon layer in the SOI substrate having through-hole wiring and having the same outer dimensions as the sensor substrate A chip size package comprising a through-hole wiring forming substrate sealed on the side and a cover substrate formed on the back side of the support substrate in the SOI substrate and having the same outer dimensions as the sensor substrate, Includes a sensor part having a movable part and a piezoresistor formed on the movable part, an IC part cooperating with the sensor part and electrically connected to the through-hole wiring, and a through-hole wiring forming substrate An IC portion is formed so as to surround the sensor portion, and a bonding region portion is formed so as to surround the IC portion. Are formed on the same silicon layer, a frame-shaped first sealing metal layer is formed on the surface side of the silicon layer in the bonding region portion, and an IC is formed inside the first sealing metal layer. The first electrical connection metal layer for electrically connecting the portion and the through-hole wiring is formed , and the first sealing metal layer and the first electrical connection metal layer are the same. The through hole wiring forming substrate is formed of a metal material with the same thickness, and the frame-shaped second sealing metal layer bonded to the first sealing metal layer is formed and the second sealing metal layer is formed. A second electrical connection metal layer electrically connected to the through-hole wiring is formed inside the stop metal layer, and the second sealing metal layer and the second electrical connection metal layer are formed. The sensor board and the through-hole wiring formation board are formed of the same metal material with the same thickness, and the first sealing with the bonding surface activated The metal layer for bonding and the second sealing metal layer whose bonding surface is activated are bonded at room temperature, and the first metal layer for electrical connection whose bonding surface is activated and the bonding surface activated second A chip size package, wherein a metal layer for electrical connection is bonded at room temperature .   The sensor portion is supported by the frame portion so as to be swingable through four flexure portions in which the weight portion disposed inside the frame portion extends in all directions, and can detect accelerations in three directions orthogonal to each other. The axial acceleration sensor unit, wherein the movable part is constituted by a weight part and each bending part, and the piezoresistor is formed in each part corresponding to each bending part in the silicon layer. The chip size package according to 1.

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