JP3979673B2 - 浮遊ゲートメモリデバイスにおけるプリプログラミングのためのファウラ・ノルトハイム（ｆ―ｎ）トンネリング - Google Patents

浮遊ゲートメモリデバイスにおけるプリプログラミングのためのファウラ・ノルトハイム（ｆ―ｎ）トンネリング Download PDF

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JP3979673B2
JP3979673B2 JP51261298A JP51261298A JP3979673B2 JP 3979673 B2 JP3979673 B2 JP 3979673B2 JP 51261298 A JP51261298 A JP 51261298A JP 51261298 A JP51261298 A JP 51261298A JP 3979673 B2 JP3979673 B2 JP 3979673B2
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block
potential
cells
preprogramming
channel
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Expired - Lifetime
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JP51261298A
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Japanese (ja)
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JP2001500658A (ja
JP2001500658A5 (enExample
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チュン シウン ヒュン
ツェン ヒューエイ シアウ
ヤオ ウー チェン
アイ ロン リー
フューチア ソーン
レイ リン ワン
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マクロニクス インターナショナル カンパニー リミテッド
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Publication of JP2001500658A5 publication Critical patent/JP2001500658A5/ja
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/107—Programming all cells in an array, sector or block to the same state prior to flash erasing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
JP51261298A 1996-09-05 1997-03-10 浮遊ゲートメモリデバイスにおけるプリプログラミングのためのファウラ・ノルトハイム（ｆ―ｎ）トンネリング Expired - Lifetime JP3979673B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
WO96/14349 1996-09-05
PCT/US1996/014349 WO1998010471A1 (en) 1996-09-05 1996-09-05 Triple well floating gate memory and operating method with isolated channel program, preprogram and erase processes
PCT/US1997/003861 WO1998010424A1 (en) 1996-09-05 1997-03-10 Fowler-nordheim (f-n) tunneling for pre-programming in a floating gate memory device

Publications (3)

Publication Number Publication Date
JP2001500658A JP2001500658A (ja) 2001-01-16
JP2001500658A5 JP2001500658A5 (enExample) 2004-12-09
JP3979673B2 true JP3979673B2 (ja) 2007-09-19

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP51261298A Expired - Lifetime JP3979673B2 (ja) 1996-09-05 1997-03-10 浮遊ゲートメモリデバイスにおけるプリプログラミングのためのファウラ・ノルトハイム（ｆ―ｎ）トンネリング

Country Status (4)

Country Link
US (1) US5963476A (enExample)
EP (2) EP0925586B1 (enExample)
JP (1) JP3979673B2 (enExample)
WO (2) WO1998010471A1 (enExample)

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US6188609B1 (en) * 1999-05-06 2001-02-13 Advanced Micro Devices, Inc. Ramped or stepped gate channel erase for flash memory application
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US6327183B1 (en) 2000-01-10 2001-12-04 Advanced Micro Devices, Inc. Nonlinear stepped programming voltage
US6222771B1 (en) * 2000-01-31 2001-04-24 Eon Silicon Devices, Inc. Unified program method and circuitry in flash EEPROM
US6269025B1 (en) 2000-02-09 2001-07-31 Advanced Micro Devices, Inc. Memory system having a program and erase voltage modifier
US6246610B1 (en) 2000-02-22 2001-06-12 Advanced Micro Devices, Inc. Symmetrical program and erase scheme to improve erase time degradation in NAND devices
US6295228B1 (en) 2000-02-28 2001-09-25 Advanced Micro Devices, Inc. System for programming memory cells
US6304487B1 (en) 2000-02-28 2001-10-16 Advanced Micro Devices, Inc. Register driven means to control programming voltages
US6246611B1 (en) * 2000-02-28 2001-06-12 Advanced Micro Devices, Inc. System for erasing a memory cell
US6556477B2 (en) 2001-05-21 2003-04-29 Ibm Corporation Integrated chip having SRAM, DRAM and flash memory and method for fabricating the same
US6670234B2 (en) 2001-06-22 2003-12-30 International Business Machines Corporation Method of integrating volatile and non-volatile memory cells on the same substrate and a semiconductor memory device thereof
US6784480B2 (en) * 2002-02-12 2004-08-31 Micron Technology, Inc. Asymmetric band-gap engineered nonvolatile memory device
US6906376B1 (en) * 2002-06-13 2005-06-14 A Plus Flash Technology, Inc. EEPROM cell structure and array architecture
US7221586B2 (en) 2002-07-08 2007-05-22 Micron Technology, Inc. Memory utilizing oxide nanolaminates
US6865407B2 (en) * 2002-07-11 2005-03-08 Optical Sensors, Inc. Calibration technique for non-invasive medical devices
US6888200B2 (en) * 2002-08-30 2005-05-03 Micron Technology Inc. One transistor SOI non-volatile random access memory cell
US6903969B2 (en) * 2002-08-30 2005-06-07 Micron Technology Inc. One-device non-volatile random access memory cell
US6917078B2 (en) * 2002-08-30 2005-07-12 Micron Technology Inc. One transistor SOI non-volatile random access memory cell
US6771541B1 (en) * 2003-02-25 2004-08-03 Nexflash Technologies, Inc. Method and apparatus for providing row redundancy in nonvolatile semiconductor memory
US8125003B2 (en) * 2003-07-02 2012-02-28 Micron Technology, Inc. High-performance one-transistor memory cell
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KR100558004B1 (ko) * 2003-10-22 2006-03-06 삼성전자주식회사 게이트 전극과 반도체 기판 사이에 전하저장층을 갖는비휘발성 메모리 소자의 프로그램 방법
CN100463138C (zh) * 2004-04-26 2009-02-18 旺宏电子股份有限公司 电荷陷入非易失性存储器的电荷平衡操作方法
US7075828B2 (en) * 2004-04-26 2006-07-11 Macronix International Co., Intl. Operation scheme with charge balancing erase for charge trapping non-volatile memory
US7133313B2 (en) * 2004-04-26 2006-11-07 Macronix International Co., Ltd. Operation scheme with charge balancing for charge trapping non-volatile memory
KR100591254B1 (ko) * 2004-04-29 2006-06-19 엘지.필립스 엘시디 주식회사 유기전계 발광소자와 그 제조방법
US7145186B2 (en) * 2004-08-24 2006-12-05 Micron Technology, Inc. Memory cell with trenched gated thyristor
US7224619B2 (en) * 2005-09-09 2007-05-29 Macronix International Co., Ltd. Method and apparatus for protection from over-erasing nonvolatile memory cells
US20080117691A1 (en) * 2006-11-17 2008-05-22 Sharp Kabushiki Kaisha Erasing circuit of nonvolatile semiconductor memory device
US7746706B2 (en) 2006-12-15 2010-06-29 Spansion Llc Methods and systems for memory devices
US8320191B2 (en) * 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US7940572B2 (en) * 2008-01-07 2011-05-10 Mosaid Technologies Incorporated NAND flash memory having multiple cell substrates
US8984238B2 (en) * 2009-02-05 2015-03-17 Spansion Llc Fractured erase system and method
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CN102498475A (zh) * 2009-07-10 2012-06-13 柰米闪芯积体电路有限公司 高速高密度以nand为基础的双晶体管-nor闪存的新构成
CN112582001B (zh) * 2019-09-30 2024-05-24 台湾积体电路制造股份有限公司 半导体器件及其形成方法
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Also Published As

Publication number Publication date
EP1306856A3 (en) 2003-07-02
WO1998010471A1 (en) 1998-03-12
EP0925586B1 (en) 2003-07-09
EP0925586A1 (en) 1999-06-30
EP1306856B1 (en) 2005-06-29
US5963476A (en) 1999-10-05
JP2001500658A (ja) 2001-01-16
EP0925586A4 (en) 2000-05-31
WO1998010424A1 (en) 1998-03-12
EP1306856A2 (en) 2003-05-02

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