FR3113976B1 - Mémoire type mémoire morte électriquement programmable et effaçable - Google Patents
Mémoire type mémoire morte électriquement programmable et effaçable Download PDFInfo
- Publication number
- FR3113976B1 FR3113976B1 FR2009060A FR2009060A FR3113976B1 FR 3113976 B1 FR3113976 B1 FR 3113976B1 FR 2009060 A FR2009060 A FR 2009060A FR 2009060 A FR2009060 A FR 2009060A FR 3113976 B1 FR3113976 B1 FR 3113976B1
- Authority
- FR
- France
- Prior art keywords
- memory
- electrically programmable
- erasable rom
- type memory
- source region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000002955 isolation Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 101100328883 Arabidopsis thaliana COL1 gene Proteins 0.000 abstract 1
- 101100328890 Arabidopsis thaliana COL3 gene Proteins 0.000 abstract 1
- 101100328886 Caenorhabditis elegans col-2 gene Proteins 0.000 abstract 1
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Volatile Memory (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
Mémoire de type mémoire morte électriquement programmable et effaçable, et procédé d’écriture. La mémoire est formée dans et sur un substrat semi-conducteur (SUB) et comprend une pluralité de cellules-mémoires (CELL1 à CELL8) organisées dans un plan-mémoire(PM) arrangé matriciellement en rangées (RW0, RW1) et en colonnes (COL0, COL1, COL2, COL3) de cellules-mémoires (CELL1 à CELL8), chaque cellule-mémoire (CELL) comprenant un transistor d’état (TE) comprenant une région de source (TEs), une région de drain (TEd), une fenêtre d’injection (INJT) située du côté du drain (TEd), une grille de commande (CG) et une grille flottante (FG), et un transistor d’isolation (TI) ayant une région de source (TIs), une région de drain (TId) et une grille (CGI), la région de drain (TId) du transistor d'isolation (TI) et la région de source (TEs) du transistor d'état (TE) étant communes. Figure pour l’abrégé : Fig. 2
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR2009060A FR3113976B1 (fr) | 2020-09-07 | 2020-09-07 | Mémoire type mémoire morte électriquement programmable et effaçable |
US17/459,172 US12125532B2 (en) | 2020-09-07 | 2021-08-27 | Memory architecture for serial EEPROMs |
CN202111038221.4A CN114155890A (zh) | 2020-09-07 | 2021-09-06 | 用于串行eeprom的新的存储器架构 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR2009060A FR3113976B1 (fr) | 2020-09-07 | 2020-09-07 | Mémoire type mémoire morte électriquement programmable et effaçable |
FR2009060 | 2020-09-07 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3113976A1 FR3113976A1 (fr) | 2022-03-11 |
FR3113976B1 true FR3113976B1 (fr) | 2023-07-28 |
Family
ID=74859960
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR2009060A Active FR3113976B1 (fr) | 2020-09-07 | 2020-09-07 | Mémoire type mémoire morte électriquement programmable et effaçable |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR3113976B1 (fr) |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998010471A1 (fr) * | 1996-09-05 | 1998-03-12 | Macronix International Co., Ltd. | Memoire a grille flottante a puits triple, son mode de fonctionnement, et ses procedes de programmation, preprogrammation et effacement de canaux isoles |
FR2816751A1 (fr) * | 2000-11-15 | 2002-05-17 | St Microelectronics Sa | Memoire flash effacable par page |
US6850438B2 (en) * | 2002-07-05 | 2005-02-01 | Aplus Flash Technology, Inc. | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations |
FR3029343B1 (fr) * | 2014-11-27 | 2018-03-30 | Stmicroelectronics (Rousset) Sas | Dispositif compact de memoire de type electriquement effacable et programmable |
US9361995B1 (en) * | 2015-01-21 | 2016-06-07 | Silicon Storage Technology, Inc. | Flash memory system using complementary voltage supplies |
FR3048115B1 (fr) * | 2016-02-18 | 2018-07-13 | Stmicroelectronics (Rousset) Sas | Dispositif et procede de gestion du claquage de transistors d'acces de memoire eeprom. |
FR3070537A1 (fr) * | 2017-08-28 | 2019-03-01 | Stmicroelectronics (Rousset) Sas | Memoire non-volatile a encombrement restreint |
FR3071355B1 (fr) | 2017-09-20 | 2019-08-30 | Stmicroelectronics (Rousset) Sas | Cellule-memoire eeprom compacte |
US10332599B2 (en) * | 2017-11-14 | 2019-06-25 | Longitude Flash Memory Solutions Ltd. | Bias scheme for word programming in non-volatile memory and inhibit disturb reduction |
-
2020
- 2020-09-07 FR FR2009060A patent/FR3113976B1/fr active Active
Also Published As
Publication number | Publication date |
---|---|
FR3113976A1 (fr) | 2022-03-11 |
US20220076749A1 (en) | 2022-03-10 |
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