JP3973251B2 - 集積回路のためのメモリセル、メモリセルを有するプログラマブル論理装置、メモリセルを有するシステム、メモリセル、およびダイナミックメモリセル - Google Patents

集積回路のためのメモリセル、メモリセルを有するプログラマブル論理装置、メモリセルを有するシステム、メモリセル、およびダイナミックメモリセル Download PDF

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Publication number
JP3973251B2
JP3973251B2 JP25598396A JP25598396A JP3973251B2 JP 3973251 B2 JP3973251 B2 JP 3973251B2 JP 25598396 A JP25598396 A JP 25598396A JP 25598396 A JP25598396 A JP 25598396A JP 3973251 B2 JP3973251 B2 JP 3973251B2
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Prior art keywords
memory cell
memory
output node
voltage level
voltage
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Expired - Fee Related
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JP25598396A
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Japanese (ja)
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JPH09147579A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
JPH09147579A (ja
Inventor
ラミンダ・ユー・マドゥラウェ
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Altera Corp
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Altera Corp
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Logic Circuits (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
JP25598396A 1995-09-29 1996-09-27 集積回路のためのメモリセル、メモリセルを有するプログラマブル論理装置、メモリセルを有するシステム、メモリセル、およびダイナミックメモリセル Expired - Fee Related JP3973251B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/536026 1995-09-29
US08/536,026 US5729495A (en) 1995-09-29 1995-09-29 Dynamic nonvolatile memory cell

Publications (3)

Publication Number Publication Date
JPH09147579A JPH09147579A (ja) 1997-06-06
JPH09147579A5 JPH09147579A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 2004-10-07
JP3973251B2 true JP3973251B2 (ja) 2007-09-12

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JP25598396A Expired - Fee Related JP3973251B2 (ja) 1995-09-29 1996-09-27 集積回路のためのメモリセル、メモリセルを有するプログラマブル論理装置、メモリセルを有するシステム、メモリセル、およびダイナミックメモリセル

Country Status (2)

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US (4) US5729495A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JP3973251B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

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Also Published As

Publication number Publication date
US5805516A (en) 1998-09-08
US5729495A (en) 1998-03-17
JPH09147579A (ja) 1997-06-06
US5898630A (en) 1999-04-27
US5740110A (en) 1998-04-14

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