JP3960125B2 - Commutation method of direct power converter - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a commutation method for a direct power converter that directly converts AC to AC without a large-capacity energy buffer such as a reactor or a capacitor, and in particular, to prevent a power supply short circuit and a load end opening that occur during switching. The present invention relates to a commutation method for performing a commutation operation in accordance with an on / off pattern (commutation pattern) of a semiconductor switching element.
[0002]
[Prior art]
FIG. 6 is a block diagram for explaining a conventional technique for determining a commutation pattern based on the polarity of a power supply voltage in this type of power converter.
In FIG. 6, 10 is a power source, 20 is a direct power converter that directly converts AC to AC, and 30 is a load. The PWM generation unit 50 generates a PWM command pulse by comparing the output voltage command with an internally generated carrier. In order to turn on and off the semiconductor switching element of the power converter 20 based on the generated PWM command pulse, the PWM generation unit 50 generates a PWM command pulse. The commutation pattern created by the flow pattern generating means 60A is used.
[0003]
Here, the commutation pattern generation means 60A determines the on / off order of the semiconductor switching elements as the commutation pattern based on the polarity of the power supply voltage detected by the voltage polarity detection means 40, and generates a switching signal for the power converter 20. Output. This commutation pattern plays a role like dead time generation for preventing a power supply short circuit in an inverter, for example. However, when the load 30 is an inductive load, the direct power converter 20 does not have a free-wheeling diode unlike the inverter, and therefore, if the load end is opened, a large surge voltage is generated, which may damage the device. .
Accordingly, in the direct power converter 20, in addition to preventing the power supply short circuit, it is necessary to prevent the load end from being opened, and the commutation pattern is determined to be a pattern that prevents the power supply short circuit and the load end from being opened. The
[0004]
An example of the direct power converter 20 that directly converts alternating current to alternating current is a three-phase input / three-phase output matrix converter (PWM cycloconverter).
Figure 10 shows a main circuit configuration of the matrix _{converter, e u, e v, e} w respectively U-phase, V-phase, W-phase power source, L is the filter reactor for harmonic rejection, C is also the filter _{capacitor, S au, S av, S} aw, S bu, S bv, S bw, S cu, S cv, S cw is flowing and blocking current bidirectionally bidirectional switch, M is an AC motor or the like Is the load. This matrix converter is known, for example, from Japanese Patent Laid-Open No. 11-18489 “Synchronous motor drive control device”.
[0005]
In the matrix converter described above, a method for generating a commutation pattern based on the polarity of the power supply voltage is described in, for example, 1989 “SIT firing sequence of PWM cycloconverter” (hereinafter referred to as “Syclic sequence of PWM cycloconverter”). Known literature). Hereinafter, an outline of the commutation method described in this known document will be described with reference to FIG.
[0006]
FIG. 7 shows a part of the matrix converter of FIG. 10, and S _u and S _u ′ are semiconductor switching elements constituting the bidirectional switch S _au in FIG. Elements S _v and S _v ′ are semiconductor switching elements constituting the bidirectional switch S _av in FIG. 10 and are switching elements in which diodes are connected in antiparallel. As the semiconductor switching elements S _u , S _u ′, S _v , S _v ′, IGBTs (insulated gate bipolar transistors) can be used.
[0007]
The known document describes a method of switching the commutation pattern according to the polarity of the power supply voltage. For example, taking the case of commutation from the U phase to the V phase of the power supply as an example, the switching pattern is as follows.
[0008]
(1) when _e u> _{e v} in FIG. _{7 (a) ▲ 1 ▼ S} v ON → ▲ 2 ▼ _{S u} off → ▲ 3 ▼ _{S v} 'ON → ▲ 4 ▼ _{S u'} off here in, ▲ 1 does not conduct since the reverse bias is applied to the S _v in ▼. ▲ 2 by ▼, when current is flowing in S _u, current is commutated to S _v. When current is flowing through S _u ′ by (3), the current is commutated to S _v ′, and S _u ′ is reverse-biased.
[0009]
(2) when _e u _{<e v} in FIG. _{7 (b) ▲ 1 ▼ S} v ' ON → ▲ 2 ▼ _{S u'} off → ▲ 3 ▼ _{S v} ON → ▲ 4 ▼ _{S u} off here In (1), since a reverse bias is applied to S _v ′, it does not conduct. As a result of (2), when a current flows through S _u ′, the current commutates to S _v ′. ▲ 3 by ▼, when current is flowing in S _u, current commutates to S _v, S _u is reverse biased.
[0010]
For convenience, the commutation pattern shown in FIGS. 7A and 7B is referred to as commutation pattern A, and the current is commutated from the U phase to the V phase.
[0011]
Next, FIG. 8 shows a conventional technique for determining the commutation pattern based on the polarity of the load current, and the same components as those in FIG. 6 are denoted by the same reference numerals.
In this prior art, the current of the load 30 is detected by the current detector 80, and the commutation pattern generation means 60B creates a commutation pattern based on the current polarity obtained by the current polarity detection means 70.
[0012]
The known document also describes a method of switching the commutation pattern according to the polarity of the load current. For example, taking the case of commutation from the U phase to the V phase of the power supply as an example, the switching pattern is as follows.
[0013]
(1) Figure 9 when i of (a)> _{0 (a i u> i v) ▲ 1} ▼ S u ' OFF → ▲ 2 ▼ _{S v} ON → ▲ 3 ▼ _{S u} off → ▲ 4 ▼ _{S v} 'oN here, when the ▲ 2 ▼ of _e u _{<e v} is the current _{S v'} commutates to. ▲ 3 when a current flowing in the S _u at ▼, the current is commutated to S _v.
[0014]
(2) FIG. 9 (b) of the i _{<0 (i} u <a _{i v)} when ▲ 1 ▼ _{S u} off → ▲ 2 ▼ 'on the _{→ ▲ 3 ▼ S u' S} v off → ▲ 4 ▼ the _{S v} on here, when the ▲ 2 ▼ of _e u> _{e v} is the current commutates to _{S v.} If a current flows through S _u ′ in (3), the current commutates to S _v ′.
[0015]
For convenience, the commutation pattern shown in FIGS. 9A and 9B is referred to as a commutation pattern B, and the current is commutated from the U phase to the V phase.
[0016]
[Problems to be solved by the invention]
The above-described commutation method based on the power supply voltage polarity in FIGS. 6 and 7 may cause commutation failure due to a delay in polarity switching or a voltage detection error when the power supply voltage is small and close to zero.
In addition, the commutation method based on the load current polarity in FIGS. 8 and 9 may cause commutation failure due to a delay in polarity switching and a current detection error when the load current is small and close to zero. is there.
[0017]
The commutation failure may cause an excessive current surge or voltage surge and damage the device. In addition, providing a large-sized and large-capacity AC snubber to prevent damage to the apparatus hinders downsizing, high efficiency, and cost reduction of the apparatus.
Therefore, the present invention prevents commutation failure even when the power supply voltage and load current are small, and reduces the surge as much as possible to prevent damage to the apparatus without using an AC snubber or the like. It is intended to provide a flow method.
[0018]
[Means for Solving the Problems]
In order to solve the above problems, the invention described in claim 1 is directed to a direct power converter that performs AC / AC direct power conversion using a semiconductor switching element.
Means for detecting the polarity of the power supply voltage; first commutation pattern generating means for creating an on / off pattern of the semiconductor switching element as a first commutation pattern according to the polarity of the power supply voltage detected by the means; and a load current A second commutation pattern generating means for creating an on / off pattern of the semiconductor switching element as a second commutation pattern according to the polarity of the load current detected by the means, a power supply voltage or a load Means for switching and outputting the first commutation pattern or the second commutation pattern according to the absolute value of the current,
The semiconductor switching element is commutated using a commutation pattern that prevents a power supply short circuit and a load end opening that are switched by this means.
[0019]
According to a second aspect of the present invention, in the first aspect of the invention, when the absolute value of the power supply voltage is smaller than a predetermined level, the semiconductor switching element is commutated using the second commutation pattern. It is something to make.
[0020]
According to a third aspect of the present invention, in the first aspect of the present invention, when the absolute value of the load current is smaller than a predetermined level, the semiconductor switching element is commutated using the first commutation pattern. It is something to make.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a first embodiment of the present invention, which corresponds to the first and second embodiments of the present invention. The same components as those in FIGS. 6 and 8 are denoted by the same reference numerals and detailed description thereof is omitted, and only the central part of the present invention will be described below.
[0022]
In FIG. 1, the PWM pulse command generated by the PWM generation means 50 to which the output voltage command is input is input to both the first commutation pattern generation means 60A and the second commutation generation pattern generation means 60B. ing. The first commutation pattern generation means 60A generates the commutation pattern A as the first commutation pattern based on the polarity of the power supply voltage detected by the voltage polarity detection means 40 in the same manner as described above. The current generation pattern generation means 60B generates a commutation pattern B as a second commutation pattern based on the polarity of the load current detected by the current polarity detection means 70.
Here, the commutation pattern A is the pattern shown in FIG. 7, and B is the pattern shown in FIG.
[0023]
These commutation patterns A and B are input to the commutation pattern switching unit 90V. The switching unit 90V switches the commutation patterns A and B based on the detected absolute value of the power supply voltage. The switching signal is output to the semiconductor switching element of the power converter 20 according to the above.
[0024]
FIG. 2 shows the internal configuration of the commutation pattern switching unit 90V. The switch 90V includes an absolute value calculator 91 for obtaining an absolute value of the power supply voltage, and a comparator 92 that compares the absolute value with a voltage switching level (a voltage level near zero at which the commutation patterns A and B are to be switched). And a changeover switch 93 for switching the commutation patterns A and B according to the output.
[0025]
In the above configuration, the commutation operation by the commutation pattern A based on the polarity of the power supply voltage may fail when the power supply voltage is small and near zero, so the absolute value of the power supply voltage becomes near zero. When it falls below the voltage switching level, the changeover switch 93 is operated by the output of the comparator 92 to perform commutation according to the commutation pattern B based on the polarity of the load current. Further, when the absolute value of the power supply voltage exceeds the voltage switching level, the changeover switch 93 may be switched to perform commutation according to the commutation pattern A based on the polarity of the power supply voltage.
[0026]
Even if both the power supply voltage and the load current are small, the energy applied to the semiconductor switching element of the power converter 20 is small, so even if commutation fails, it does not cause a large surge, Even if a large AC snubber is not provided, destruction of the apparatus can be prevented. Since the commutation pattern is merely an on / off switching operation of the semiconductor switching element, even if the commutation patterns are commutated according to different commutation patterns A and B, the continuity of the PWM pulse is not impaired.
[0027]
Next, FIG. 3 is a block diagram showing a second embodiment of the present invention, which corresponds to an embodiment of the first and third aspects of the present invention. Parts similar to those in FIG. 1 are omitted, and only different parts are described.
That is, FIG. 3 differs from FIG. 1 in that the detected value of the load current is input to the commutation pattern switcher 90I, and when the load current is small and close to zero, the switch 90I operates to operate the power supply. The commutation pattern A based on the polarity of the voltage is used.
[0028]
FIG. 4 shows the internal configuration of the commutation pattern switcher 90I. The absolute value calculator 94 obtains the absolute value of the load current and the absolute value and the current switching level (near zero where the commutation patterns A and B should be switched). Current level) and a changeover switch 96 that switches the commutation patterns A and B according to the output of the comparator 95.
[0029]
As described above, the commutation operation by the commutation pattern B based on the polarity of the load current may fail when the load current is small and near zero. For this reason, when the absolute value of the load current becomes near zero and falls below the current switching level, the changeover switch 96 is operated by the output of the comparator 95 to perform commutation according to the commutation pattern A depending on the polarity of the power supply voltage. When the absolute value of the load current exceeds the current switching level, the changeover switch 96 may be switched to perform commutation according to the commutation pattern B based on the polarity of the load current.
[0030]
The bidirectional switch in the direct power converter 20 (corresponding to S _au ,..., S _cw in FIG. 10) has the configuration shown in FIGS. 7 and 9 (an IGBT in which diodes are connected in reverse parallel). In addition to a series connection with a common emitter), a series circuit of a switching element 201 such as an IGBT and a diode 202, and a switching element 203 and a diode 204, such as a bidirectional switch S shown in FIG. A series circuit may be connected in reverse parallel. If the switching elements 201 and 203 have sufficient reverse breakdown voltage, the diode is omitted and only the switching elements 201 and 203 are connected in reverse parallel as shown in FIG. What you did is fine.
[0031]
【The invention's effect】
As described above, according to the present invention, commutation failure can be prevented even when the power supply voltage is small or the load current is small, and even when both are small at the same time, the surge due to commutation failure is minimized. can do.
For this reason, it is possible to prevent destruction of the power converter without using a large and large-capacity AC snubber or the like, and it is possible to realize downsizing, high efficiency, and low cost of the apparatus.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a first embodiment of the present invention.
2 is a configuration diagram of a commutation pattern switching circuit in FIG. 1. FIG.
FIG. 3 is a block diagram showing a second embodiment of the present invention.
4 is a configuration diagram of a commutation pattern switching circuit in FIG. 3;
FIG. 5 is an explanatory diagram of a bidirectional switch used in a direct power converter to which the present invention is applied.
FIG. 6 is a block diagram showing a conventional technique.
FIG. 7 is a circuit diagram of a main part of a power converter for explaining a conventional commutation pattern A.
FIG. 8 is a block diagram showing another conventional technique.
FIG. 9 is a circuit diagram of a main part of a power converter for explaining a conventional commutation pattern B;
FIG. 10 is a main circuit configuration diagram of a three-phase input / three-phase output matrix converter;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 Power supply 20 Direct form power converter 30 Load 40 Voltage polarity detection means 50 PWM generation means 60A, 60B Commutation pattern generation means 70 Current polarity detection means 80 Current detector 90V, 90I Commutation pattern switchers 91, 94 Absolute value calculation 92, 95 Comparator 93, 96 Changeover switch 201, 203 Semiconductor switching element 202, 204 Diode S Bidirectional switch

Claims (3)

In a direct power converter that performs AC / AC direct power conversion using a semiconductor switching element,
Means for detecting the polarity of the power supply voltage;
First commutation pattern generating means for creating an on / off pattern of the semiconductor switching element as a first commutation pattern according to the polarity of the power supply voltage detected by the means;
Means for detecting the polarity of the load current;
Second commutation pattern generating means for creating an on / off pattern of the semiconductor switching element as a second commutation pattern according to the polarity of the load current detected by the means;
Means for switching and outputting the first commutation pattern or the second commutation pattern according to the absolute value of the power supply voltage or the load current;
With
A commutation method for a direct power converter, wherein commutation of the semiconductor switching element is performed using a commutation pattern that prevents a power supply short circuit and a load end opening that are switched by this means. In the commutation method of the direct power converter according to claim 1,
When the absolute value of the power supply voltage is smaller than a predetermined level, the commutation of the semiconductor switching element is performed using the second commutation pattern. In the commutation method of the direct power converter according to claim 1,
A commutation method for a direct power converter, wherein when the absolute value of a load current is smaller than a predetermined level, commutation of the semiconductor switching element is performed using a first commutation pattern.

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