JP3955565B2 - Solid-state imaging device and camera using the same - Google Patents

Description

  The present invention relates to a MOS type solid-state imaging device used for a digital camera or the like, and further includes a plurality of pixels arranged two-dimensionally in a vertical direction and a horizontal direction, and a vertical direction or a horizontal direction among the plurality of pixels. The present invention relates to a solid-state imaging device in which pixels adjacent to each other have color filters of different colors.

(First conventional example)
In recent years, for example, a solid-state imaging device as shown in FIG. 10 has been known (see Patent Document 1).

  Hereinafter, a solid-state imaging device according to a first conventional example shown in Patent Document 1 will be described with reference to FIG.

  In FIG. 10, 201 indicates a set of a plurality of pixels arranged in a matrix, 202 indicates a pixel unit composed of four pixels arranged in 2 rows and 2 columns, and 203 constitutes a first pixel mixed area. 1 represents a first pixel mixing unit composed of a plurality of pixels, 204 represents a second pixel mixing unit composed of a plurality of pixels constituting the second pixel mixing area, and 205 represents a third pixel mixing area The 3rd pixel mixing unit which consists of a several pixel to do is shown. In FIG. 10, reference numeral 206 denotes a vertical shift register, and 207 denotes a path of a signal output from the vertical shift register 206.

  In the following, in order to simplify the description, operations of two types of pixels indicated by hatched squares and circles out of four pixels constituting the pixel unit 202 will be described.

  In the first pixel mixing unit 203, the pixels to which charge signals are mixed are nine pixels indicated by hatched squares. When the vertical shift register 206 sequentially scans from the first row to the fifth row, the charge signals of nine pixels indicated by the hatched □ to be the pixel mixture target are obtained, and then the pixel mixture is performed. It is.

  At this time, the vertical shift register 206 scans up to the fifth row, and in the scan up to the fourth row, signals of three pixels indicated by ◯ shown by hatched lines constituting the second pixel mixing unit 204. Since these are also output, it is necessary to hold these signals.

  Next, when the vertical shift register 206 scans from the 6th line to the 8th line, the signals of the 6 pixels indicated by ◯ indicated by the hatched lines in FIG. Pixel mixing is performed between the signals of the three pixels in the fourth row in which signals are already held. Then, the signals of the three pixels indicated by □ which are located in the seventh row and which are shaded and constituting the third pixel mixing unit 205 are held.

(Second conventional example)
Hereinafter, a solid-state imaging device which is a second conventional example and uses a drive circuit described in Patent Document 2 will be described with reference to FIG.

  As shown in FIG. 11, the solid-state imaging device includes an imaging unit 301 having a plurality of pixel units 3011, 3012, 3013,... Arranged in a matrix, and a drive circuit that supplies a column selection signal to the column selection signal line 302. And a drive circuit 307 that supplies a row selection signal to the row selection signal line 308.

  FIG. 12 shows a block configuration of the drive circuit 303. As shown in FIG. 12, when the scanning pulse 309 is input to the driving register 3031 and the clock pulse 305 is further applied, the output signal 310 of the driving register 3031 is input to the selection circuit 3041. The selection circuit 3041 outputs the output of the drive register 3031 to the drive register 3032 or the drive register 3033 in accordance with the control signal 306. That is, when a control signal 306 indicating sequential scanning is input, each drive register sequentially outputs a column selection signal such as drive registers 3031, 3032, 3033, 3034,. Thereby, for example, the pixels are sequentially scanned as in the pixel portions 3011, 3012, 3013, 3014,.

When a control signal 306 indicating interlaced scanning is input, every other driving register such as driving registers 3031, 3033, 3035,... Outputs a column selection signal to the column selection signal line 302. Thus, for example, interlaced scanning is performed every other column of pixels as in the pixel portions 3011, 3013, 3015,.
JP 2001-292453 A JP 2002-314882 A (FIG. 1)

(First conventional example)
By the way, the solid-state imaging device according to the first conventional example holds the signal for one row of the pixel mixing unit (basic unit of the pixel mixing area) located at the next stage in the vertical scanning without immediately outputting the signal. Action is required.

  As described above, in the conventional solid-state imaging device, in the process of scanning the solid-state imaging device in the vertical direction, it is necessary to perform an operation for holding the signals of pixels for one row constituting the pixel mixing unit in the next stage. There is a first problem that operation and circuit configuration become complicated.

(Second conventional example)
In recent years, there has been an increasing demand for solid-state imaging devices to support not only still images but also moving images. For example, in a digital camera, a solid-state imaging device mounted on the digital camera outputs a moving image for displaying a monitor image on a liquid crystal panel.

  However, although the solid-state imaging device according to the second conventional example can cope with moving images by interlaced scanning, pixels are thinned out by interlaced scanning and pixel information is lost. Therefore, there is a second problem that the image quality is impaired.

  In view of the first problem, a first object of the present invention is to provide a solid-state imaging device capable of eliminating the operation of holding the pixels constituting the pixel mixing unit at the next stage.

  In view of the second problem, a second object of the present invention is to prevent generation of false colors due to missing pixel information even when a moving image is captured.

  In order to achieve the first object, a first solid-state imaging device according to the present invention includes a plurality of pixels arranged two-dimensionally in a vertical direction and a horizontal direction, and the vertical direction of the plurality of pixels. Alternatively, pixels adjacent in the horizontal direction are targeted for solid-state imaging devices having color filters of different colors, and charge signals received from pixels having the same color filter among a plurality of pixels are sequentially applied during a predetermined period. Signal output means for outputting is provided.

  According to the first solid-state imaging device, the signal output means has a color filter of one color in order to sequentially output charge signals received from pixels having the same color filter among a plurality of pixels in a predetermined period. When a charge signal received from a pixel is output, it is not necessary to output a charge signal received from a pixel having a color filter of another color. For this reason, an operation for holding a signal output from a pixel having a color filter of another color becomes unnecessary, and an operation for holding a pixel constituting the pixel mixing unit at the next stage becomes unnecessary.

  In the first solid-state imaging device, the signal output means includes means for sequentially outputting charge signals received from the pixels arranged in the horizontal direction and having the same color filter among the plurality of pixels in a predetermined period. Preferably it is.

  In this way, when outputting a charge signal received from a pixel having a color filter of one color in a group of pixels arranged in the horizontal direction, the color filter of another color in the group of pixels arranged in the horizontal direction. Since it is not necessary to output the charge signal received from the pixel having the color, the operation of holding the signal output from the pixel having the color filter of another color becomes unnecessary.

  In the first solid-state imaging device, the signal output means includes means for sequentially outputting charge signals received from the pixels arranged in the vertical direction and having the same color filter among the plurality of pixels in a predetermined period. Preferably it is.

  In this way, when a charge signal received from a pixel having a color filter of one color in the pixel group arranged in the vertical direction is output, the color filter of another color in the pixel group arranged in the vertical direction. Since it is not necessary to output the charge signal received from the pixel having the color, the operation of holding the signal output from the pixel having the color filter of another color becomes unnecessary.

  In the first solid-state imaging device, the signal output means includes a first shift register that sequentially scans pixels arranged in a vertical direction or a horizontal direction among the plurality of pixels, and a vertical direction or a horizontal direction among the plurality of pixels. And a second shift register that sequentially scans pixels having color filters of the same color.

  In this case, by selecting one of the first shift register and the second shift register, a normal operation of sequentially scanning pixels arranged in the vertical direction or the horizontal direction, and a color filter of the same color And a mixing operation for sequentially scanning the pixels having.

  In the first solid-state imaging device, the signal output means includes a shift register that sequentially scans all the pixels arranged in the vertical direction or the horizontal direction among the plurality of pixels, and a charge signal received from the shift register in the vertical direction. Alternatively, there is provided an output means for switching and outputting the first output method for sequentially outputting each pixel arranged in the horizontal direction and the second output method for sequentially outputting each pixel having the same color filter. Is preferred.

  In this way, by switching between the first output method and the second output method, the normal operation of sequentially outputting the signals of all the pixels arranged in the vertical direction or the horizontal direction by one shift register, and the vertical operation It is possible to select a mixing operation for sequentially outputting signals of pixels having the same color filter among the pixels arranged in the horizontal direction or the horizontal direction.

  In order to achieve the second object, a second solid-state imaging device according to the present invention includes a plurality of pixels arranged two-dimensionally in a row direction and a column direction, and an array of the plurality of pixels. A sensor unit that outputs a plurality of selection signals corresponding to the pixel columns arranged in the row direction or the column direction, a first drive circuit that outputs the selection signals from the sensor unit to the pixel columns one by one, and the sensor unit To a second driving circuit that outputs a plurality of selection signals for each pixel column.

  According to the second solid-state imaging device, the selection signal from the first drive circuit is output to each pixel column during normal operation in the still image mode, and the second drive circuit during high-speed operation in the moving image mode. The selection signals by are collectively output in a plurality of columns to a pixel column. In this way, in order to collectively output a plurality of selection signals to a pixel column during high-speed operation, pixel signals output from a plurality of pixel columns that have received a plurality of selection signals are averaged, and an averaged pixel signal If a reduced image with a new pixel unit is generated, an image with no missing pixels can be obtained, so that the generation of false colors in the moving image mode can be prevented, and the quality of the moving image is improved.

  The second solid-state imaging device sequentially outputs a first drive signal sequentially output from the first drive circuit corresponding to each column of the pixel columns, and sequentially from the second drive circuit corresponding to a plurality of columns of the pixel columns. It is preferable to further include a selection circuit that selects any one of the output second drive signals and outputs the selected drive signal to the sensor unit.

  In this way, by providing the selection circuit, it is possible to easily and reliably switch between the still image mode and the moving image mode.

  In the second solid-state imaging device, the selection circuit outputs, to the sensor unit, a first transistor group that outputs a first drive signal for each column of the pixel column, and a plurality of columns of the second drive signal that are in the pixel column. It is preferable to have a second transistor group that outputs each time.

  In this case, the first transistor group and the second transistor group are preferably composed of CMOS transistors.

  In this case, the first transistor group and the second transistor group are preferably composed of NMOS transistors.

  The solid-state imaging device driving method according to the present invention corresponds to a plurality of pixels arranged two-dimensionally in the row direction and the column direction, and a pixel column arranged in the row direction or the column direction in the arrangement of the plurality of pixels. And a sensor unit that outputs a plurality of selection signals, and the still image mode is selected for a driving method of a solid-state imaging device having a still image mode for capturing a still image and a moving image mode for capturing a moving image. In this case, the first step of outputting the selection signal from the sensor unit to the pixel column one by one and the selection signal from the sensor unit to the pixel column are collectively output when the moving image mode is selected. And a second step.

  According to the solid-state imaging device driving method of the present invention, when a moving image mode is selected, a plurality of selection signals received from a plurality of selection signals are output from the sensor unit to the pixel columns. By averaging the pixel signals output from the pixel array and generating a reduced image using the averaged pixel signal as a new pixel unit, an image without missing pixels can be obtained. Color generation can be prevented, and the quality of moving images can be improved.

  The camera according to the present invention includes the first or second solid-state imaging device of the present invention.

  According to the camera of the present invention, it is possible to prevent the occurrence of false colors in a moving image and improve the image quality of the moving image.

  According to the first solid-state imaging device of the present invention, when a charge signal received from a pixel having a color filter of one color is output, a charge signal received from a pixel having a color filter of another color Since there is no need to output signals from pixels having color filters of other colors, there is no need to hold signals output from pixels having color filters of other colors. .

  According to the second solid-state imaging device of the present invention, it is possible to prevent the occurrence of false colors due to missing pixel information in the moving image capturing mode, and to improve the quality of moving images.

(First embodiment)
A solid-state imaging device according to a first embodiment of the present invention will be described with reference to FIGS.

[Arrangement and Scanning Method of Solid-State Imaging Device According to First Embodiment]
FIG. 1 shows an arrangement and a scanning method of a solid-state imaging device according to an embodiment. In the solid-state imaging device, a plurality of pixels each having a photoelectric conversion element and a color filter provided in front of the photoelectric conversion element. Are two-dimensionally arranged in the row direction (vertical direction) and the column direction (horizontal direction), and the color of the color filter is repeatedly arranged two-dimensionally with two rows and two columns as a unit.

  In FIG. 1, ◯ represents a pixel having a color filter of one color, and □ represents a pixel having a color filter of another color different from the one color. In the pixel represented by □, there are a pixel having a color filter of the same color and a pixel having a color filter of a different color. As is clear from FIG. 1, pixels having a color filter of one color (pixels represented by ◯) are not adjacent in either the row direction or the column direction. That is, pixels adjacent to each other in the vertical direction or the horizontal direction among the plurality of pixels have different color filters.

  In FIG. 1, 1 represents a set of a plurality of pixels arranged two-dimensionally in the row direction and the column direction, 2 represents a pixel unit composed of four pixels arranged in two rows and two columns, Reference numeral 3 denotes a pixel mixing unit composed of 25 pixels arranged in 5 rows and 5 columns. In the present embodiment, one pixel out of a plurality of pixels constituting one pixel mixing unit 3 in a predetermined period. Charge signals received from the pixels having color filters are sequentially output. Reference numeral 5 denotes a horizontal shift register that scans pixels arranged in the column direction (horizontal direction), and reference numeral 6 denotes a vertical shift register that scans pixels arranged in the row direction (vertical direction). In this embodiment, as shown in FIG. 1, the outputs 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, and 11 of the horizontal shift register 5 are respectively connected to the pixel column 2, 1, 3, 5, 4, 6, 8, 7, 9, 11, 10 and outputs 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 and 11 are connected to pixel rows 2, 1, 3, 5, 4, 6, 8, 7, 9, 11, and 10, respectively.

  When the horizontal shift register 5 sequentially scans, horizontal signal output is performed in the order of the pixel columns 2, 1, 3, 5, 4, 6, 8, 7, 9, 11, and 10 below the horizontal shift register 5. As shown in the figure, the pixels of column numbers 1, 3, 5 (pixels represented by ◯) and the pixels of column numbers 7, 9, 11 (pixels represented by ◯) Is output. That is, the signals of the pixels of column numbers 1, 3, and 5 constituting the pixel mixing unit 3 are continuously output and mixed for a predetermined period.

  When the vertical shift register 6 sequentially scans, vertical signal output is performed in the order of the pixel rows 2, 1, 3, 5, 4, 6, 8, 7, 9, 11, 10. As shown in the left side of FIG. 4, the pixels of row numbers 1, 3, 5 (pixels represented by ◯) and the pixels of row numbers 7, 9, 11 (pixels represented by ◯) are respectively Output continuously. That is, the signals of the pixels of row numbers 1, 3, and 5 constituting the pixel mixing unit 3 are continuously output and mixed for a predetermined period.

[First Signal Transmission Method in Solid-State Imaging Device According to First Embodiment]
FIG. 2 shows a first example of the first signal transmission method in the solid-state imaging device according to the first embodiment of the present invention.

  In FIG. 2, reference numeral 10 denotes a row of pixel groups arranged in the column direction in the sensor unit, and 11 denotes a first vertical shift that sequentially scans all pixels constituting the row of pixel groups 10 in the vertical direction. Reference numeral 12 denotes a second vertical shift register that sequentially scans the pixels that are included in one pixel mixing unit among the pixels that form the pixel group 10 in one column and that have the same color filter. . In FIG. 2, 11a indicates the first scanning start terminal of the first vertical shift register 11, 12a indicates the second scanning start terminal of the second vertical shift register 12, and the first scanning. By applying a scan start signal to one of the start terminal 11a and the second scan start terminal 12a, the first vertical shift register 11 or the second vertical shift register 12 is selected.

  The operation in the first example of the first signal transmission system shown in FIG. 2 will be described below.

  In the case of performing normal scanning, when a scanning start signal is applied to the first scanning start signal terminal 11a, the first vertical shift register 11 starts scanning. In this case, since the first vertical shift register 11 sequentially scans all the pixels constituting the pixel group 10 in one column, the solid-state imaging device performs a normal operation.

  On the other hand, in the case of pixel mixing, when a scanning start signal is applied to the second scanning start signal terminal 12a, the second vertical shift register 12 starts scanning. In this case, since the second vertical shift register 12 sequentially scans the pixels included in one pixel mixing unit among the pixels constituting the pixel group 10 in one column and having the same color filter, the solid-state imaging The device performs a pixel mixing operation.

  FIG. 3 shows a second example of the first signal transmission method in the solid-state imaging device according to the first embodiment of the present invention.

  In FIG. 3, reference numeral 15 denotes a column of pixels arranged in the column direction in the sensor unit, and reference numeral 16 denotes a first vertical shift that sequentially scans all the pixels constituting the column of pixel groups 15 in the vertical direction. Reference numeral 17 denotes a second vertical shift register that sequentially scans pixels that are included in one pixel mixing unit among the pixels that form the pixel group 15 in one column and that have color filters of the same color. . In FIG. 3, reference numeral 16a denotes a first scanning start terminal of the first vertical shift register 16, and 17a denotes a second scanning start terminal of the second vertical shift register 17. By applying a scan start signal to one of the start terminal 16a or the second scan start terminal 17a, the first vertical shift register 16 or the second vertical shift register 17 is selected.

  Hereinafter, the operation in the second example of the first signal transmission method shown in FIG. 3 will be described.

  In the case of performing normal scanning, when a scanning start signal is applied to the first scanning start signal terminal 16a, the first vertical shift register 16 starts scanning. In this case, since the first vertical shift register 16 sequentially scans all the pixels constituting the pixel group 15 in one column, the solid-state imaging device performs a normal operation.

  On the other hand, in the case of pixel mixing, when the scanning start signal is applied to the second scanning start signal terminal 17a, the second vertical shift register 17 starts scanning. In this case, since the second vertical shift register 17 sequentially scans the pixels included in one pixel mixing unit among the pixels constituting the pixel group 15 in one column and having the same color filter, the solid-state imaging The device performs a pixel mixing operation.

[Second Signal Transmission Method in Solid-State Imaging Device According to First Embodiment]
FIG. 4 shows a first example of the second signal transmission method in the solid-state imaging device according to the first embodiment of the present invention.

  In FIG. 4, reference numeral 20 denotes a pixel group arranged in the column direction in the sensor unit, and 21 denotes a vertical shift register that sequentially scans all the pixels constituting the pixel group 20 in the vertical direction. ing. In FIG. 4, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, and 36 indicate transistors, respectively. Each gate is connected to the gate signal VA, and each gate of the transistors 23, 25, 28, 30, 33, and 35 is connected to the gate signal line VB, and the transistors 24, 26, 29, 32, 34, and 36 are connected. Are connected to the gate signal line VC.

  As shown in FIG. 4, the output 1 of the vertical shift register 21 is connected to the sensor unit 1 via the transistor 22, and the output 2 of the vertical shift register 21 is connected to the sensor unit 2 via the transistor 23. In addition, the output 3 of the vertical shift register 21 is connected to the sensor unit 2 through the transistor 26 and is connected to the sensor unit 3 through the transistor 25. Yes. The outputs 4 to 9 of the vertical shift register are connected to the sensor unit 4 to the sensor unit 9 through the transistors 27 to 36 as in the outputs 1 to 3.

  Hereinafter, the operation in the first example of the second signal transmission method shown in FIG. 4 will be described.

  When normal scanning is performed, the gate signal line VA and the gate signal line VB are set to high, and the gate signal line VC is set to low. In this way, the vertical shift register 21 sequentially outputs signals of all the pixels constituting the pixel group 20 in one column, so that the solid-state imaging device can perform a normal operation.

  On the other hand, when performing pixel mixing, the gate signal line VA and the gate signal line VC are set to high, and the gate signal line VB is set to low. In this way, the vertical shift register 21 outputs a signal from a pixel included in one pixel mixing unit among the pixels constituting the pixel group 20 in one column for a predetermined period and having a color filter of the same color. The imaging device can perform a pixel mixing operation.

  As described above, by selecting the type of signal applied to the gate signal lines VA, VB, and VC, it is possible to switch between the sequential scanning method and the pixel mixed scanning method with one vertical shift register 21.

  FIG. 5 shows a second example of the second signal transmission method in the solid-state imaging device according to the first embodiment of the present invention.

  In FIG. 5, reference numeral 25 denotes a pixel group arranged in the column direction in the sensor unit, and 26 denotes a vertical shift register that sequentially scans all the pixels constituting the pixel group 25 in the vertical direction in the vertical direction. ing. In FIG. 5, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, Reference numerals 62, 63, 64, 65, 66, and 67 denote transistors. The gates of the transistors 40, 49, 58, and 61 are connected to the gate signal VA, and the transistors 41, 42, 45, 46, and 50 are connected. , 51, 54, 55, 59, 60, 63, 64 are connected to the gate signal line VB, and transistors 43, 44, 47, 48, 52, 53, 56, 57, 61, 62, 65 , 66 are connected to a gate signal line VC.

  Hereinafter, the operation in the second example of the second signal transmission method shown in FIG. 5 will be described.

  When normal scanning is performed, the gate signal line VA and the gate signal line VB are set to high, and the gate signal line VC is set to low. In this way, the vertical shift register 26 sequentially outputs signals of all the pixels constituting the pixel group 25 in one column, so that the solid-state imaging device can perform a normal operation.

  On the other hand, when performing pixel mixing, the gate signal line VA and the gate signal line VC are set to high, and the gate signal line VB is set to low. In this case, the vertical shift register 26 outputs a signal from a pixel that is included in one pixel mixing unit among the pixels constituting the pixel group 25 in one column and has a color filter of the same color for a predetermined period. The imaging device can perform a pixel mixing operation.

  As described above, by selecting the type of signal to be applied to the gate signal lines VA, VB, and VC, it is possible to switch between the sequential scanning method and the pixel mixed scanning method with one vertical shift register 26.

(Second Embodiment)
Hereinafter, a second embodiment of the present invention will be described with reference to the drawings.

  FIG. 6 is a block diagram showing a configuration of a main part of a solid-state imaging device according to the second embodiment of the present invention. As illustrated in FIG. 6, the solid-state imaging device according to the second embodiment includes an imaging unit 101 having a plurality of pixel units 1011, 1012, 1013,... Arranged in a matrix, and a column selection signal line 102. A column driving circuit 103 that supplies a selection signal and a row driving circuit 107 that supplies a row selection signal to the row selection signal line 108 are provided.

  FIG. 7 shows a block configuration of the column driving circuit 103. As shown in FIG. 7, the column drive circuit 103 includes a sensor unit 110, a selection circuit 120, a first drive circuit 130, and a second drive circuit 140.

  The sensor unit 110 includes a switch transistor SW including a plurality of read MOS transistors connected to the column selection signal lines 111, 112, 113,... Connected to the column selection signal line 102 shown in FIG. Each switch transistor SW having its drain connected to the column selection signal lines 111, 112, 113,... Has its source connected to the detection signal line 105, and has its gate connected to drive signals 121a to 121c from the selection circuit 120. 122a-122c, 123a-123c are received.

  The selection circuit 120 is divided into a first block 121, a second block 122, and a third block 123, and the first block 121 has first drive signals 131 a to 131 c from the first drive circuit 130. And the second drive signal 141 a from the second drive circuit 140, the second block 122 receives the first drive signals 132 a to 132 c from the first drive circuit 130 and the second drive circuit 140. In response to the second drive signal 142a, the third block 123 receives the first drive signals 133a to 133c from the first drive circuit 130 and the second drive signal 143a from the second drive circuit 140. .

  Therefore, the selection circuit 120 selects any one of the first drive signals 131a to 133c from the first drive circuit 130 and the second drive signals 141a, 142a, and 143a from the second drive circuit 140, The drive signals 121a to 123c are output.

  Each switch transistor SW receives the drive signals 121 a to 123 c selected by the selection circuit 120 at the gates and conducts, and outputs the pixel signal of the selected pixel row in the corresponding pixel column to the detection signal line 105.

  More specifically, the selection circuit 120 is a first drive signal from the first drive circuit 130 in the imaging mode that is changed by an instruction from the outside, and in the still image mode in which a still image is captured. On the other hand, in the moving image mode in which moving images are captured, the second drive circuit 140 is selected. At this time, the selection circuit 120 sequentially scans when the first drive signal from the first drive circuit 130 is selected, and when the second drive signal from the second drive circuit 140 is selected. Is not interlaced scanning, but simultaneously selects and outputs drive signals 121a to 121c for a plurality of columns, in this embodiment, for three columns.

  The first drive circuit 130 outputs the same number of first drive signals 131a to 131c, 132a to 132, and 133a to 133c as the pixel columns of the imaging unit 101, and among these, the first drive signals 131a to 131c are the first ones. 1, the first drive signals 132 a to 132 c are output from the second block 132, and the first drive signals 133 a to 133 c are output from the third block 133.

  The second drive circuit 140 outputs the second drive signals 141a, 142a, and 143a, which is one third of the number of pixel columns of the imaging unit 101, and among these, the second drive signal 141a is the first drive signal 141a. The second drive signal 142 a is output by the second block 142, and the second drive signal 143 a is output by the third block 143.

  With the above configuration, the first drive signals 131a to 131c, 132a to 132c, and 133a to 133c sequentially output from the first drive circuit 130 are connected to the column selection signal lines 111 to 119 via the selection circuit 120. Are sequentially applied to the gates of the switch transistors SW. As a result, pixel signals sequentially read out to the column selection signal lines 111 to 119 are output to the detection signal line 105 via the switch transistor SW as detection signals.

  On the other hand, for example, the second drive signal 141a output from the first block 141 of the second drive circuit 140 is used as three drive signals 121a, 121b, and 121c from the selection circuit 120, and the column selection signal lines 111 to 111 are used. As a result, the detection signals from the column selection signal lines 111 to 113 are simultaneously output to the detection signal line 105. Similarly, the second drive signal 142a output from the second block 142 is simultaneously output as three drive signals 122a, 122b, and 122c from the selection circuit 120. As a result, detection from the column selection signal lines 114 to 116 is performed. A signal is simultaneously output to the detection signal line 105. The second drive signal 143a output from the third block 143 is simultaneously output as three drive signals 123a, 123b, and 123c from the selection circuit 120. As a result, detection signals from the column selection signal lines 117 to 119 are output. Are simultaneously output to the detection signal line 105. In this case, for example, voltage values of three detection signals from the column selection signal lines 111 to 113 are averaged and output to the detection signal line 105.

  FIG. 8 shows a configuration example of the selection circuit 120 using CMOS transistors. Here, only the first block 121 of the selection circuit 120 is shown, and the other blocks 121 and 122 have the same configuration as the first block, and are omitted. As shown in FIG. 8, the first drive signal 131a from the first selection circuit 130 is driven through a CMOS transistor composed of an N-type MOS transistor 162a and a P-type MOS transistor 163a connected in parallel to each other. It is output as 121a.

  Similarly, the first drive signal 131b from the first selection circuit 130 is output as a drive signal 121b via a CMOS transistor composed of an N-type MOS transistor 162b and a P-type MOS transistor 163b connected in parallel. The first drive signal 131c is output as a drive signal 121c through a CMOS transistor including an N-type MOS transistor 162c and a P-type MOS transistor 163c connected in parallel to each other.

  The second drive signal 141a from the second selection circuit 140 is passed through a CMOS transistor composed of N-type MOS transistors 162d, 162e and 162f and P-type MOS transistors 163d, 163e and 163f connected in parallel with each other. The drive signals 121a, 121b and 121c are output.

  The gates of the N-type MOS transistors 162a, 162b, and 162c are connected to the first selection signal line 160, and the gates of the P-type MOS transistors 163a, 163b, and 163c are connected to the first via the inverters 164a, 164b, and 164c, respectively. The selection signal line 160 is connected.

  The gates of the N-type MOS transistors 162d, 162e and 162f are connected to the second selection signal line 161, and the gates of the P-type MOS transistors 163d, 163e and 163f are connected to the second via the inverters 164d, 164e and 164f, respectively. Are connected to the selection signal line 161.

  With this configuration, in the still image mode in which the first selection signal line 160 is at a high level and the second selection signal line 161 is at a low level, the CMOS transistor connected to the first selection signal line 160 is conductive. On the other hand, since the CMOS transistor connected to the second selection signal line 161 is in a non-conductive state, for example, the first drive signal 131a from the first drive circuit 130 is output as the drive signal 121a. The

  Conversely, in the moving image mode in which the first selection signal line 160 is at a low level and the second selection signal line 161 is at a high level, the CMOS transistor connected to the first selection signal line 160 is in a non-conductive state. On the other hand, since the CMOS transistor connected to the second selection signal line 161 is in a conductive state, the second drive signal 141a from the second drive circuit 140 is a sensor as the drive signals 121a, 121b, and 121c. Is output to the unit 110. As a result, as shown in FIG. 7, the three detection signals from the column selection signal lines 111, 112, and 113 are simultaneously output to the detection signal line 105.

  As described above, according to the solid-state imaging device according to the second embodiment, even in the moving image mode, the interlaced scanning is not performed, and instead, detection signals from a plurality of pixel columns are simultaneously averaged. Since the pixel information is not lost due to the detection, generation of false colors can be prevented, and as a result, the image quality of the moving image can be improved.

(Third embodiment)
Hereinafter, a third embodiment of the present invention will be described with reference to the drawings.

  The main part of the solid-state imaging device according to the third embodiment is the same as that of the second embodiment shown in FIG. 6, except that the selection circuit 120 uses an NMOS transistor instead of a CMOS transistor. And the point that both the first drive circuit 130 and the second drive circuit 140 are operated as a master and a slave.

  FIG. 9 shows only the first blocks 121, 131, and 141 of the selection circuit 120, the first driving circuit 130, and the second driving circuit 140 using NMOS transistors, respectively.

  As shown in FIG. 9, in the first block 131 of the first drive circuit 130, the first drive signal 131a is divided into a master signal 131am and a slave signal 131as. Similarly, the first drive signal 131b is divided into a master signal 131bm and a slave signal 131bs, and the first drive signal 131c is divided into a master signal 131cm and a slave signal 131cs.

  In the first block 141 of the second drive circuit 140, the second drive signal 141a is divided into a master signal 141am and a slave signal 141as.

  In the first block 121 of the selection circuit 120, each gate receives a master signal 131am or the like from the first block 131 of the first drive circuit 130, and each drain is connected to the selection signal line 162. Transistors 165a, 165b and 165c, and second NMOS transistors 166a, 166b and 166c whose gates are connected to respective sources such as the first NMOS transistor 165a and whose drains output drive signals 121a, 121b and 121c, respectively. have.

  The first block 121 includes a first NMOS transistor 165d whose gate receives the master signal 141am from the first block 141 of the second drive circuit 140 and whose drain is connected to the selection signal line 162; The gate is connected to the source of the first NMOS transistor 165d, and the drains have second NMOS transistors 166d, 166e, and 166f that output drive signals 121a, 121b, and 121c, respectively.

  Between the source of the first NMOS transistor 165a and the like and the source of the second NMOS transistor 166a and the like, capacitors 167a to 167a for generating a predetermined potential difference between the sources, that is, the driving voltage of the second NMOS transistor 166a and the like. 167d is connected. In addition, the sources of the first NMOS transistor 165a and the like and the sources of the second NMOS transistor 166a and the like are connected to the third NMOS transistors 168a to 168d that discharge the charges of the capacitors 167a and the like by grounding the source. NMOS transistors 169a to 169d are connected to each other.

  The shared gate of the third NMOS transistor 168 a and the fourth NMOS transistor 169 a receives the master signal 131 bm of the first drive signal from the first block 131 of the first drive circuit 130. Similarly, the shared gate of the third NMOS transistor 168b and the fourth NMOS transistor 169b receives the master signal 131cm of the first drive signal from the first block 131. Although not shown, the shared gates of the third NMOS transistor 168c and the fourth NMOS transistor 169c receive the master signal of the first drive signal from the second block 132 of the first drive circuit 130. receive. The shared gate of the third NMOS transistor 168 d and the fourth NMOS transistor 169 d receives the master signal of the second drive signal from the second block 142 of the second drive circuit 140.

  Hereinafter, the operation of the selection circuit 120 (first block 121) configured as described above will be described.

  First, in the still image mode in which the first drive circuit 130 (first block 131) operates and the second drive circuit 140 (first block 141) does not operate, the first drive circuit 130 When the potential of the master signal 131am of the first drive signal transits to a high level and the gate of the first NMOS transistor 165a becomes a high level, the first NMOS transistor 165a becomes conductive and the capacitor 167a The voltage at the first terminal on the source side of the first NMOS transistor 165 a becomes high level by the selection signal line 162. At this time, since the voltage of the slave signal 131as from the first drive circuit 130 is at the ground level, the potential of the second terminal on the source side of the second NMOS transistor 166a in the capacitor 167a is also at the ground level. The potential of the first terminal 167a is increased. That is, the gate potential of the second NMOS transistor 166a becomes high level, and the second NMOS transistor 166a becomes conductive.

  Next, when the master signal 131am from the first driving circuit 130 goes low and the slave signal 131as goes high, the change in potential is transmitted to the source of the second NMOS transistor 166a, thereby turning on. Since the drain of a certain second NMOS transistor 166a is at a high level, the potential of the column selection signal line 121a is also at a high level, so that the detection signal from the column selection signal line 111 is output to the detection signal line 105 shown in FIG. Is done.

  Next, when the master signal 131bm from the first driving circuit 130 becomes high level and the slave signal 131bs becomes low level, the second NMOS transistor 166b is turned on. At this time, since the shared gate of the third NMOS transistor 168a and the fourth NMOS transistor 169a transitions to a high level, the charge charged in the capacitor 167a is discharged.

  In this way, the first drive circuit 130 sequentially scans from the first block 131 to the second block 132 and the third block 133, and the drive signals 121a, 121b,. By making the transition, detection signals are sequentially output from the column signal selection lines 111 to 119 to the detection signal line 105.

  On the other hand, in the moving image mode in which the first driving circuit 130 (first block 131) does not operate and the second driving circuit 140 (first block 141) operates, the second driving circuit 140 is used. When the potential of the master signal 141am from the high level transitions to the high level and is applied to the gate of the first NMOS transistor 165d, the first NMOS transistor 165d becomes conductive, and the first NMOS in the capacitor 167d The voltage of the first terminal on the source side of the transistor 165d is set to a high level by the selection signal line 162. At this time, the second terminal on the source side of the second NMOS transistors 166d to 166f in the capacitor 167d has the potential of the first terminal of the capacitor 167d because the voltage of the slave signal 141as from the second drive circuit 140 is at the ground level. Becomes higher. That is, the gate potentials of the second NMOS transistors 166d to 166f are at a high level, and the second NMOS transistors 166d to 166f are all turned on.

  Next, when the master signal 141am from the second drive circuit 140 transitions to a low level and the slave signal 141as transitions to a high level, the change in potential is transmitted to the respective sources of the second NMOS transistors 166d to 166f. Since the drains of the second NMOS transistors 166d to 166f in the conductive state are at a high level, the potentials of the drive signals 121a, 121b, and 121c are simultaneously at a high level. Therefore, the detection signal line 105 illustrated in FIG. Detection signals from the column selection signal lines 111, 112, and 113 are simultaneously output.

  As described above, the second drive circuit 140 sequentially scans from the first block 141 to the second block 142 and the third block 143, and each of the three column selection signal lines 121a to 121c and 122a to By sequentially transitioning 122c and 123a to 123c to the high level, the detection signals from the three pixel columns from the column selection signal lines 121a to 121c are averaged and output to the detection signal line 105.

  As described above, according to the solid-state imaging device according to the third embodiment, even in the moving image mode, instead of interlaced scanning as in the past, detection signals from a plurality of pixel columns are simultaneously averaged and detected. Since no pixel information is lost, the occurrence of false colors can be prevented, and as a result, the quality of moving images can be improved.

  In each of the second and third embodiments, the configuration in which the detection signals for three columns among the plurality of pixel columns are simultaneously output by the second drive circuit 140 has been described as an example. By changing the circuit configuration, it is possible to simultaneously output detection signals from two or four or more pixel columns.

  In each of the second and third embodiments, the column selection signal for selecting the pixel column arranged in the column direction among the pixels arranged in the row direction and the column direction has been described. The present invention may be applied to a row selection signal for selecting a pixel column.

  In addition, by configuring the camera using the solid-state imaging device according to each of the first to third embodiments, it is possible to prevent the occurrence of false colors due to the lack of pixel information even in the imaging mode for moving images and to reduce image quality degradation. Can be realized.

  The present invention is suitable for a MOS type solid-state imaging device used for a digital camera or the like, and specifically, for a camera built in a mobile phone, a digital still camera, a camera unit connected to an information processing device, or the like. Is suitable.

It is a figure which shows the structure of the solid-state imaging device which concerns on the 1st Embodiment of this invention. It is a figure which shows the 1st example of the 1st signal transmission system in the solid-state imaging device which concerns on the 1st Embodiment of this invention. It is a figure which shows the 2nd example of the 1st signal transmission system in the solid-state imaging device which concerns on the 1st Embodiment of this invention. It is a figure which shows the 1st example of the 2nd signal transmission system in the solid-state imaging device which concerns on the 1st Embodiment of this invention. It is a figure which shows the 2nd example of the 2nd signal transmission system in the solid-state imaging device which concerns on the 1st Embodiment of this invention. It is a figure which shows the structure of the solid-state imaging device which concerns on the 2nd Embodiment of this invention. It is a block diagram which shows the column drive circuit in the solid-state imaging device which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the selection circuit which comprises the column drive circuit in the solid-state imaging device which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the selection circuit which comprises the column drive circuit in the solid-state imaging device which concerns on the 3rd Embodiment of this invention. It is a figure which shows the structure of the solid-state imaging device which concerns on a 1st prior art example. It is a figure which shows the structure of the solid-state imaging device which concerns on a 2nd prior art example. It is a block diagram which shows the drive circuit in the solid-state imaging device which concerns on a 2nd prior art example.

Explanation of symbols

1 A set of a plurality of pixels arranged two-dimensionally in the row direction and the column direction 2 A pixel unit composed of four pixels arranged in two rows and two columns 3 Nine pixels arranged in five rows and five columns Pixel mixing unit comprising 5 horizontal shift register 6 vertical shift register 10 one column of pixel group 11 in sensor unit first vertical shift register 11a first scan start terminal 12 second vertical shift register 12a second scan start terminal 15 A pixel group in one column 16 in the sensor unit First vertical shift register 16a First scanning start terminal 17 Second vertical shift register 17a Second scanning start terminal 20 Pixel group in one column in the sensor unit 21 Vertical shift register 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36 Transistor 25 1 column pixel group 26 vertical shift registers 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67 Transistor 101 Imaging unit 102 Column selection signal line 103 Column drive circuit 105 Detection signal line 1011, 1012, 1013, 1014, 1015 Pixel unit 107 Row drive circuit 108 Row selection Signal line 110 Sensor unit 111, 112, 113, 114, 115, 116, 117, 118, 119 Column selection signal line 120 Selection circuit 121 First block 121a, 121b, 121c Drive signal 122 Second block 122a, 122b, 122c Drive signal 123 Third block 123a, 123b, 123c Drive signal 130 Drive circuit 131 first block 131a, 131b, 131c first drive signal 132 second block 132a, 132b, 132c first drive signal 133 third block 133a, 133b, 133c first drive signal 131am, 131 bm, 131 cm Master signal 131 as, 131 b, 131 cs Slave signal 140 Second drive circuit 141 First block 141 a Second drive signal 142 Second block 142 a Second drive signal 143 Third block 143 a Second drive Signal 141am Master signal 141as Slave signal 160 First selection signal line 161 Second selection signal lines 162a, 162b, 162c, 162d, 162e, 162f N-type MOS transistors 163a, 163b, 163c, 163d, 163e, 16 f P-type MOS transistors 164a, 164b, 164c, 164d, 164e, 164f Inverters 165a, 165b, 165c, 165d First NMOS transistors 166a, 166b, 166c, 166d, 166e, 166f Second NMOS transistors 167a, 167b, 167c 167d Capacitors 168a, 168b, 168c, 168d Third NMOS transistors 169a, 169b, 169c, 169d Fourth NMOS transistor

Claims (5)

A solid-state imaging device having a plurality of pixels arranged two-dimensionally in the vertical direction and the horizontal direction, and pixels adjacent in the vertical direction or the horizontal direction among the plurality of pixels having color filters of different colors In
In a predetermined period, the signal output means for sequentially outputting a charge signal received from a pixel having a color filter of the same color among the plurality of pixels,
The signal output means includes: a first shift register that sequentially scans pixels arranged in a vertical direction or a horizontal direction among the plurality of pixels; and a plurality of pixels arranged in the vertical direction or the horizontal direction and having the same color. solid-state image sensor characterized in that a second shift register for sequentially scanning for pixels having a color filter. A solid-state imaging device having a plurality of pixels arranged two-dimensionally in the vertical direction and the horizontal direction, and pixels adjacent in the vertical direction or the horizontal direction among the plurality of pixels having color filters of different colors In
In a predetermined period, the signal output means for sequentially outputting a charge signal received from a pixel having a color filter of the same color among the plurality of pixels,
The signal output means includes a shift register that sequentially scans pixels arranged in a vertical direction or a horizontal direction among the plurality of pixels, and a charge signal received from the shift register for each pixel arranged in the vertical direction or the horizontal direction. the first output mode and, the same color second output mode and the switched that solid bodies you characterized having an output means for outputting sequentially output for each pixel having a color filter to be sequentially output to Imaging device. The signal output means has means for sequentially outputting charge signals received from pixels having a color filter of the same color and arranged in the horizontal direction among the plurality of pixels during the predetermined period. The solid-state imaging device according to claim 1 or 2 . The signal output means includes means for sequentially outputting charge signals received from pixels having a color filter of the same color and arranged in the vertical direction among the plurality of pixels during the predetermined period. The solid-state imaging device according to claim 1 or 2 . A camera comprising the solid-state imaging device according to any one of claims 1 to 4 .

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