JP3924384B2 - Thin film transistor - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a thin film transistor used in an active matrix liquid crystal display device and a method for manufacturing the same, and more particularly to an auxiliary capacitor provided for each pixel.
[0002]
[Prior art]
Nowadays, semiconductor elements typified by IC and LSI, electronic devices or home appliances incorporating these semiconductor elements have been developed, manufactured and sold in large quantities in the market. Today, not only television receivers but also VTRs and personal computers are widely used. These devices are becoming more sophisticated year by year, and are indispensable in the modern society as a tool for providing a lot of information to users as the information society advances.
[0003]
Many of the above-mentioned devices are equipped with a means for displaying information for accurately transmitting a large amount of information to the user, a so-called display, but the type and amount of information that can be handled depending on the performance and characteristics of the display. Therefore, there is a strong interest in development trends. In particular, in recent years, a liquid crystal display device, particularly a semiconductor element such as a thin film transistor (hereinafter referred to as TFT), is provided for each pixel electrode as a display having an advantage of being thin, light, and low power consumption. An active matrix type liquid crystal display device which is controlled is attracting attention because it has a high resolution and a clear image can be obtained. Hereinafter, the liquid crystal display device will be described.
[0004]
As a semiconductor element used in a conventional active matrix liquid crystal display device, a TFT made of an amorphous silicon thin film is known, and many active matrix liquid crystal display devices on which this TFT is mounted are commercialized. And this active matrix type liquid crystal display device is going to occupy a mainstream position as a display of OA equipment and consumer equipment.
[0005]
On the other hand, as a semiconductor element that replaces the TFT using the amorphous silicon thin film, a driving circuit unit including a pixel TFT for driving the pixel electrode and a TFT for driving the pixel TFT is formed on one substrate. There is a great expectation for a technique for forming a TFT using a polycrystalline silicon thin film that can be integrally formed thereon.
[0006]
The polycrystalline silicon thin film has higher mobility than the amorphous silicon thin film used in the conventional TFT, and it is possible to form a high performance TFT. In addition, when it is realized that the driving circuit unit for driving the pixel TFT is integrally formed on one inexpensive glass substrate or the like, it is not necessary to attach a driving circuit substrate made of IC or LSI. The manufacturing cost is greatly reduced compared to the conventional case.
[0007]
In this active matrix liquid crystal display device, a transmissive liquid crystal display device using a transparent conductive thin film such as ITO (indium tin oxide) as a pixel electrode, and a reflective liquid crystal using a reflective electrode made of metal or the like as a pixel electrode. There is a display device. Originally, a liquid crystal display device is not a self-luminous display. Therefore, in the case of a transmissive liquid crystal display device, an illumination device, a so-called backlight is arranged behind the liquid crystal display device, and display is performed by light incident from there. Is going. In the case of a reflective liquid crystal display device, display is performed by reflecting incident light from the outside with a reflective electrode.
[0008]
By the way, the above-mentioned liquid crystal display device forms a capacitor by sandwiching a liquid crystal layer between the pixel electrode and the common electrode provided on the counter substrate side, and the potential of the pixel electrode corresponding to the image signal is a certain period. The display is performed by being held at a predetermined potential. However, there is a case where the display is deteriorated due to the potential of the pixel electrode being attenuated by discharge from the capacitor due to leakage current or the like when the TFT is off. In order to prevent such a variation in the potential of the pixel electrode, an auxiliary capacitor is usually formed in parallel with the above-described capacitor.
[0009]
Many conventional auxiliary capacitors use a gate insulating film as a dielectric film for forming an auxiliary capacitor, for example, as shown in FIG. The electrode was formed by sandwiching a dielectric film between the drain electrode or the pixel electrode. The reason is that the dielectric film can be formed simultaneously with the fabrication of the TFT, and a high-quality gate insulating film can be used as the dielectric film. An example of forming the auxiliary capacitor by such a method is, for example, Japanese Patent Publication No. 1-333833.
[0010]
However, in the conventional method, the gate insulating film is used as it is as a dielectric film for forming the auxiliary capacitance. Therefore, although the manufacturing method is relatively simple, the gate insulating film is used to ensure the TFT performance. In many cases, the film thickness and the like are subject to certain restrictions, so that it is not easy to achieve both the performance required for the gate insulating film and the dielectric film. In addition, since the capacitor wiring is formed in the same layer as the gate wiring, a capacitor electrode area sufficient to form a sufficient auxiliary capacitor for securing the processing accuracy of the photolithography process and the etching process or the aperture ratio of the pixel is secured. It became difficult to do this, and it tended to become more prominent as the processing dimensions of TFTs and the like became smaller.
[0011]
As described above, according to the conventional method, as the definition of the liquid crystal display device is increased, it has become extremely difficult to form a sufficient auxiliary capacity.
[0012]
For this reason, technical development relating to the formation of a dielectric film, a capacitor electrode, or the structure of an auxiliary capacitor for the purpose of forming an auxiliary capacitor has been actively conducted. As shown in Japanese Laid-Open Patent Publication No. 2000-228, etc., a method for forming an auxiliary capacitor by sandwiching a dielectric layer between a pixel electrode and a capacitor electrode has been proposed. In Japanese Patent Laid-Open No. 5-216067, it is shown that a capacitive electrode is formed of ITO, which is a transparent conductive thin film, and in Japanese Patent Laid-Open No. 8-43859, an electrode layer formed simultaneously with a source wiring is disclosed. It is shown that an auxiliary capacitor is formed between the pixel electrodes.
[0013]
[Problems to be solved by the invention]
As described above, when the gate insulating film of the TFT is used also as the dielectric film of the auxiliary capacitor, it is not easy to achieve both functions required for both. In other words, in order to function as a gate insulating film, priority is given to ensuring insulation, breakdown voltage, etc. that do not cause defects such as short circuits, and in order to improve TFT characteristics, interface states and fixed charges are set. There was a need to reduce. On the other hand, in order to function as a dielectric film, it is necessary to have a high dielectric constant capable of forming a capacitor capable of holding the potential of the pixel electrode, as well as insulation and breakdown voltage.
[0014]
This is because good display characteristics and stable TFT characteristics can be obtained only when both are realized at the same time. For example, if the thickness of the gate insulating film is increased with priority on insulation, withstand voltage, etc., the auxiliary capacity is reduced and the display characteristics are impaired. Conversely, the thickness of the gate insulating film is reduced with priority on the auxiliary capacity. As a result, sufficient insulation and breakdown voltage cannot be secured, and defects such as leakage and short-circuiting occur. Conventionally, a silicon oxide film (hereinafter referred to as SiO 2) is used as the gate insulating film from the viewpoint of TFT characteristics and prevention of defects. ₂ In many cases, a film) was selected.
[0015]
In order to avoid such inconvenience, for example, as shown in FIG. 14, there has been proposed a method of forming an auxiliary capacitor by sandwiching a dielectric layer between the pixel electrode and the capacitor electrode as described above. For example, JP-A-5-216067 and JP-A-8-43859 disclose a method of forming an auxiliary capacitor by sandwiching a dielectric film between a capacitor electrode and a pixel electrode. For example, since the gate insulating film of the TFT and the dielectric film for forming the auxiliary capacitor are formed by separate insulating films, an insulating film having a film thickness and a dielectric constant suitable for forming the auxiliary capacitor is arbitrarily selected. Can be used. Therefore, although the manufacturing process is slightly increased, the degree of freedom for the formation of the auxiliary capacitance is greatly increased.
[0016]
However, such a method naturally forms an auxiliary capacitor in the pixel electrode region, and therefore, a capacitor electrode is inevitably formed below the pixel electrode. In the above-mentioned JP-A-5-216067, an ITO film having a film thickness of about 1500 mm (150 nm) is used as a capacitor electrode, and a silicon nitride film (hereinafter, SiNx film) having a film thickness of about 2000 mm (200 nm) is deposited thereon. It is shown. Japanese Patent Laid-Open No. 8-43859 shows that a capacitor electrode is formed using an aluminum film having a thickness of about 3000 mm (300 nm), and a SiNx film having a thickness of about 2000 mm (200 nm) is deposited thereon. Yes. As described above, the capacitor electrode is formed of a conductive film such as a metal film. However, a certain amount of film thickness is necessary to prevent disconnection and the like, and a thin dielectric film is used to sufficiently secure the auxiliary capacitance. If it is used, a large step will occur at that portion. Even if an organic film such as a resin is used for the dielectric film, if the film thickness is about 2000 mm (200 nm), the effect of reducing the step due to the capacitive electrode is small, and the insulation is insufficient and the pixel electrode. There is a possibility of causing a short circuit failure of the capacitor electrode.
[0017]
As described above, when the auxiliary capacitor is formed by sandwiching the dielectric layer between the pixel electrode and the capacitor electrode, it becomes difficult to maintain the flatness of the surface of the pixel electrode. The surface of the pixel electrode connected to the TFT is desirably as flat as possible. If the flatness of the surface of the pixel electrode is lost, the alignment of liquid crystal molecules is disturbed and the display quality is deteriorated. In particular, in the reflective liquid crystal display device, when the flatness of the surface of the pixel electrode is lost, the display quality is remarkably impaired, for example, the reflection direction of incident light becomes non-uniform and the luminance is lowered.
[0018]
The present invention has been made in view of the above-described problems. The object of the present invention is to obtain a sufficient auxiliary capacitance that is easy and stable in manufacturing and impairs the flatness of the surface of the pixel electrode. It is an object of the present invention to provide a thin film transistor structure that realizes a display device having good display characteristics and a manufacturing method thereof.
[0019]
[Means for Solving the Problems]
The thin film transistor of the present invention comprises a gate electrode, Includes a pair of contact regions implanted with impurities An active layer, a gate insulating film provided between the gate electrode and the active layer, One of the active layers through a contact hole formed in a laminated film of a first interlayer insulating film covering the gate insulating film and the gate electrode and a second interlayer insulating film covering the first interlayer insulating film Connected to the contact area of Source electrode, Connected to the other contact region of the active layer through a contact hole formed in a laminated film of the gate insulating film, the first interlayer insulating film, and the second interlayer insulating film Drain electrode and Through a contact hole formed in the third interlayer insulating film covering the drain electrode. In the thin film transistor having a pixel electrode connected to the drain electrode and having an auxiliary capacitor for holding the potential of the pixel electrode, the auxiliary capacitor includes: Between the first interlayer insulating film and the second interlayer insulating film, The active layer comprising a thin film mainly composed of silicon Formed so as not to overlap each contact area With capacitive electrode ,in front A drain electrode; The Sandwiched between the capacitor electrode and the drain electrode The second It is characterized by comprising an interlayer insulating film, and thereby the above object is achieved.
[0020]
At this time, A third interlayer insulating film; Between the pixel electrodes, 4th An interlayer insulating film is sandwiched between the Third interlayer insulating film and fourth interlayer insulating film Is provided between the drain electrode and the shield electrode and between the shield electrode and the pixel electrode. Three auxiliary capacitors may be formed.
[0021]
The operation of the present invention will be described below.
[0022]
According to the thin film transistor of the present invention, the storage capacitor is formed by sandwiching the interlayer insulating film between the capacitor electrode formed above the active layer and the drain electrode formed above the active layer. In other words, the dielectric film for forming the auxiliary capacitance has a dielectric constant of SiO2 such as an interlayer insulating film different from the gate insulating film, for example, a SiNx film. ₂ Since an interlayer insulating film larger than the film can be used, a sufficient capacitance can be formed without affecting TFT characteristics and the like.
[0023]
Also, a shield electrode that shields the TFT between the drain electrode and the pixel electrode is used as a capacitor electrode, and between the capacitor electrode and the drain electrode, between the drain electrode and the shield electrode, and between the shield electrode and the pixel electrode. Since a capacity is formed at a total of three locations, a sufficient auxiliary capacity can be secured even in a small high-definition panel.
[0024]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
Hereinafter, embodiments of the present invention will be described. FIG. 1 is a schematic view showing a cross section of a TFT according to an embodiment of the present invention, and FIG. 2 is a schematic view showing a plane of the TFT according to the embodiment of the present invention. FIG. 1 shows a cross section of the portion indicated by AA ′ in FIG.
[0025]
As shown in FIGS. 1 and 2, the TFT according to the present embodiment has the following general configuration. SiO 2 on an insulating substrate 1 such as glass ₂ A base coat film 2 made of a film or the like is deposited, on which a TFT active layer 3 made of a silicon thin film is formed in a predetermined shape. ₂ An insulating film such as a film is deposited to form the gate insulating film 4. A gate electrode 5 made of a metal material such as aluminum is formed in a predetermined shape on the active layer 3 with the gate insulating film 4 interposed therebetween.
[0026]
Here, a contact region 6 into which impurity ions are implanted is formed in the active layer 3, and a first interlayer insulating film 7 is formed by depositing an insulating film over the entire surface. Further, a capacitor electrode 8 patterned in a predetermined shape is formed thereon, and a second interlayer insulating film 9 is formed so as to cover at least the capacitor electrode 8.
[0027]
Contact holes 10 are opened in the interlayer insulating films 7 and 9 and the gate insulating film 4 above the contact region 6, and a source electrode 11 and a drain electrode 12 made of a metal material such as Al are formed to form the contact region 6. Are connected to each.
[0028]
Thereafter, a resin insulating film 13 is formed by applying polyimide resin, acrylic resin, or the like on the entire surface, a contact hole 14 is opened in the insulating film 13, and Cr, so as to be electrically connected to the drain electrode 12. A metal material such as Ni or a transparent conductive thin film such as ITO is deposited and patterned into a predetermined shape to form the pixel electrode 15 to complete the TFT in this embodiment.
[0029]
Thus, as shown in FIGS. 1 and 2, the TFT according to this embodiment includes the auxiliary capacitor C1 by the drain electrode 12 of the TFT and the capacitor electrode 8 provided below the TFT via the dielectric film. It is characterized by being formed. On the drain electrode 12, an insulating film 13 made of a resin film or the like having a film thickness sufficient to make the surface unevenness substantially flat is formed. Therefore, the surface of the pixel electrode 15 has good flatness despite the formation of the auxiliary capacitor C1 under the pixel electrode 15.
[0030]
Here, the manufacturing process of the TFT according to this embodiment will be described in more detail. FIG. 3A to FIG. 5F are process diagrams showing cross sections in each manufacturing process of the TFT according to the embodiment of the present invention.
[0031]
As shown in FIG. 3A, a SiNx film or SiO2 is formed on a substrate 1 such as glass. ₂ A base coat film 2 is formed by depositing a film or a stacked film of these films by, for example, a plasma enhanced chemical vapor deposition (hereinafter referred to as a plasma CVD method). In addition, although the aluminoborosilicate glass etc. which have a high strain point can be used as the board | substrate 1, this invention is not influenced at all by the material of a board | substrate, etc. Even if it is a material other than glass as needed. It can be used as the substrate 1. For example, a quartz substrate or a silicon wafer may be used.
[0032]
Next, a semiconductor thin film such as an amorphous silicon thin film is deposited to a film thickness of, for example, 25 nm to 200 nm, preferably about 30 nm to 70 nm by a plasma CVD method, and heat treatment is performed to form a semiconductor layer 3 of a polycrystalline silicon thin film. To do. As the heat treatment method, a thermal annealing method, a laser annealing method, or the like can be used, and the heat treatment method is not particularly limited. In addition to the polycrystalline silicon thin film, the semiconductor layer 3 can be made of a semiconductor material mainly composed of silicon such as an amorphous silicon thin film or a microcrystalline silicon thin film.
[0033]
Next, as shown in FIG. 3B, after patterning the semiconductor layer 3 into an island shape, SiO 2 is used using an organic silane material such as TEOS (tetraethylorthosilicate). ₂ A film is deposited to a thickness of about 100 nm to form a gate insulating film 4. The gate insulating film 4 may be formed by plasma CVD, atmospheric pressure CVD, sputtering, or the like. Next, a metal thin film is deposited on the gate insulating film 4 to a thickness of about 200 nm to 400 nm, for example, by sputtering, and then patterned into a predetermined shape to form the gate electrode 5. An aluminum alloy or the like can be used as the metal thin film.
[0034]
Next, as shown in FIG. 4C, impurity ions such as a group V element such as phosphorus or a compound thereof, or a group III element such as boron or a compound thereof are applied at an acceleration voltage of 50 keV to 100 keV from above the gate electrode 5. Ions are implanted to form a contact region 6 in the semiconductor layer 3. In the present embodiment, the contact region 6 is formed in a self-aligning manner using the gate electrode 5 as a mask. However, an impurity implantation mask may be formed with a resist or the like to introduce impurities. Next, a SiNx film is deposited on the entire surface including the gate electrode 5 by a plasma CVD method, for example, to a thickness of about 300 nm to 500 nm to form a first interlayer insulating film 7.
[0035]
Next, as shown in FIG. 4D, a metal thin film of titanium or the like is deposited to a thickness of about 150 nm, for example, by sputtering, and then patterned into a predetermined shape to form the capacitor electrode 8. It is also effective to provide a taper at the end of the capacitor electrode 8 so that the step does not become steep. As the capacitor electrode 8, a multilayer film of aluminum and titanium or other metal may be used. The capacitor electrode 8 is formed in parallel with the source wiring. Although not shown, the wiring extending from the capacitor electrode 8 is bundled outside the display region and connected so as to have the same potential as the common electrode on the counter substrate side. Next, a SiNx film is deposited to a thickness of about 60 nm, for example, by plasma CVD so as to cover at least the capacitor electrode 8, and a second interlayer insulating film 9 which is a dielectric film for forming an auxiliary capacitor is formed.
[0036]
Next, as shown in FIG. 5 (e), a contact hole 10 is opened in the insulating film on the contact region 7 of the semiconductor layer 3, a metal thin film is deposited by sputtering, for example, and then patterned into a predetermined shape. Thus, the source electrode 11 and the drain electrode 12 are formed. As the source electrode 11 and the drain electrode 12, an aluminum alloy or a laminated film of an aluminum alloy and a refractory metal such as titanium can be used. The portion of the drain electrode 12 thus formed that overlaps the capacitor electrode 8 via the second interlayer insulating film 9 also serves as one electrode constituting the auxiliary capacitor. Further, the source electrode 11 needs to have a resistance as small as possible in order to minimize signal delay, and is preferably formed to have a thickness of about 500 nm to 800 nm.
[0037]
In this embodiment, an example in which one electrode constituting the auxiliary capacitor is formed by extending a part of the drain electrode 12 is shown, but it is formed as a separate pattern separated from the source electrode 11 and the drain electrode 12 of the TFT. However, it may be connected later. In addition, as in this embodiment, forming the source electrode 11 and the drain electrode 12 simultaneously has the effect of simplifying the process, which is desirable, but even if formed separately, the formation of the auxiliary capacitance itself is affected. It does not affect.
[0038]
Next, as shown in FIG. 5F, a third interlayer insulating film 13 is formed on the entire surface including the source electrode 11 and the drain electrode 12. Next, a contact hole 14 is opened in the third interlayer insulating film 13 on the drain electrode 12, and a transparent conductive thin film or metal thin film such as ITO (indium tin oxide film) is deposited by sputtering, for example, by 50 to 100 nm. Thereafter, the pixel electrode 15 is formed by patterning into a predetermined shape. The third interlayer insulating film 13 is a film for the purpose of flattening the surface of the pixel electrode 15, and although acrylic resin is used in the present embodiment, the material is not particularly limited.
[0039]
In the present embodiment, an example is shown in which the first interlayer insulating film 7 and the second interlayer insulating film 9 are formed of SiNx films, but this has a high dielectric constant (5.5 to 7.0) of the SiNx films. This is because the capacitance per area can be increased, which is considered to be suitable as a dielectric film for forming the capacitance. However, the interlayer insulating film may be appropriately determined in consideration of the insulating properties, the ease of film formation, and the like, and is not limited to this. Therefore, as the interlayer insulating film, SiO ₂ Film, aluminum oxide film (hereinafter referred to as Al ₂ O ₃ A film) or the like may be used. In addition, the material, the film thickness, and the like are examples, and are not limited thereto, and may be determined as appropriate.
[0040]
As described above, this embodiment does not use the gate insulating film as a dielectric film as in the prior art, but uses a dedicated dielectric film to form a capacitor. Therefore, an optimum dielectric film can be selected and used from various materials in order to form a required capacitance without considering the influence on the TFT.
[0041]
In addition, since the auxiliary capacitance is formed below the drain electrode, the dielectric film and the capacitance electrode do not get over the drain electrode having a relatively thick film thickness. Therefore, there is almost no risk of occurrence of defects such as disconnection of the capacitor electrode in the capacitor forming portion, and it is not necessary to require a high step coverage for the dielectric film.
[0042]
Further, since the capacitor electrode is formed in parallel with the source wiring, a capacitance is formed at a portion intersecting with the gate wiring, but there is almost no influence such as an increase in parasitic capacitance serving as a load on the source wiring.
[0043]
The capacitor electrode intersects with the gate wiring, but the steep step due to the gate wiring is considerably mitigated by the gate insulating film and the first interlayer insulating film on the gate wiring, and the possibility of disconnection at that portion is extremely high. It is running low.
[0044]
In addition, the capacitance electrode is less required to have a low resistance as compared with the signal wiring or the like, and therefore, it is not necessary to form a thick film. Therefore, a steep step due to the formation of the capacitor electrode is not generated, and it can be easily covered with the dielectric film, and disconnection of the second electrode formed in the upper layer can be prevented. Furthermore, the effect is further improved by providing the capacitor electrode with a taper.
[0045]
As described above, according to this embodiment, since the auxiliary capacitance is formed below the source electrode, it is possible to form a sufficient auxiliary capacitance with a small area without impairing the flatness of the surface of the pixel electrode. become. Further, as compared with the case where a capacitor electrode is formed over the source electrode and the drain electrode, the level difference is remarkably reduced, and disconnection or the like hardly occurs.
[0046]
(Embodiment 2)
Hereinafter, other embodiments of the present invention will be described. FIG. 6 is a schematic diagram showing a cross section of a TFT according to an embodiment of the present invention, and FIG. 7 is a schematic diagram showing a plane of the TFT according to an embodiment of the present invention. FIG. 6 shows a cross section of the portion indicated by AA ′ in FIG.
[0047]
As shown in FIGS. 6 and 7, the TFT according to the present embodiment has the following configuration. SiO 2 on an insulating substrate 1 such as glass ₂ A base coat film 2 made of a film or the like is deposited, on which a TFT active layer 3 made of a silicon thin film is formed in a predetermined shape. ₂ An insulating film such as a film is deposited to form the gate insulating film 4. A gate electrode 5 made of a metal material such as aluminum is formed in a predetermined shape on the active layer 3 with the gate insulating film 4 interposed therebetween.
[0048]
Here, a contact region 6 into which impurity ions are implanted is formed in the active layer 3, and a first interlayer insulating film 7 is formed by depositing an insulating film over the entire surface. Further, a capacitor electrode 8 patterned in a predetermined shape is formed thereon, and a second interlayer insulating film 9 is formed so as to cover at least the capacitor electrode 8.
[0049]
Contact holes 10 are opened in the interlayer insulating films 7 and 9 and the gate insulating film 4 above the contact region 6, and a source electrode 11 and a drain electrode 12 made of a metal material such as Al are formed to form the contact region 6. Are connected to each.
[0050]
Then, an insulating film is deposited on the entire surface to form a third interlayer insulating film 13, and a shield electrode 16 patterned in a predetermined shape is further formed thereon so as to cover at least the shield electrode 16. A fourth interlayer insulating film 17 is formed.
[0051]
Further, a contact hole 14 is opened in the third and fourth interlayer insulating films 13 and 17 above the drain electrode 12, and a metal material or a transparent conductive thin film is formed so as to be electrically connected to the drain electrode 12. The pixel electrode 15 is formed by depositing, whereby the TFT in this embodiment is completed.
[0052]
Thus, as shown in FIGS. 6 and 7, the TFT according to the present embodiment has an auxiliary capacitance C1 due to the drain electrode 12 of the TFT and the capacitive electrode 8 provided below the dielectric electrode. The auxiliary capacitance C2 is provided via the dielectric film by the drain electrode 12 of the TFT and the shield electrode 16 provided above the dielectric electrode through the dielectric film. An auxiliary capacitor C3 is formed by the pixel electrode 15, respectively.
[0053]
Here, the manufacturing process of the TFT according to this embodiment will be described in more detail. 8A to 8B are process diagrams showing cross sections in each manufacturing process of the TFT according to the embodiment of the present invention. In the TFT of this embodiment, the manufacturing process until the auxiliary capacitor C1 is formed by the drain electrode 12 is the same as that of Embodiment 1 described above, and thus detailed description thereof is omitted here.
[0054]
As shown in FIG. 8A, after the capacitor electrode 8, the second interlayer insulating film 9, the source electrode 11 and the drain electrode 12 are formed in a predetermined film thickness and shape, the third interlayer insulating film 13 is formed. Form a film. Next, a shield electrode 16 made of a metal thin film and having a function of shielding light and electric field is formed on the third interlayer insulating film 13 to a thickness of about 200 nm. As shown in FIG. 7, the shield electrode 16 is disposed so as to shield the gate electrode 5 and the source electrode 11.
[0055]
Usually, an electric field is generated in the vicinity of the wiring such as the gate electrode 5, and the pixel electrode 15 disposed in the vicinity of these wirings is affected by the influence. This influence is a state in which electric field disturbance occurs in the portion along the wiring of the pixel electrode 15 due to the electric field generated from the electrode and the wiring, and accordingly, the alignment of the liquid crystal molecules in that portion is impaired. It is a thing that ends up. Further, when a capacitance is formed between the source electrode 11 and the pixel electrode 15, there may be a problem in display such as crosstalk depending on the size. However, by arranging the shield electrode 16 so as to shield the gate electrode 5 and the source electrode 11 as in the present embodiment, the electric field generated from the electrode and the wiring is cut off, and the influence on the pixel electrode 15 is suppressed. The effect can be obtained and the occurrence of crosstalk can be prevented.
[0056]
In addition, the metal thin film which comprises this shield electrode 16 is not specifically limited, What is necessary is just to determine a film thickness suitably. However, if the film thickness is too thin, the light-shielding property is lowered and the resistance is increased. Therefore, it is desirable to have a film thickness of 150 nm to 200 nm or more. Although not shown, the shield electrode 16 is connected to a common electrode formed on the counter substrate side.
[0057]
Next, as shown in FIG. 8B, a fourth interlayer insulating film 17 is formed on the entire surface including on the shield electrode 16, and the third interlayer insulating film 13 and the fourth interlayer insulating film 17 are formed. After the contact hole 14 reaching the drain electrode 12 is opened, an ITO or metal thin film is formed and patterned into a predetermined shape to form the pixel electrode 15.
[0058]
According to this embodiment, the shield electrode 16 is connected to the common electrode, and also has a function as a capacitive electrode. Accordingly, the auxiliary capacitance is also formed between the shield electrode 16 and the pixel electrode 15 and between the shield electrode 16 and the drain electrode 12, and the auxiliary capacitance formed between the lower capacitance electrode 8 and the drain electrode 12. In addition, a large capacity can be secured.
[0059]
(Embodiment 3)
Hereinafter, other embodiments of the present invention will be described. FIG. 9 is a schematic diagram showing a cross section of a TFT according to an embodiment of the present invention, and FIG. 10 is a schematic diagram showing a plane of the TFT according to an embodiment of the present invention. FIG. 9 shows a cross section of the portion indicated by AA ′ in FIG.
[0060]
As shown in FIGS. 9 and 10, the TFT according to the present embodiment has the following configuration. SiO 2 on an insulating substrate 1 such as glass ₂ A base coat film 2 made of a film or the like is deposited, on which a TFT active layer 3 made of a silicon thin film is formed in a predetermined shape. ₂ An insulating film such as a film is deposited to form the gate insulating film 4. A gate electrode 5 made of a metal material such as aluminum is formed in a predetermined shape on the active layer 3 with the gate insulating film 4 interposed therebetween.
[0061]
Here, a contact region 6 into which impurity ions are implanted is formed in the active layer 3, and a first interlayer insulating film 7 is formed by depositing an insulating film over the entire surface. Further, a capacitor electrode 8 patterned in a predetermined shape is formed thereon, and an anodic oxide film 18 is formed so as to cover the capacitor electrode 8.
[0062]
Contact holes 10 are opened in the interlayer insulating films 7 and 9 and the gate insulating film 4 above the contact region 6, and a source electrode 11 and a drain electrode 12 made of a metal material such as Al are formed to form the contact region 6. Are connected to each.
[0063]
Thereafter, a resin insulating film 13 is formed by applying polyimide resin, acrylic resin, or the like on the entire surface, a contact hole 14 is opened in the insulating film 13, and Cr, so as to be electrically connected to the drain electrode 12. A metal material such as Ni or a transparent conductive thin film such as ITO is deposited and patterned into a predetermined shape to form the pixel electrode 15 to complete the TFT in this embodiment.
[0064]
Thus, as shown in FIGS. 9 and 10, the TFT according to the present embodiment includes the auxiliary capacitor C1 by the drain electrode 12 of the TFT and the capacitor electrode 8 provided below the TFT via the dielectric film. Further, the dielectric film for forming the auxiliary capacitor is formed by anodizing the capacitor electrode.
[0065]
Here, the manufacturing process of the TFT according to this embodiment will be described in more detail. 11A to 11D are process diagrams showing cross sections in each manufacturing process of the TFT according to the embodiment of the present invention. Note that the TFT according to this embodiment has the same manufacturing process as that of the first embodiment described above until the first interlayer insulating film is formed, and therefore detailed description thereof is omitted here.
[0066]
As shown in FIG. 11A, a metal thin film such as tantalum or aluminum that can be anodized is deposited to a thickness of about 150 nm by sputtering, for example, and then patterned into a predetermined shape to form the capacitor electrode 8. It is also effective to provide a taper at the end of the capacitor electrode 8 so that the step does not become steep. The capacitor electrode 8 is formed in parallel with the source wiring. Although not shown, the wiring extending from the capacitor electrode 8 is bundled outside the display region and connected so as to have the same potential as the common electrode on the counter substrate side.
[0067]
Next, as shown in FIG. 11B, the capacitor electrode 8 is anodized to form an anodized film 18 on the surface. This anodic oxide film 18 becomes a dielectric film for forming an auxiliary capacitance. In the case of tantalum, an aqueous solution of citric acid, an aqueous solution of tartaric acid, an aqueous solution of boric acid or the like can be used as the electrolytic solution for such anodization. In the case of aluminum, an aqueous solution of tartaric acid and ethylene glycol can be used. Can be used. In the case of aluminum, a nonporous insulating film can be formed by using a weak electrolyte solution. The film thickness can be controlled by the applied voltage.
[0068]
Next, as shown in FIG. 12C, a contact hole 10 is opened in the insulating film on the contact region 6 of the semiconductor layer 3, a metal thin film is deposited by, for example, sputtering, and then patterned into a predetermined shape. Thus, the source electrode 11 and the drain electrode 12 are formed. As the source electrode 11 and the drain electrode 12, an aluminum alloy or a laminated film of an aluminum alloy and a refractory metal such as titanium can be used. The portion of the drain electrode 12 thus formed that overlaps the capacitor electrode 8 through the anodic oxide film 18 also serves as one electrode constituting the auxiliary capacitor. In addition, the source electrode 11 needs to have a resistance as small as possible in order to minimize signal delay, and is preferably formed to have a thickness of about 500 nm to 800 nm in consideration of the width of the wiring.
[0069]
Next, as shown in FIG. 12D, a third interlayer insulating film 13 is formed on the entire surface including the source electrode 11 and the drain electrode 12. Next, a contact hole 14 is opened in the third interlayer insulating film 13 on the drain electrode 12, and ITO (indium tin oxide film) or a metal thin film is deposited, for example, by sputtering to 50 to 100 nm, and then patterned into a predetermined shape. Thus, the pixel electrode 15 is formed. The third interlayer insulating film 13 is a film for the purpose of flattening the surface of the pixel electrode 15. In this embodiment, acrylic resin is used, but the material is not particularly limited.
[0070]
According to the present embodiment, since the dielectric film for forming the auxiliary capacitance is formed by the anodic oxide film formed by anodizing the capacitor electrode, the dielectric film self-aligns with the capacitor electrode. A dielectric film can be formed. That is, an insulating film is not formed in a region other than the region where the auxiliary capacitor is formed, and the light transmitted through the region is not attenuated more than necessary, so that the display brightness is not lowered. Further, since the film formed by anodic oxidation is in close contact with the capacitor electrode as a matter of course, the coverage is good. Furthermore, since the film thickness can be easily set to some extent by controlling the applied voltage, the facilities are simplified, and there are many advantages in manufacturing the TFT.
[0071]
In the first to third embodiments described above, the coplanar TFT is described as an example. However, the TFT used in the present invention is not limited to this, and can be easily applied to, for example, a bottom gate TFT. Is possible.
[0072]
【The invention's effect】
As described above, the present invention provides a liquid crystal display device having a good display quality, and solves the problem in forming the auxiliary capacitor of the TFT necessary for that purpose.
[0073]
According to the present invention, the interlayer insulating film between the gate electrode and the source electrode of the TFT has a two-layer structure, the capacitor electrode is formed between the two interlayer insulating films, and the drain formed simultaneously with the source electrode Since the auxiliary capacitor is formed between the electrode and the capacitor electrode, the dielectric film for forming the auxiliary capacitor does not directly affect the characteristics of the TFT, and any insulation with a high dielectric constant A storage capacitor can be formed using a film. Therefore, even in a liquid crystal display device with a small pixel size, it is possible to form a sufficient auxiliary capacity, and a good display quality can be obtained, and restrictions on manufacturing TFTs can be greatly relaxed. Is possible.
[0074]
In addition, since the auxiliary capacitance is formed in a region below the drain electrode of the TFT, a film that promotes surface flatness can be disposed between the drain electrode and the pixel electrode. No unnecessary irregularities are generated on the surface of the pixel electrode formed on the substrate. Therefore, alignment disorder of liquid crystal molecules due to unevenness on the surface of the pixel electrode does not occur, and it is possible to realize a good display quality.
[0075]
As described above, the thin film transistor of the present invention realizes both the formation of the auxiliary capacitance, which is a problem in forming the auxiliary capacitance, the maintenance of the TFT characteristics, and the ensuring of the flatness of the pixel electrode surface. The image display device indispensable to the information society, particularly a liquid crystal display device or a portable device equipped with the same, has a great effect on improving performance and added value.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a TFT according to Embodiment 1 of the present invention.
FIG. 2 is a plan view showing a TFT according to Embodiment 1 of the present invention.
FIGS. 3A and 3B are cross-sectional views showing a manufacturing process of a TFT according to the first embodiment of the present invention.
4 (c) and 4 (d) are cross-sectional views showing a manufacturing process of a TFT according to the first embodiment of the present invention.
FIGS. 5E and 5F are cross-sectional views showing the manufacturing steps of the TFT according to the first embodiment of the present invention.
FIG. 6 is a cross-sectional view showing a TFT according to Embodiment 2 of the present invention.
FIG. 7 is a plan view showing a TFT according to Embodiment 2 of the present invention.
FIGS. 8A and 8B are cross-sectional views showing a manufacturing process of a TFT according to the second embodiment of the present invention.
FIG. 9 is a cross-sectional view showing a TFT according to Embodiment 3 of the present invention.
FIG. 10 is a plan view showing a TFT according to Embodiment 3 of the present invention.
FIGS. 11A and 11B are cross-sectional views showing a manufacturing process of a TFT according to the third embodiment of the present invention.
FIGS. 12C and 12D are cross-sectional views showing a manufacturing process of a TFT according to the third embodiment of the present invention.
FIG. 13 is a cross-sectional view showing an example of a conventional TFT.
FIG. 14 is a cross-sectional view showing an example of a conventional TFT.
[Explanation of symbols]
1 Substrate
2 Base coat film
3 Semiconductor layer
4 Gate insulation film
5 Gate electrode
6 Contact area
7 First interlayer insulating film
8 capacitive electrodes
9 Second interlayer insulating film
10 Contact hole
11 Source electrode
12 Drain electrode
13 Third interlayer insulating film
14 Contact hole
15 Pixel electrode
16 Shield electrode
17 Fourth interlayer insulating film
18 Anodized film
C1 Auxiliary capacity
C2 auxiliary capacity
C3 Auxiliary capacity

Claims (2)

A gate electrode; an active layer including a pair of contact regions implanted with impurities; a gate insulating film provided between the gate electrode and the active layer; a first interlayer insulating film covering the gate insulating film and the gate electrode And a second interlayer insulating film covering the first interlayer insulating film, a source electrode connected to one contact region of the active layer through a contact hole formed in a stacked film of the second interlayer insulating film, the gate insulating film and the second interlayer insulating film A drain electrode connected to the other contact region of the active layer through a contact hole formed in a laminated film of one interlayer insulating film and a second interlayer insulating film, and a third interlayer insulating covering the drain electrode In a thin film transistor having a pixel electrode connected to the drain electrode through a contact hole formed in the film, and having an auxiliary capacitor for holding the potential of the pixel electrode,
Capacitance electrode formed so that the auxiliary capacitance does not overlap each contact region of the active layer made of a thin film mainly composed of silicon between the first interlayer insulating film and the second interlayer insulating film When a thin film transistor which is characterized by being composed with the previous SL drain electrode by said second interlayer insulating film sandwiched between the capacitor electrode and the drain electrode. Wherein between the third interlayer insulating film and the pixel electrode, the fourth interlayer insulating film is sandwiched, between the said third interlayer insulating film and the fourth interlayer insulating film, said gate electrode and A shield electrode for shielding the source electrode is provided,
2. The thin film transistor according to claim 1, wherein second and third auxiliary capacitors are formed between the drain electrode and the shield electrode and between the shield electrode and the pixel electrode.

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