JP2000091585A - Thin-film transistor and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form sufficient capacitance without affecting characteristics, etc., by forming an auxiliary capacitance which holds an insulation film by a capacitance electrode, which is a first electrode formed in an upper layer of an active layer of a thin-film transistor and a second electrode formed in an upper layer thereof. SOLUTION: A layer insulation film between a gate electrode 5 and a source electrode 11 of a thin-film transistor(TFT) is formed to a structure of two layers 7, 9, a capacitance electrode 8 is formed between the two layer insulation films 7, 9, and an auxiliary capacitance C1 is formed between a drain electrode 12 formed at the same time as the source electrode 11 and the capacitance electrode 8. Therefore, an auxiliary capacitance C1 can be formed by using an arbitrary insulation film of high dielectric constant, such as SiNx without direct influence of a dielectric film for forming the auxiliary capacitance C1 on characteristics, etc., of a TFT. Consequently, even if the pixel size of a liquid crystal display device is small, sufficient auxiliary capacitance can be formed, and good display quality quality can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a thin film transistor used in an active matrix type liquid crystal display device and a method of manufacturing the same, and more particularly to a storage capacitor provided for each pixel.

[0002]

2. Description of the Related Art In recent years, semiconductor devices represented by ICs and LSIs, electronic devices and home appliances incorporating these semiconductor devices have been developed, manufactured, and sold in large quantities on the market. Today, not only TV receivers,
VTRs, personal computers, and the like are also widely used. The performance of these devices has been improving year by year, and has become indispensable in the modern society as a tool for providing a lot of information to users with the progress of the information society.

[0003] Many of the above-mentioned devices are provided with a means for displaying information for accurately transmitting a large amount of information to a user, that is, a so-called display. And the amount of information is affected, there is a strong interest in development trends and the like. Particularly in recent years, liquid crystal display devices as displays having the advantages of being thin, lightweight, and low power consumption,
Among them, a thin film transistor (hereinafter referred to as a TFT) for each pixel electrode
Call. ), And an active matrix liquid crystal display device that controls each pixel electrode.
Attention has been paid to such reasons as excellent resolution and a clear image. Hereinafter, this liquid crystal display device will be described.

As a semiconductor element used in a conventional active matrix type liquid crystal display device, a TFT made of an amorphous silicon thin film is known, and at present, many active matrix type liquid crystal display devices equipped with this TFT are commercialized. ing. The active matrix type liquid crystal display device is going to occupy a mainstream position as a display for OA equipment and consumer equipment.

On the other hand, T using this amorphous silicon thin film
As a semiconductor element replacing the FT, there is a possibility that a pixel TFT for driving a pixel electrode and a driving circuit portion including a TFT for driving the pixel TFT and the like can be integrally formed on one substrate. There is great expectation for a technique for forming a TFT using a certain polycrystalline silicon thin film.

A polycrystalline silicon thin film has higher mobility than an amorphous silicon thin film used for a conventional TFT, and it is possible to form a high-performance TFT.
In addition, when the driving circuit portion for driving the pixel TFT is integrally formed on one inexpensive glass substrate or the like, it is not necessary to attach a driving circuit substrate including an IC or an LSI. The production cost is greatly reduced as compared with the conventional case.

In this active matrix type liquid crystal display device, an ITO (indium tin ox) is applied to a pixel electrode.
There are a transmission type liquid crystal display device using a transparent conductive thin film such as (ide) and a reflection type liquid crystal display device using a reflection electrode made of metal or the like for a pixel electrode. Originally, a liquid crystal display device is not a self-luminous display, so in the case of a transmissive liquid crystal display device, an illumination device, a so-called backlight, is arranged behind the liquid crystal display device, and display is performed by light incident from there. Is going. In the case of a reflective liquid crystal display device, display is performed by reflecting external incident light by a reflective electrode.

In the liquid crystal display device described above, a capacitor is formed by sandwiching a liquid crystal layer between a pixel electrode and a common electrode provided on the counter substrate side, and the potential of the pixel electrode is changed in response to an image signal. Display is performed by being kept at a predetermined potential for a certain period. However, discharge from a capacitor due to a leak current or the like when the TFT is off may attenuate the potential of the pixel electrode and deteriorate display. In order to prevent such a change in the potential of the pixel electrode, an auxiliary capacitance is usually formed in parallel with the above-described capacitor.

Many conventional storage capacitors use a gate insulating film as a dielectric film for forming a storage capacitor, for example, as shown in FIG. 13, and form a capacitor wiring or a gate wiring formed in the same layer as the gate wiring. Is formed as one electrode, and a dielectric film is interposed between the drain electrode and the pixel electrode. The reason is that a dielectric film can be formed simultaneously with the manufacture of the TFT, and a high-quality gate insulating film can be used for the dielectric film. An example of forming the storage capacitor by such a method is disclosed in, for example, Japanese Patent Publication No. 1-38333.

However, in the conventional method, since the gate insulating film is used as it is as a dielectric film for forming an auxiliary capacitance, the manufacturing method is relatively simple.
In many cases, the thickness and the like of the gate insulating film are subject to certain restrictions, for example, in order to ensure the performance of the TFT, and it has not been easy to achieve both the performance required for the gate insulating film and the dielectric film. In addition, since the capacitor wiring is formed in the same layer as the gate wiring, a sufficient capacity electrode area for forming an auxiliary capacitor sufficient for securing processing accuracy of the photolithography process and the etching process or a pixel aperture ratio is secured. It is difficult to perform such a process, and this tends to be more remarkable as the processing size of a TFT or the like becomes smaller.

As described above, with the conventional method, it has become extremely difficult to form a sufficient auxiliary capacitance with the increase in the definition of the liquid crystal display device.

For this reason, technical development regarding the formation of a dielectric film and a capacitor electrode for the purpose of forming an auxiliary capacitor or the structure of an auxiliary capacitor has been actively carried out.
As disclosed in JP-A-216067 or JP-A-8-43859, a method has been proposed in which a dielectric layer is sandwiched between a pixel electrode and a capacitor electrode to form an auxiliary capacitor. JP-A-5-216067 discloses that a capacitance electrode is formed of ITO which is a transparent conductive thin film. JP-A-8-43859 discloses that a capacitor electrode is formed simultaneously with a source wiring. It is shown that an auxiliary capacitance is formed between the pixel electrodes.

[0013]

As described above, when the gate insulating film of the TFT is also used as the dielectric film of the auxiliary capacitor, it is not easy to achieve both functions required. In other words, in order to function as a gate insulating film, priority is given to ensuring insulation and breakdown voltage to the extent that defects such as short circuits do not occur. In addition, in order to improve the characteristics of the TFT, the interface state and fixed charge must be reduced. Needed to be reduced. On the other hand, in order to function as a dielectric film, it is necessary to have a high dielectric constant capable of forming a capacitor capable of holding the potential of the pixel electrode, in addition to insulating properties and withstand voltage.

This is because good display characteristics and stable TFT characteristics can be obtained only when both of them are realized at the same time. For example, if the thickness of the gate insulating film is increased with priority given to insulation and breakdown voltage, the auxiliary capacitance is reduced and display characteristics are impaired. Conversely, the thickness of the gate insulating film is reduced with priority given to the auxiliary capacitance. As a result, sufficient insulation, withstand voltage, and the like cannot be ensured, and defects such as leaks and short circuits occur. Conventionally, a silicon oxide film (hereinafter, SiO ₂ film) is often selected as the gate insulating film from the viewpoint of TFT characteristics and prevention of occurrence of defects.

In order to avoid such inconvenience, for example, as shown in FIG. 14, a method has been proposed in which a dielectric layer is sandwiched between a pixel electrode and a capacitor electrode to form an auxiliary capacitor. I have. For example, JP-A-5-216067 and JP-A-8-43859 disclose a method of forming a storage capacitor by sandwiching a dielectric film between a capacitor electrode and a pixel electrode. For example, since the gate insulating film of the TFT and the dielectric film for forming the auxiliary capacitance are formed of different insulating films, an insulating film having a film thickness and a dielectric constant suitable for forming the auxiliary capacitance is arbitrarily selected. Can be used. Therefore, although the number of manufacturing steps is slightly increased, the degree of freedom in forming the auxiliary capacitance is greatly increased.

However, such a method naturally forms an auxiliary capacitance in the pixel electrode region, and therefore a capacitance electrode is necessarily formed below the pixel electrode. In the above-mentioned Japanese Patent Application Laid-Open No. H5-216067, an IT having a film thickness of about 1500 ° (150 nm) is used as a capacitor electrode.
It is shown that an O film is used, and a silicon nitride film (hereinafter, SiNx film) having a film thickness of about 2000 ° (200 nm) is deposited thereon. In Japanese Patent Application Laid-Open No. 8-43859, a capacitor electrode is formed using an aluminum film having a thickness of about 3000 (300 nm), and a 2000-nm thick film is formed thereon.
It is shown that a (200 nm) SiNx film is deposited. As described above, the capacitor electrode is formed of a conductive film such as a metal film. However, the capacitor electrode needs to have a certain thickness in order to prevent disconnection and the like, and a thin dielectric film is required in order to secure a sufficient auxiliary capacitance. If it is used, a large step occurs at that portion. Further, even if an organic film such as a resin is used as the dielectric film, if the film thickness is about 2,000 (200 nm), the effect of reducing the step due to the capacitance electrode is small, and the insulating property is insufficient, and the pixel electrode and the pixel electrode are insufficient. There is a possibility that short-circuit failure of the capacitor electrode may occur.

As described above, when an auxiliary capacitor is formed by sandwiching a dielectric layer between a pixel electrode and a capacitor electrode, it becomes difficult to maintain the flatness of the surface of the pixel electrode. It is desirable that the surface of the pixel electrode connected to the TFT be as flat as possible. If the flatness of the surface of the pixel electrode is lost, disorder in the alignment of liquid crystal molecules occurs and the display quality deteriorates. In particular, in a reflection type liquid crystal display device, if the flatness of the surface of the pixel electrode is lost, the reflection direction of incident light becomes non-uniform, and the display quality is remarkably impaired such as a decrease in luminance.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to obtain a stable and sufficient auxiliary capacitor which is easy to manufacture and has a flat surface of a pixel electrode. It is an object of the present invention to provide a structure of a thin film transistor which realizes a display device having good display characteristics, and a method of manufacturing the same, while maintaining compatibility with performance.

[0019]

According to the present invention, there is provided a thin film transistor having a gate electrode, a source electrode, a drain electrode, and a pixel electrode, wherein the thin film transistor includes an auxiliary capacitor for holding a potential of the pixel electrode. Capacitance is a capacitor electrode formed above the active layer of the thin film transistor made of a thin film containing silicon as a main component,
A second electrode formed above the capacitor electrode and below the pixel electrode, and at least one insulating film sandwiched between these electrodes; Therefore, the above object is achieved.

At this time, the semiconductor device includes the second electrode, the pixel electrode, and a third electrode disposed between at least two layers of insulating films sandwiched between these electrodes. Second and third storage capacitors may be formed between the electrode and the third electrode and between the third electrode and the pixel electrode.

Preferably, the second electrode is made of the same material as the source electrode and the drain electrode, and is formed so as to have substantially the same thickness as the source electrode and the drain electrode.

Preferably, at least one insulating film sandwiched between the capacitor electrode and the second electrode contains at least an oxide of the capacitor electrode.

The method for manufacturing a thin film transistor according to the present invention comprises:
In a method for manufacturing a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a pixel electrode, and including an auxiliary capacitor for holding a potential of the pixel electrode, at least an active layer including a thin film containing silicon as a main component is formed. Forming, forming a first insulating film on the active layer, forming a capacitor electrode on the first insulating film, and forming a second insulating film on the capacitor electrode Process and
Forming a second electrode so as to partially overlap the capacitor electrode with the second insulating film interposed therebetween, whereby the above object is achieved.

Further, according to a method of manufacturing a thin film transistor of the present invention, there is provided a method of manufacturing a thin film transistor having a gate electrode, a source electrode, a drain electrode and a pixel electrode, and having an auxiliary capacitor for holding the potential of the pixel electrode. At least a step of forming an active layer made of a thin film containing silicon as a main component, a step of forming a first insulating film on the active layer, and a step of forming a capacitor electrode on the first insulating film Forming a second insulating film on the capacitor electrode; forming a second electrode on the capacitor electrode so as to partially overlap the capacitor electrode with the second insulating film interposed therebetween; Forming a third insulating film thereon, forming a third electrode so as to partially overlap the second electrode via the third insulating film, and forming a third insulating film on the third electrode. Forming a fourth insulating film; And forming a pixel electrode so as to partially overlap through said fourth insulating film serial third electrodes are characterized in that it comprises, by its, the above-described object can be attained.

At this time, it is preferable that the step of forming the second insulating film is a step of forming an anodic oxide film on the surface of the capacitor electrode.

Hereinafter, the operation of the present invention will be described.

According to the thin film transistor of the present invention, TF
An auxiliary capacitor is formed by sandwiching an insulating film between a capacitor electrode which is a first electrode formed above the active layer of T and a second electrode formed above the active electrode. That is, since an insulating film different from the gate insulating film, for example, an insulating film having a larger dielectric constant than a SiO ₂ film, such as a SiNx film, is used as a dielectric film for forming an auxiliary capacitor, Thus, a sufficient capacity can be formed without affecting the characteristics.

Further, the distance between the second electrode and the pixel or TF
A shield electrode for shielding T is used as a capacitor electrode, and between the capacitor electrode as the first electrode and the second electrode, between the second electrode and the shield electrode, and between the shield electrode and the pixel electrode. Since the capacitance is formed at a total of three locations, a sufficient auxiliary capacitance can be ensured even in a small high definition panel.

The second electrode is formed of the same material and the same thickness as the source electrode and the drain electrode of the TFT, or is formed by extending the drain electrode when forming the source electrode and the drain electrode. As a result, the film is formed to be relatively thick, so that the possibility of occurrence of disconnection in the capacitor forming portion can be suppressed to a low level.

Further, since the oxide of the capacitor electrode, particularly, the anodic oxide film is used for the dielectric film, the dielectric film can be formed in a self-aligned manner with the capacitor electrode. Further, since such a film is a film formed by anodic oxidation, it naturally adheres to the capacitor electrode, and therefore, has good coverage. Further, the film thickness can be set to some extent easily by controlling the applied voltage.

[0031]

(Embodiment 1) An embodiment of the present invention will be described below. FIG. 1 is a schematic diagram showing a cross section of a TFT according to an embodiment of the present invention.
1 is a schematic view showing a plane of a TFT according to an embodiment of the present invention. FIG. 1 shows a cross section of a portion indicated by AA ′ in FIG.

As shown in FIGS. 1 and 2, the TFT according to the present embodiment generally has the following configuration. A base coat film 2 made of a SiO ₂ film or the like is deposited on an insulating substrate 1 made of glass or the like, and an active layer 3 of a TFT made of a silicon thin film is formed thereon in a predetermined shape.
An insulating film such as a SiO ₂ film is deposited on the active layer 3 to form a gate insulating film 4. On this active layer 3, a gate electrode 5 made of a metal material such as aluminum is formed in a predetermined shape with the gate insulating film 4 interposed therebetween.

Here, a contact region 6 into which impurity ions are implanted is formed in the active layer 3, and an insulating film is deposited on the entire surface covering the contact region 6 to form a first interlayer insulating film 7. I have. Further, a capacitor electrode 8 patterned in a predetermined shape is formed thereon, and a second interlayer insulating film 9 is formed so as to cover at least the capacitor electrode 8.

Contact holes 10 are formed in interlayer insulating films 7 and 9 and gate insulating film 4 above contact region 6.
Are formed, and a source electrode 11 and a drain electrode 12 made of a metal material such as Al are formed and connected to the contact region 6, respectively.

Thereafter, a polyimide resin, an acrylic resin, or the like is applied to the entire surface to form a resin insulating film 13, and a contact hole 14 is opened in the insulating film 13 so as to be electrically connected to the drain electrode 12. Then, a metal material such as Cr or Ni or a transparent conductive thin film such as ITO is deposited and patterned into a predetermined shape to form the pixel electrode 15, thereby completing the TFT according to the present embodiment.

As described above, the TFT according to the present embodiment is:
As shown in FIG. 1 and FIG.
A storage capacitor C1 is formed by the capacitor 2 and a capacitor electrode 8 provided thereunder via a dielectric film. On the drain electrode 12, an insulating film 13 made of a resin film or the like having a sufficient film thickness to make the surface irregularities substantially flat is formed. Therefore, the surface of the pixel electrode 15 has good flatness despite the formation of the auxiliary capacitance C1 below the pixel electrode 15.

Here, the manufacturing process of the TFT according to the present embodiment will be described in more detail. 3 (a) to 5
(F) is a process drawing showing a cross section in each manufacturing process of the TFT according to the embodiment of the present invention.

As shown in FIG. 3A, an SiNx film or SiO ₂ film or a laminated film of these films is formed on a substrate 1 such as glass by, for example, plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition).
Vapor Deposition: Hereinafter, referred to as a plasma CVD method. ) To deposit 100 nm to 500 nm to form the base coat film 2. The substrate 1 may be made of aluminoborosilicate glass or the like having a high strain point. However, the present invention is not affected by the material of the substrate at all, and a material other than glass may be used if necessary. It can be used as the substrate 1. For example,
A quartz substrate or a silicon wafer may be used.

Next, a semiconductor thin film such as an amorphous silicon thin film is formed by a plasma CVD method for 25 nm to 200 nm.
m, desirably a thickness of about 30 nm to 70 nm, and heat treatment to form a semiconductor layer 3 of a polycrystalline silicon thin film. As a heat treatment method, a thermal annealing method, a laser annealing method, or the like can be used, and there is no need to particularly limit the heat treatment method. The semiconductor layer 3 can be made of a semiconductor material containing silicon as a main component, such as an amorphous silicon thin film or a microcrystalline silicon thin film, other than the polycrystalline silicon thin film.

Next, as shown in FIG. 3B, after the semiconductor layer 3 is patterned into an island shape, an SiO ₂ film is deposited to a thickness of about 100 nm using an organic silane material such as TEOS (tetraethylorthosilicate). And the gate insulating film 4
To form This gate insulating film 4 is formed by plasma CVD.
The film may be formed by a method, a normal pressure CVD method, a sputtering method, or the like. Next, a metal thin film is deposited on the gate insulating film 4 to a thickness of about 200 nm to 400 nm by, for example, a sputtering method, and then patterned into a predetermined shape to form the gate electrode 5. An aluminum alloy or the like can be used as the metal thin film.

Next, as shown in FIG. 4C, an impurity ion, for example, a Group V element such as phosphorus or a compound thereof, or a Group III element such as boron or a compound thereof is accelerated from above the gate electrode 5 with an acceleration voltage of 50 keV. ~ 100keV
To form a contact region 6 in the semiconductor layer 3. In the present embodiment, the contact region 6 is formed in a self-aligned manner using the gate electrode 5 as a mask. However, an impurity may be introduced by forming an impurity implantation mask with a resist or the like. Next, an SiNx film is formed on the entire surface including the gate electrode 5 by, for example, a plasma CVD method.
The first interlayer insulating film 7 is formed by depositing about 1 nm to 500 nm.

Next, as shown in FIG. 4D, a metal thin film of titanium or the like is deposited by sputtering, for example.
A capacitor electrode 8 is formed by depositing about 0 nm and then patterning it into a predetermined shape. It is also effective to provide a taper at the end of the capacitor electrode 8 during patterning so that the step does not become steep. As the capacitor electrode 8, a multilayer film of aluminum and titanium or another metal may be used. Also, this capacitance electrode 8
It is formed in parallel with the source wiring. Although not shown,
The wiring extending from the capacitor electrode 8 is bundled outside the display area and connected to have the same potential as the common electrode on the counter substrate side. Next, so as to cover at least the capacitance electrode 8,
An SiNx film is deposited to a thickness of about 60 nm by, for example, a plasma CVD method, and a second interlayer insulating film 9 which is a dielectric film for forming an auxiliary capacitance is formed.

Next, as shown in FIG. 5E, a contact hole 10 is opened in the insulating film on the contact region 7 of the semiconductor layer 3, and a metal thin film is deposited by, for example, a sputtering method. And a source electrode 11 and a drain electrode 12 are formed. For the source electrode 11 and the drain electrode 12, an aluminum alloy or a laminated film of an aluminum alloy and a high melting point metal such as titanium can be used. A portion of the drain electrode 12 thus formed, which overlaps with the capacitor electrode 8 via the second interlayer insulating film 9, also serves as one electrode forming an auxiliary capacitor. Further, in order to minimize signal delay, the source electrode 11 needs to have a resistance as small as possible, and is desirably formed to have a thickness of about 500 nm to 800 nm.

In this embodiment, an example is shown in which one of the electrodes constituting the storage capacitor is formed by extending a part of the drain electrode 12, but a separate electrode separated from the source electrode 11 and the drain electrode 12 of the TFT is shown. Formed as a pattern,
The connection may be made later. Also, as in the present embodiment, if the source electrode 11 and the drain electrode 12 are formed simultaneously, it is preferable to have the effect of simplifying the process. However, even if they are separately formed, the formation of the auxiliary capacitance itself is not affected. It has no effect.

Next, as shown in FIG. 5F, a third interlayer insulating film 13 is formed on the entire surface including the source electrode 11 and the drain electrode 12. Next, the drain electrode 12
A contact hole 14 is opened in the third interlayer insulating film 13 above, and a transparent conductive thin film such as ITO (indium tin oxide film) or a metal thin film is formed by sputtering, for example.
The pixel electrode 15 is formed by depositing 0 to 100 nm and then patterning it into a predetermined shape. Third interlayer insulating film 13
Is a film for the purpose of planarizing the surface of the pixel electrode 15. In this embodiment, an acrylic resin is used. However, the material is not particularly limited.

In the present embodiment, an example has been shown in which the first interlayer insulating film 7 and the second interlayer insulating film 9 are formed of a SiNx film, but this is because the dielectric constant (5.5 to 7.0) of the SiNx film is used. ) Is high, and the capacitance per area can be increased, which is considered to be suitable as a dielectric film forming the capacitance. However, the interlayer insulating film may be appropriately determined in consideration of insulation properties, ease of film formation, and the like, and is not limited thereto. Therefore, as an interlayer insulating film, a SiO ₂ film, an aluminum oxide film (hereinafter, Al ₂ O)
₃ ) may be used. In addition, the material, the film thickness, and the like are merely examples, and are not limited thereto, and may be determined as appropriate.

As described above, in the present embodiment, instead of using the gate insulating film as a dielectric film as in the conventional case, a dedicated dielectric film is used to form a capacitor. Therefore, an optimum dielectric film can be selected and used from various materials in order to form a required capacitance without considering the influence on the TFT.

Further, since the auxiliary capacitance is formed below the drain electrode, the dielectric film and the capacitance electrode do not cross over the drain electrode having a relatively large thickness. Therefore, there is almost no danger that a defect such as disconnection of the capacitance electrode in the capacitance formation portion occurs, and it is not necessary to require a high step coverage for the dielectric film.

Further, since the capacitance electrode is formed in parallel with the source wiring, a capacitance is formed at a portion intersecting with the gate wiring, but there is almost no influence such as an increase in parasitic capacitance acting as a load on the source wiring. .

Although the capacitor electrode intersects with the gate wiring, a steep step due to the gate wiring is considerably reduced by the gate insulating film on the gate wiring and the first interlayer insulating film. Sex is extremely low.

Further, the capacitance electrode is compared with the signal wiring and the like.
There is little need for itself to have low resistance, so that it is not necessary to form a thick film. Therefore, the capacitor electrode can be easily covered with the dielectric film without causing a steep step due to the formation of the capacitor electrode, and disconnection of the second electrode formed in the upper layer can be prevented. Further, by providing the capacitor electrode with a taper, the effect is further improved.

As described above, according to this embodiment, since the auxiliary capacitance is formed below the source electrode, a sufficient auxiliary capacitance can be formed with a small area without impairing the flatness of the surface of the pixel electrode. It becomes possible. Further, as compared with the case where a capacitor electrode is formed in a layer above the source electrode and the drain electrode, the structure has a structure in which steps are significantly reduced and disconnection or the like is less likely to occur.

Embodiment 2 Hereinafter, another embodiment of the present invention will be described. FIG. 6 is a schematic diagram showing a cross section of the TFT according to the embodiment of the present invention, and FIG. 7 is a schematic diagram showing a plane of the TFT according to the embodiment of the present invention. FIG. 6 shows a cross section of a portion indicated by AA 'in FIG.

As shown in FIGS. 6 and 7, the TFT according to the present embodiment has the following general configuration. A base coat film 2 made of a SiO ₂ film or the like is deposited on an insulating substrate 1 made of glass or the like, and an active layer 3 of a TFT made of a silicon thin film is formed thereon in a predetermined shape.
An insulating film such as a SiO ₂ film is deposited on the active layer 3 to form a gate insulating film 4. On this active layer 3, a gate electrode 5 made of a metal material such as aluminum is formed in a predetermined shape with the gate insulating film 4 interposed therebetween.

Here, a contact region 6 into which impurity ions are implanted is formed in the active layer 3, and an insulating film is deposited on the entire surface covering the contact region 6 to form a first interlayer insulating film 7. I have. Further, a capacitor electrode 8 patterned in a predetermined shape is formed thereon, and a second interlayer insulating film 9 is formed so as to cover at least the capacitor electrode 8.

Contact holes 10 are formed in interlayer insulating films 7 and 9 and gate insulating film 4 above contact region 6.
Are formed, and a source electrode 11 and a drain electrode 12 made of a metal material such as Al are formed and connected to the contact region 6, respectively.

Then, an insulating film is deposited on the entire surface to form a third interlayer insulating film 13, on which a shield electrode 16 patterned in a predetermined shape is formed. A fourth interlayer insulating film 17 is formed to cover.

The third and fourth interlayer insulating films 13 and 17 above the drain electrode 12 have contact holes 1.
The pixel electrode 15 is formed by depositing a metal material or a transparent conductive thin film so as to be electrically connected to the drain electrode 12, thereby completing the TFT according to the present embodiment.

As described above, the TFT according to the present embodiment is
As shown in FIG. 6 and FIG.
2 and a capacitor electrode 8 provided thereunder via a dielectric film
Form the auxiliary capacitance C1 and T
The storage capacitor C2 is formed by the FT drain electrode 12 and the shield electrode 16 provided thereabove via a dielectric film.
However, the storage capacitor C3 is formed by the shield electrode 16 and the pixel electrode 15 provided above the shield electrode 16 via a dielectric film.

Here, the manufacturing process of the TFT according to the present embodiment will be described in more detail. FIGS. 8A and 8B
FIG. 4 is a process chart showing a cross section in each manufacturing process of the TFT according to the embodiment of the present invention. Note that the manufacturing process of the TFT according to the present embodiment up to the formation of the auxiliary capacitance C1 by the drain electrode 12 is the same as that of the above-described first embodiment, and thus a detailed description up to that portion is omitted here.

As shown in FIG. 8A, after forming the capacitor electrode 8, the second interlayer insulating film 9, the source electrode 11 and the drain electrode 12 to a predetermined thickness and shape, a third interlayer insulating film is formed. The film 13 is formed. Next, the third interlayer insulating film 1
A shield electrode 16 made of a metal thin film and having a function of shielding light and an electric field is formed to a thickness of about 200 nm on the third electrode 3. As shown in FIG. 7, the shield electrode 16 is arranged so as to shield the gate electrode 5 and the source electrode 11.

Normally, an electric field is generated in the vicinity of the wiring such as the gate electrode 5 and the like, and the pixel electrode 1 disposed in the vicinity of the wiring is formed.
5 will be affected by this. This effect is a state in which the electric field generated by the electrodes and the wiring causes a disturbance of the electric field particularly at a portion of the pixel electrode 15 along the wiring, and the alignment of the liquid crystal molecules at the portion is impaired. It is to put it. Further, when a capacitance is formed between the source electrode 11 and the pixel electrode 15, a display problem such as crosstalk may be caused depending on the size. However, by arranging the shield electrode 16 so as to shield the gate electrode 5 and the source electrode 11 as in the present embodiment, the electric field generated from the electrode and the wiring is cut off, and the influence on the pixel electrode 15 is suppressed. The effect can be obtained, and the occurrence of crosstalk can be prevented.

The metal thin film forming the shield electrode 16 is not particularly limited, and the thickness may be determined appropriately. However, if the film thickness is too small, the light-shielding property is reduced and the resistance is increased.
It is desirable to have a film thickness of nm or more. Although not shown, the shield electrode 16 is connected to a common electrode formed on the counter substrate side.

Next, as shown in FIG. 8B, a fourth interlayer insulating film 17 is formed on the entire surface including the portion above the shield electrode 16, and the third interlayer insulating film 13 and the fourth interlayer insulating film 17 are formed. Membrane 1
After opening a contact hole 14 reaching the drain electrode 12 at 7, an ITO or metal thin film is formed and patterned into a predetermined shape to form a pixel electrode 15.

According to the present embodiment, the shield electrode 16 is connected to the common electrode, and also has a function as a capacitance electrode. Accordingly, the auxiliary capacitance is also formed between the shield electrode 16 and the pixel electrode 15 and between the shield electrode 16 and the drain electrode 12, and is formed between the lower-layer capacitance electrode 8 and the drain electrode 12. In addition, a large capacity can be secured.

Embodiment 3 Hereinafter, another embodiment of the present invention will be described. FIG. 9 is a schematic diagram showing a cross section of a TFT according to the embodiment of the present invention, and FIG.
FIG. 2 is a schematic diagram illustrating a plane of the TFT according to the embodiment of the present invention. FIG. 9 shows a cross section of a portion indicated by AA 'in FIG.

FIGS. 9 and 10 show a TFT according to this embodiment.
As shown in FIG.
A base coat film 2 made of an SiO ₂ film or the like is deposited on an insulating substrate 1 made of glass or the like, and an active layer 3 of a TFT made of a silicon thin film is formed on the base coat film 2 in a predetermined shape. The gate insulating film 4 is formed by depositing an insulating film such as a SiO ₂ film. A gate electrode 5 made of a metal material such as aluminum is formed in a predetermined shape on the active layer 3 with the gate insulating film 4 interposed therebetween.

Here, a contact region 6 into which impurity ions are implanted is formed in the active layer 3, and an insulating film is deposited over the entire surface to cover the contact region 6 to form a first interlayer insulating film 7. I have. Further, a capacitor electrode 8 patterned in a predetermined shape is formed thereon, and an anodic oxide film 18 is formed so as to cover the capacitor electrode 8.

Contact holes 10 are formed in interlayer insulating films 7 and 9 and gate insulating film 4 above contact region 6.
Are formed, and a source electrode 11 and a drain electrode 12 made of a metal material such as Al are formed and connected to the contact region 6, respectively.

Thereafter, a polyimide resin, an acrylic resin, or the like is applied to the entire surface to form a resin insulating film 13, and a contact hole 14 is opened in the insulating film 13 so as to be electrically connected to the drain electrode 12. Then, a metal material such as Cr or Ni or a transparent conductive thin film such as ITO is deposited and patterned into a predetermined shape to form the pixel electrode 15, thereby completing the TFT according to the present embodiment.

As described above, the TFT according to the present embodiment includes:
As shown in FIGS. 9 and 10, an auxiliary capacitor C1 is formed by a drain electrode 12 of the TFT and a capacitor electrode 8 provided below the drain electrode 12 via a dielectric film. The dielectric film for forming the auxiliary capacitance is formed by anodizing the capacitance electrode.

Here, the manufacturing process of the TFT according to the present embodiment will be described in more detail. FIGS. 11 (a) to 12
(D) is a process drawing showing a cross section in each manufacturing process of the TFT according to the embodiment of the present invention. Since the manufacturing process of the TFT according to the present embodiment up to the formation of the first interlayer insulating film is the same as that of the above-described first embodiment, the detailed description up to that portion is omitted here.

As shown in FIG. 11A, an anodically oxidizable metal thin film such as tantalum or aluminum is deposited to a thickness of about 150 nm by, for example, a sputtering method and then patterned into a predetermined shape to form a capacitor electrode 8. I do. It is also effective to provide a taper at the end of the capacitor electrode 8 during patterning so that the step does not become steep. The capacitance electrode 8 is formed in parallel with the source wiring. Although not shown, the wirings extending from the capacitor electrode 8 are bundled outside the display area and connected to have the same potential as the common electrode on the counter substrate side.

Next, as shown in FIG. 11B, the capacitance electrode 8 is anodized to form an anodic oxide film 18 on the surface. This anodic oxide film 18 becomes a dielectric film for forming an auxiliary capacitance. As an electrolyte for such anodization, an aqueous solution of citric acid, an aqueous solution of tartaric acid, an aqueous solution of boric acid or the like can be used in the case of tantalum, and an aqueous solution of tartaric acid and ethylene glycol in the case of aluminum. Can be used. In the case of aluminum, a non-porous insulating film can be formed by using a weak electrolyte solution. The thickness can be controlled by the applied voltage.

Next, as shown in FIG. 12C, a contact hole 10 is opened in the insulating film on the contact region 6 of the semiconductor layer 3 and a metal thin film is deposited by, for example, a sputtering method. And a source electrode 11 and a drain electrode 12 are formed. As the source electrode 11 and the drain electrode 12, an aluminum alloy or a laminated film of an aluminum alloy and a high melting point metal such as titanium can be used. The portion of the drain electrode 12 thus formed, which overlaps with the capacitor electrode 8 via the anodic oxide film 18, also serves as one of the electrodes constituting the auxiliary capacitor. In addition, the source electrode 11 needs to have a resistance as small as possible in order to minimize signal delay.
It is desirable that the film be formed to have a thickness of about nm.

Next, as shown in FIG. 12D, a third surface is formed on the entire surface including the source electrode 11 and the drain electrode 12.
Is formed. Next, the drain electrode 1
A contact hole 14 is opened in the third interlayer insulating film 13 on the second electrode 2 and an ITO (indium tin oxide film) or metal thin film is deposited by, for example, a sputtering method to a thickness of 50 to 100 nm, and then patterned into a predetermined shape to form a pixel electrode. 1
5 is formed. The third interlayer insulating film 13 is a film for the purpose of flattening the surface of the pixel electrode 15, and in this embodiment, acrylic resin is used, but the material is not particularly limited.

According to the present embodiment, since the dielectric film for forming the auxiliary capacitance is formed by the anodic oxidation film formed by anodic oxidation of the capacitance electrode, the dielectric film is formed with respect to the capacitance electrode. A dielectric film can be formed in a consistent manner. That is, the insulating film is not formed in a region other than the region where the auxiliary capacitance is formed, and the light transmitted through the region is not attenuated more than necessary, so that the brightness of the display is not reduced. In addition, the film formed by anodic oxidation is in close contact with the capacitor electrode as a matter of course, and therefore has good coverage. Further, since the film thickness can be easily set to some extent by controlling the applied voltage, the facility is simplified, and there are many advantages in manufacturing the TFT.

The first to third embodiments described above
In the above, the coplanar type TFT is described as an example, but the TFT used in the present invention is not limited to this.
For example, it can be easily applied to a bottom gate type TFT.

[0079]

As described above, the present invention is to provide a liquid crystal display device having good display quality, and to solve the problem in forming a TFT auxiliary capacitance required for that purpose. .

According to the present invention, the interlayer insulating film between the gate electrode and the source electrode of the TFT has a two-layer structure, a capacitor electrode is formed between the two interlayer insulating films, and is formed simultaneously with the source electrode. Since the storage capacitor is formed between the drain electrode and the capacitor electrode, the dielectric film for forming the storage capacitor does not directly affect the characteristics of the TFT and has a high dielectric constant. A storage capacitor can be formed using an arbitrary insulating film. Therefore, even in a liquid crystal display device having a small pixel size, it is possible to form a sufficient storage capacitor, thereby obtaining a good display quality and greatly reducing restrictions in manufacturing a TFT. Is possible.

Further, since the storage capacitor is formed in a region below the drain electrode of the TFT, a film which promotes surface flatness can be arranged between the drain electrode and the pixel electrode. Therefore, unnecessary irregularities are not generated on the surface of the pixel electrode formed on the uppermost layer. Therefore, the alignment of the liquid crystal molecules is not disturbed by the unevenness of the pixel electrode surface, and it is possible to realize a good display quality.

As described above, the thin film transistor of the present invention achieves both the formation of the auxiliary capacitance, the maintenance of the TFT characteristics, and the securing of the flatness of the pixel electrode surface, both of which were problems when forming the auxiliary capacitance. The present invention has a great effect on improving the performance and added value of an image display device which is indispensable to the information society in the future, especially a liquid crystal display device or a portable device equipped with the same.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a TFT according to a first embodiment of the present invention.

FIG. 2 is a plan view showing a TFT according to the first embodiment of the present invention.

FIGS. 3A and 3B are cross-sectional views illustrating a manufacturing process of the TFT according to the first embodiment of the present invention.

FIGS. 4C and 4D are cross-sectional views illustrating steps of manufacturing the TFT according to the first embodiment of the present invention.

FIGS. 5E and 5F are cross-sectional views illustrating steps of manufacturing the TFT according to the first embodiment of the present invention.

FIG. 6 is a sectional view showing a TFT according to a second embodiment of the present invention.

FIG. 7 is a plan view showing a TFT according to a second embodiment of the present invention.

FIGS. 8A and 8B are cross-sectional views illustrating steps of manufacturing a TFT according to a second embodiment of the present invention.

FIG. 9 is a sectional view showing a TFT according to a third embodiment of the present invention.

FIG. 10 is a diagram illustrating a TFT according to a third embodiment of the present invention.
FIG.

FIGS. 11A and 11B show Embodiment 3 of the present invention.
FIG. 4 is a cross-sectional view showing a manufacturing process of the TFT according to FIG.

12 (c) and (d) show Embodiment 3 of the present invention.
FIG. 4 is a cross-sectional view showing a manufacturing process of the TFT according to FIG.

FIG. 13 is a sectional view showing an example of a conventional TFT.

FIG. 14 is a sectional view showing an example of a conventional TFT.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Base coat film 3 Semiconductor layer 4 Gate insulating film 5 Gate electrode 6 Contact region 7 First interlayer insulating film 8 Capacitance electrode 9 Second interlayer insulating film 10 Contact hole 11 Source electrode 12 Drain electrode 13 Third interlayer insulating Film 14 Contact hole 15 Pixel electrode 16 Shield electrode 17 Fourth interlayer insulating film 18 Anodized film C1 Auxiliary capacitance C2 Auxiliary capacitance C3 Auxiliary capacitance

Claims (7)

[Claims] 1. A thin film transistor having a gate electrode, a source electrode, a drain electrode, and a pixel electrode, and having an auxiliary capacitance for holding a potential of the pixel electrode, wherein the auxiliary capacitance is mainly composed of silicon. A capacitor electrode formed above the active layer of the thin film transistor, and a second electrode formed above the capacitor electrode and below the pixel electrode, and sandwiched between these electrodes. A thin film transistor comprising at least one layer of an insulating film. 2. The second electrode, comprising: the second electrode; the pixel electrode; and a third electrode disposed between at least two layers of insulating films sandwiched between the electrodes. 2. The thin film transistor according to claim 1, wherein second and third storage capacitors are formed between the third electrode and the third electrode and between the third electrode and the pixel electrode. 3. 3. The method according to claim 1, wherein the second electrode is made of the same material as the source electrode and the drain electrode, and is formed to have substantially the same thickness as the source electrode and the drain electrode. The thin film transistor according to claim 1. 4. The capacitor according to claim 1, wherein the at least one insulating film sandwiched between the capacitor electrode and the second electrode contains at least an oxide of the capacitor electrode. Thin film transistor. 5. A method for manufacturing a thin film transistor having a gate electrode, a source electrode, a drain electrode, and a pixel electrode, and having an auxiliary capacitor for holding a potential of the pixel electrode, wherein at least a thin film containing silicon as a main component. Forming an active layer comprising: forming a first insulating film on the active layer; forming a capacitor electrode on the first insulating film; and forming a second electrode on the capacitor electrode. A method for manufacturing a thin film transistor, comprising: forming an insulating film; and forming a second electrode so as to partially overlap the capacitor electrode via the second insulating film. 6. A method of manufacturing a thin film transistor having a gate electrode, a source electrode, a drain electrode, and a pixel electrode and having an auxiliary capacitor for holding a potential of the pixel electrode, wherein at least a thin film containing silicon as a main component. Forming an active layer comprising: forming a first insulating film on the active layer; forming a capacitor electrode on the first insulating film; and forming a second electrode on the capacitor electrode. Forming an insulating film; forming a second electrode so as to partially overlap the capacitor electrode via the second insulating film; forming a third insulating film on the second electrode Forming a third electrode overlying the second electrode with the third insulating film interposed therebetween; and forming a fourth insulating film on the third electrode. Through the fourth insulating film to the third electrode Forming a pixel electrode so as to partially overlap each other. 7. The method according to claim 5, wherein the step of forming the second insulating film is a step of forming an anodic oxide film on a surface of the capacitor electrode.