JP3916002B2 - 送信シーケンス化 - Google Patents

送信シーケンス化 Download PDF

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Publication number
JP3916002B2
JP3916002B2 JP53816197A JP53816197A JP3916002B2 JP 3916002 B2 JP3916002 B2 JP 3916002B2 JP 53816197 A JP53816197 A JP 53816197A JP 53816197 A JP53816197 A JP 53816197A JP 3916002 B2 JP3916002 B2 JP 3916002B2
Authority
JP
Japan
Prior art keywords
phase
locked loop
bandwidth
narrow
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP53816197A
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English (en)
Japanese (ja)
Other versions
JP2000509221A (ja
Inventor
ホートン,ロバート,アール.
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ericsson Inc
Original Assignee
Ericsson Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Inc filed Critical Ericsson Inc
Publication of JP2000509221A publication Critical patent/JP2000509221A/ja
Application granted granted Critical
Publication of JP3916002B2 publication Critical patent/JP3916002B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L3/00Starting of generators
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40Circuits
    • H04B1/54Circuits using the same frequency for two directions of communication

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Transmitters (AREA)
JP53816197A 1996-04-19 1997-04-17 送信シーケンス化 Expired - Lifetime JP3916002B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/634,723 US5802450A (en) 1996-04-19 1996-04-19 Transmit sequencing
US08/634,723 1996-04-19
PCT/US1997/006340 WO1997040586A1 (en) 1996-04-19 1997-04-17 Transmit sequencing

Publications (2)

Publication Number Publication Date
JP2000509221A JP2000509221A (ja) 2000-07-18
JP3916002B2 true JP3916002B2 (ja) 2007-05-16

Family

ID=24544962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53816197A Expired - Lifetime JP3916002B2 (ja) 1996-04-19 1997-04-17 送信シーケンス化

Country Status (18)

Country Link
US (1) US5802450A (de)
EP (1) EP0895674B1 (de)
JP (1) JP3916002B2 (de)
KR (1) KR100447070B1 (de)
CN (1) CN1156992C (de)
AU (1) AU727812B2 (de)
BR (1) BR9708704A (de)
CA (1) CA2251845C (de)
DE (1) DE69706536T2 (de)
DK (1) DK0895674T3 (de)
EE (1) EE04075B1 (de)
ES (1) ES2159858T3 (de)
HK (1) HK1021274A1 (de)
NO (1) NO984854L (de)
PL (1) PL182699B1 (de)
RU (1) RU2195769C2 (de)
TR (1) TR199802103T2 (de)
WO (1) WO1997040586A1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6157271A (en) * 1998-11-23 2000-12-05 Motorola, Inc. Rapid tuning, low distortion digital direct modulation phase locked loop and method therefor
US6504437B1 (en) * 2001-06-26 2003-01-07 Agere Systems Inc. Low-noise, fast-lock phase-lock loop with “gearshifting” control
GB2412513B (en) 2002-05-31 2006-03-08 Renesas Tech Corp Apparatus for radio telecommunication system and method of building up output power
GB2389253B (en) * 2002-05-31 2005-09-21 Hitachi Ltd Transmitter and semiconductor integrated circuit for communication
GB2416254B (en) * 2002-05-31 2006-06-28 Renesas Tech Corp Semiconductor integrated circuit for communication, radio-communications apparatus, and transmission starting method
GB2389251B (en) 2002-05-31 2005-09-07 Hitachi Ltd A communication semiconductor integrated circuit, a wireless communication apparatus, and a loop gain calibration method
US8070224B2 (en) * 2005-04-20 2011-12-06 Audiovox Corporation Vehicle entertainment system incorporated within the armrest/console of a vehicle
US7755437B2 (en) * 2005-08-24 2010-07-13 Qualcomm Incorporated Phase locked loop system having locking and tracking modes of operation
US7539473B2 (en) * 2006-04-26 2009-05-26 International Business Machines Corporation Overshoot reduction in VCO calibration for serial link phase lock loop (PLL)
US8073416B2 (en) * 2007-10-25 2011-12-06 Qualcomm Incorporated Method and apparatus for controlling a bias current of a VCO in a phase-locked loop
KR101578512B1 (ko) 2009-11-19 2015-12-18 삼성전자주식회사 Lc 탱크 필터를 포함하는 수신기
US11601156B2 (en) * 2020-07-06 2023-03-07 Mediatek Inc. Apparatus and methods for improved transmit power

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5175729A (en) * 1991-06-05 1992-12-29 Motorola, Inc. Radio with fast lock phase-locked loop
US5142246A (en) * 1991-06-19 1992-08-25 Telefonaktiebolaget L M Ericsson Multi-loop controlled VCO
US5438703A (en) * 1991-11-18 1995-08-01 Motorola, Inc. Radio with reduced frequency pull
US5498998A (en) * 1992-11-16 1996-03-12 Gehrke; James K. Method for adjusting the output frequency of a frequency synthesizer
JP2875472B2 (ja) * 1994-01-19 1999-03-31 日本無線株式会社 Pllシンセサイザ及びその制御方法
GB2289386B (en) * 1994-04-28 1998-12-30 Motorola Ltd Radio transmitter and method of control of transmit power increase
DE69533913T2 (de) * 1994-05-26 2005-05-25 Matsushita Electric Industrial Co., Ltd., Kadoma Frequenzsynthesizer
US5499392A (en) * 1994-07-19 1996-03-12 Matsushita Communication Industrial Corporation Of America Filter having a variable response time for filtering an input signal
US5463351A (en) * 1994-09-29 1995-10-31 Motorola, Inc. Nested digital phase lock loop

Also Published As

Publication number Publication date
CN1156992C (zh) 2004-07-07
HK1021274A1 (en) 2000-06-02
PL329378A1 (en) 1999-03-29
EP0895674B1 (de) 2001-09-05
KR100447070B1 (ko) 2004-10-14
KR20000010534A (ko) 2000-02-15
NO984854L (no) 1998-11-26
PL182699B1 (pl) 2002-02-28
CA2251845A1 (en) 1997-10-30
EE9800344A (et) 1999-04-15
US5802450A (en) 1998-09-01
RU2195769C2 (ru) 2002-12-27
DE69706536D1 (de) 2001-10-11
WO1997040586A1 (en) 1997-10-30
DE69706536T2 (de) 2002-04-18
NO984854D0 (no) 1998-10-16
EE04075B1 (et) 2003-06-16
EP0895674A1 (de) 1999-02-10
DK0895674T3 (da) 2001-11-19
JP2000509221A (ja) 2000-07-18
ES2159858T3 (es) 2001-10-16
CN1222268A (zh) 1999-07-07
AU2672097A (en) 1997-11-12
BR9708704A (pt) 1999-08-03
AU727812B2 (en) 2000-12-21
TR199802103T2 (en) 1999-01-18
CA2251845C (en) 2004-03-02

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