JP3840131B2 - Package for storing semiconductor elements - Google Patents

Package for storing semiconductor elements Download PDF

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Publication number
JP3840131B2
JP3840131B2 JP2002089433A JP2002089433A JP3840131B2 JP 3840131 B2 JP3840131 B2 JP 3840131B2 JP 2002089433 A JP2002089433 A JP 2002089433A JP 2002089433 A JP2002089433 A JP 2002089433A JP 3840131 B2 JP3840131 B2 JP 3840131B2
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Prior art keywords
semiconductor element
electrode plate
signal wiring
package
grounding electrode
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JP2003282761A (en
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義明 植田
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Kyocera Corp
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Kyocera Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a package for housing semiconductor element that can make a housed semiconductor element grounded surely by eliminating the deformation of a grounding electrode plate, and in addition, can prevent the occurrence of noise in signal wiring and the decline of a resonance point. <P>SOLUTION: This package for housing semiconductor element is provided with a ceramic substrate 2 having a placing section 2a for placing the semiconductor element 3 and signal wiring 4 electrically connected to the element 3 on its upper surface, and the grounding electrode plate 5 which is composed of a rectangular metal plate, disposed astride a midpoint of the wiring 4, and bonded to the upper surface of the substrate 2 by its downwardly bent both short side sections. In addition, the electrode plate 5 is connected to the semiconductor element 3 through bonding wires. Extended sections 5a of the electrode plate 5 which are extended with fixed widths from both longer sides of the plate 5a over the full lengths of the sides are inclined downward or upward with respect to the main surface of the plate 5 at 45-90&deg;, and at the same time, each of widths of the extended sections 5a is adjusted to 1.5-3 times as large as the thickness of the plate 5. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体素子を収容するための半導体素子収納用パッケージに関する。
【０００２】
【従来の技術】
従来、マイクロ波やミリ波の電気信号を処理する半導体素子３を収容するための半導体素子収納用パッケージ（以下、半導体パッケージともいう）を、図３，図４に示す。図３は半導体パッケージの平面図、図４は図３のＡ−Ａ’線における断面図である。同図に示すように、略四角形の基体２の上面の載置部２ａに、半導体素子３が周囲に信号配線４が配置されるようにして載置固定されており、信号配線４は外部電気回路に対してリード端子を用いて電気的に接続されている。
【０００３】
ところが、高密度化が進んで信号配線４の数が極めて多くなる場合、導通抵抗を小さくする為に極力大きな幅を必要とする接地用配線を基体２上面に形成することが困難となる。このような場合、半導体素子３を接地する為に、基体２の上面に信号配線４の途中の上方を跨ぐように設置された略長方形の接地用電極板５が用いられる場合がある。この接地用電極板５により、幅が大きな接地用配線を基体２上面に引き廻すスペースを不要とするとともに、信号配線４との間隔を大きくして間に誘電率が小さい空気等の気体を介在させることにより、接地用電極板５と信号配線４との間に発生する電気的な容量成分を極めて小さくすることができる。これにより、信号配線４が高密度に配線されるとともに、ノイズが少なく、高い共振周波数を有する半導体パッケージ１が得られる。
【０００４】
そして、接地用電極板５は、基体２の上面から0.40〜1.2ｍｍ程度の高さで設けられた上面５ａと、両短辺部に下方に折り曲げられるように形成されるとともに基体２の上面に接合された脚部５ｂとを有している。接地用電極板５は、その上面５ａが半導体素子３の接地用電極にボンディングワイヤ６を介して接続され、また、脚部５ｂが基体２の側面電極７ａを介して基体２の下面２ｂの接地用メタライズ層７に電気的に接続されている。
【０００５】
【発明が解決しようとする課題】
しかしながら、接地用電極板５は、基体２に近似した熱膨張係数を有する鉄（Ｆｅ）−ニッケル（Ｎｉ）−コバルト（Ｃｏ）合金やＦｅ−Ｎｉ合金等の比較的硬い金属から成るが、一般に厚さが0.1〜0.25ｍｍ程度と薄いため、接地用電極板５の上面５ａにボンディングワイヤ６をボンディングする際にボンディング用のキャピラリー（セラミックス等からなり中心軸にボンディングワイヤ６を通す細管を有するワイヤボンディング用治具）が上面５ａに押し付けられると、上面５ａが下方に曲がり、基体２上面の信号配線４に接触するといった不具合が発生していた。また、製造中に上面５ａに外力が作用した場合にも下方に曲がるように変形し、接地用電極板５が信号配線４に接触するという不具合が発生していた。
【０００６】
また、接地用電極板５の上面５ａが曲がるとボンディングワイヤ６を正常な状態で接続することが困難となり、接続不良を招来する場合があった。
【０００７】
さらに、接地用電極板５が変形して信号配線４に近づくと、信号配線４に不要な容量成分が発生し、信号配線４にノイズが発生したり、信号配線の共振点が低下して信号配線で伝送される高周波信号の周波数付近で共振が発生し伝送損失が大きくなる場合があるといった問題点があった。
【０００８】
上記のような接地用電極板５の変形を防止するために、その厚さを厚くすることも考えられるが、接地用電極板５を厚くすると、高周波信号成分が流れているボンディングワイヤ６が長くなり、そのためボンディングワイヤ６のインダクタンスが増加して高周波信号の損失が発生する。すると、半導体素子３の信号処理に悪影響を与えるという問題がある。
【０００９】
従って、本発明は上記問題点に鑑みて完成されたものであり、その目的は、接地用電極板の変形を解消して半導体素子の接地を確実に行なうことができ、また信号配線からの信号の漏洩や、共振点が低下するのを防ぐことができるものとすることにある。
【００１０】
【課題を解決するための手段】
本発明の半導体素子収納用パッケージは、上面に半導体素子が載置される載置部を有するとともに前記半導体素子に電気的に接続される信号配線を有するセラミックスから成る基体と、略長方形の金属板から成り、前記信号配線の途中の上方を跨ぐように配置されるとともに下方に折れ曲がった両短辺部が前記基体の上面に接合され、前記半導体素子にボンディングワイヤを介して接続される接地用電極板とを具備した半導体素子収納用パッケージにおいて、前記接地用電極板は、その両長辺の全長にわたって一定幅で延出した延出部が主面に対して上方に45〜90°傾斜して形成されていることを特徴とする。
【００１１】
本発明の半導体素子収納用パッケージは、上記の構成により、接地用電極板はその両長辺の全長にわたって一定幅で延出した延出部が主面に対して上方に45〜90°傾斜して形成されていることから、接地用電極板の上方からの外力に対して接地用電極板の強度が大幅に増大し上面が変形しにくくなる。これにより、接地用電極板と信号配線との接触が解消され、その結果、半導体素子の接地を良好に行なうことができるとともに、接地用電極板と信号配線との距離を大きくすることができるので不要な容量成分を極めて小さくでき、信号配線にノイズが発生したり共振点が低下するのを防ぐことができる。
【００１２】
また、製造工程における製品のハンドリング中に製品同士が接触しても接地用電極板が変形することがなくなり、量産性に優れたものとなる。
【００１３】
【発明の実施の形態】
本発明の半導体素子収納用パッケージを以下に詳細に説明する。図１は本発明の半導体パッケージについて実施の形態の一例を示し、（ａ）は半導体パッケージの平面図、（ｂ）は（ａ）のＸ−Ｘ’線における断面図、（ｃ）は（ａ）のＹ−Ｙ’線における断面図である。図２は図１（ｃ）における要部拡大断面図である。
【００１４】
これらの図において、１は半導体パッケージ、２は基体、２ａは半導体素子３の載置部、２ｂは基体２の下面、３は半導体素子、４は信号配線、５は略長方形の接地用電極板、５ａは接地用電極板５の上面、５ｂは接地用電極板５の両短辺部の脚部、５ｃは接地用電極板５の両長辺の延出部、６はボンディングワイヤ、７は接地用メタライズ層、７ａは接地用電極板５と接地用メタライズ層７とを電気的に接続する側面電極である。また、図１，図２において従来例を示す図３，図４と同じ部分には同じ符号を付した。
【００１５】
また、半導体パッケージ１は、基体２の載置部２ａに半導体素子３が載置固定され、基体２の上面の外周部にキャップ状の蓋体が接合されることによって、半導体装置となる。
【００１６】
本発明の半導体パッケージ１は、上面に半導体素子３が載置される載置部２ａを有するとともに半導体素子３に電気的に接続される信号配線４を有するセラミックスから成る基体２と、略長方形の金属板から成り、信号配線４の途中の上方を跨ぐように配置されるとともに下方に折れ曲がった両短辺部が基体２の上面に接合され、半導体素子３にボンディングワイヤを介して接続される接地用電極板５とを具備し、接地用電極板５は、その両長辺の全長にわたって一定幅で延出した延出部５ｃが主面に対して下方または上方に45〜90°傾斜しているとともに幅が接地用電極板５の厚さの1.5〜３倍で形成されている。
【００１７】
また、接地用電極板５の脚部５ｂは基体２の上面に形成された接合用メタライズ層にロウ付けされており、基体２の下面２ｂには接地用メタライズ層７が形成されている。また、基体２の側面には側面電極７ａが形成されており、側面電極７ａは接合用メタライズ層に延出されているとともに接地用メタライズ層７に接続されている。そして、信号配線４を跨ぐ接地用電極板５が基体２の上面に脚部５ｂを介して接合され、さらに側面電極７ａを介して接地用メタライズ層７に電気的に接続される。
【００１８】
本発明の基体２は、酸化アルミニウム（Ａｌ2Ｏ3）質焼結体、窒化アルミニウム（ＡｌＮ）質焼結体、ムライト（３Ａｌ2Ｏ3・２ＳｉＯ2）質焼結体、炭化珪素（ＳｉＣ）質焼結体、ガラスセラミックス質焼結体等の絶縁材料からなり、その形状は例えば略四角形である。
【００１９】
基体２は、例えば酸化アルミニウム（Ａｌ2Ｏ3）質焼結体からなる場合以下のようにして作製される。Ａｌ2Ｏ3，酸化珪素（ＳｉＯ2），酸化マグネシウム（ＭｇＯ），酸化カルシウム（ＣａＯ）等の原料粉末に適当な有機バインダー、有機溶剤、可塑剤、分散剤等を添加混合してスラリー状となし、これを従来周知のドクターブレード法によってシート状となすことにより、複数枚のセラミックグリーンシートを得る。
【００２０】
次に、このセラミックグリーンシートに適当な打抜き加工を施すとともに、タングステン（Ｗ），モリブデン（Ｍｏ），マンガン（Ｍｎ），銅（Ｃｕ），銀（Ａｇ），ニッケル（Ｎｉ），パラジウム（Ｐｄ），金（Ａｕ）等の金属粉末に適当なバインダー、溶剤を混合してなる導体ペーストを、セラミックグリーンシートに予めスクリーン印刷法等により所定パターンに印刷塗布することによって、信号配線４、接合用メタライズ層、接地用メタライズ層７となる印刷層をそれぞれ形成する。その後、セラミックグリーンシートを所定の順序で積層した後、所定の寸法に切断し、次に基体２の側面となる切断面に導体ペーストをスクリーン印刷法や転写印刷法等の印刷法により印刷して側面電極７ａとなる印刷層を形成し、最後に約1600℃の温度で焼成することによって、基体２が作製される。
【００２１】
また、信号配線４、接地用メタライズ層７、側面電極７ａ、接合用メタライズ層の表面に、良導電性で耐食性およびろう材との濡れ性が良好な金属、例えばＮｉメッキ層をメッキ法により０．５〜９μｍの厚さで被着させておくのがよく、信号配線４、接地用メタライズ層７、側面電極７ａ、接合用メタライズ層の酸化腐食を有効に防止するとともに、接地用電極板５の接合用メタライズ層へのロウ付け接合等を容易かつ強固とすることができる。
【００２２】
接地用電極板５はＣｕ，Ｃｕ−Ｚｎ合金，Ｆｅ−Ｎｉ−Ｃｏ合金，Ｆｅ−Ｎｉ合金等から成り、金型により成型することにより、両長辺に延出部５ｃを例えば下方に折り曲げるように形成することができる。
【００２３】
接地用電極板５の延出部５ｃは主面に対して上方に45〜90°傾斜しているとともに幅が接地用電極板５の厚さの1.5〜３倍である。延出部５ｃの傾斜角度が45°未満の場合、接地用電極板５の耐曲げ強度が小さくなり、小さな外力で変形し易くなる。90°を超えると、延出部５ｃを設けることによる強度向上の効果が小さくなる。延出部５ｃの幅が接地用電極板５の厚さの1.5倍未満では、強度向上の効果が現われ難い。３倍を超えると、延出部５ｃを下方に傾斜させて設けた場合に信号配線４との間に大きな浮遊容量が発生する。
【００２４】
この接地用電極板５は、その上面５ａが半導体素子３の上面の接地用電極にボンディングワイヤ６を介して接続されることによって、半導体素子３の接地電極部として機能するとともに放熱部材としても機能する。
【００２５】
本発明の延出部５ｃを有する接地用電極板５は、その構造が強度および容量成分の減少という点で優れており、また延出部５ｃが上方に折り曲げられているので、容量成分の発生をより小さくできる。
【００２６】
そして、接地用電極板５の全体にＮｉメッキ層を0.5〜９μｍの厚さで被着させた後、接地用電極板５の脚部５ｂを接合用メタライズ層に銀ロウ等のロウ材で接合し、半導体素子３をＡｕ−Ｓｎ（錫）合金等の低融点ロウ材により載置部２ａに載置接合し、次に半導体素子３上の接地用電極をボンディングワイヤ６を介して接地用電極板５の上面５ａに接続することにより、半導体素子３が基体２の側面電極７ａを介して基体２の下面２ｂの接地用メタライズ層７に電気的に接続されることになる。
【００２７】
本発明の半導体装置は、上記本発明の半導体パッケージ１と、載置部２ａに載置固定され信号配線４に電気的に接続された半導体素子３と、基体２の上面の外周部に接合されたキャップ状の蓋体とを具備する。この半導体装置は、具体的には、載置部２ａに半導体素子３をＡｕ−Ｓｎ合金，低融点ガラス、樹脂接着剤等の接着剤で載置固定し、半導体素子３の電極をボンディングワイヤ６を介して所定の信号配線４および接地用電極板５に電気的に接続し、しかる後、基体２の上面にキャップを低融点ガラス，樹脂接着剤，ロウ材，シーム溶接等により接合することで作製される。この半導体装置は外部電気回路から供給される電気信号により半導体素子３を作動させる。
【００２８】
【実施例】
本発明の半導体素子収納用パッケージの実施例を以下に説明する。
[１]基体２は酸化アルミニウム焼結体から成り、その寸法は10×８ｍｍ角でありまた上面には３ｍｍ角程度の載置部２ａを形成した。また、載置部２ａの周囲には信号配線４を形成し、接地用電極板５を接合する為の接合用メタライズ層を信号配線４の形成領域を挟むようにして設けた。
[２]接地用電極板５を金型プレスにより、長辺の長さが６ｍｍ、短辺の長さが２ｍｍ、厚さが0.15ｍｍの長方形となるように作製し、全体にＮｉメッキ層およびＡｕメッキ層がそれぞれ２μｍ、１μｍの厚さで被着した。その接地用電極板５の脚部５ｂを接合用メタライズ層にＢＡｇ−８ロウ材（ＪＩＳ Ｚ 3261）で接合し、基体２の上面との隙間を0.5ｍｍとした。
[３]また、基体２上面の信号配線４、接地用メタライズ層７および側面電極７ａの表面には厚さ３μｍのＮｉメッキ層を予め被着しておいた。さらに、基体２の載置部２ａにＬＳＩから成る半導体素子３をＡｕ−Ｓｎ合金から成る低融点ロウ材により載置接合した。
【００２９】
接地用電極板５は、その両長辺には下方に傾斜した延出部５ａを有するように、金型で成型して作製した。このとき、延出部５ａの傾斜角度を15°，30°，45°，60°，75°，90°，105°，120°として８種作製し、延出部５の幅を接地用電極板５の厚さの２倍の0.3ｍｍとして、各種につき10個ずつ計80個作製した。これらの接地用電極板５を用いて、半導体素子３の上面の接地用電極と接地用電極板５の上面５ａとを、Ａｕから成る0.2ｍｍ径の２本のボンディングワイヤ６を介して接続した。その際の接地用電極板５の下方への曲り具合を調べた結果を表１に示す。
【００３０】
【表１】

Figure 0003840131
【００３１】
表１より、延出部５の傾斜角度が45〜90°である場合、ワイヤボンディング時に接地用電極板５と信号配線４との間隔は変化せず、本発明の有効性が確認できた。
【００３２】
次に、延出部５の傾斜角度を下方に60°として、幅を接地用電極板５の厚さの0.5倍，１倍，1.5倍，２倍，2.5倍，３倍、3.5倍、４倍の８種の各10個の計80個について、ワイヤボンディング時の接地用電極板５の下方への曲り具合を調べた結果を表２に示す。
【００３３】
【表２】
Figure 0003840131
【００３４】
表２より、延出部５の幅が1.5〜３倍である場合、接地用電極板５と信号配線４との間隔が変化せず、本発明の有効性が確認できた。
【００３５】
なお、本発明は上記実施の形態および実施例に限定されず、本発明の要旨を逸脱しない範囲内で種々の変更を行うことは何等差し支えない。
【００３６】
【発明の効果】
本発明の半導体素子収納用パッケージは、上面に半導体素子が載置される載置部を有するとともに半導体素子に電気的に接続される信号配線を有するセラミックスから成る基体と、略長方形の金属板から成り、信号配線の途中の上方を跨ぐように配置されるとともに下方に折れ曲がった両短辺部が基体の上面に接合され、半導体素子にボンディングワイヤを介して接続される接地用電極板とを具備し、接地用電極板は、その両長辺の全長にわたって一定幅で延出した延出部が主面に対して上方に45〜90°傾斜して形成されていることにより、接地用電極板の上方からの外力に対して接地用電極板の強度が大幅に増大し上面が変形しにくくなる。これにより、接地用電極板と信号配線との接触が解消され、その結果、半導体素子の接地を良好に行なうことができるとともに、接地用電極板と信号配線との距離を大きくすることができるので不要な容量成分を極めて小さくでき、信号配線にノイズが発生したり共振点が低下するのを防ぐことができる。また、製造工程における製品のハンドリング中に製品同士が接触しても接地用電極板が変形することがなくなり、量産性に優れたものとなる。
【図面の簡単な説明】
【図１】本発明の半導体素子収納用パッケージについて実施の形態の一例を示し、（ａ）は半導体素子収納用パッケージの平面図、（ｂ）は（ａ）のＸ−Ｘ’線における断面図、（ｃ）は（ａ）のＹ−Ｙ’線における断面図である。
【図２】図１（ｃ）における要部拡大断面図である。
【図３】従来の半導体素子収納用パッケージ一例を示す平面図である。
【図４】図３の半導体素子収納用パッケージの断面図である。
【符号の説明】
１：半導体素子収納用パッケージ
２：基体
２ａ：載置部
３：半導体素子
４：信号配線
５：接地用電極板
５ａ：上面
５ｃ：延出部
６：ボンディングワイヤ[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a package for housing a semiconductor element for housing a semiconductor element.
[0002]
[Prior art]
Conventionally, a package for housing a semiconductor element (hereinafter also referred to as a semiconductor package) for housing a semiconductor element 3 for processing microwave or millimeter wave electrical signals is shown in FIGS. 3 is a plan view of the semiconductor package, and FIG. 4 is a cross-sectional view taken along the line AA ′ of FIG. As shown in the figure, the semiconductor element 3 is mounted and fixed on the mounting portion 2a on the upper surface of the substantially square base 2 so that the signal wiring 4 is disposed around the semiconductor element 3, and the signal wiring 4 is externally connected. It is electrically connected to the circuit using a lead terminal.
[0003]
However, when the density is increased and the number of the signal wirings 4 is extremely increased, it becomes difficult to form a grounding wiring on the upper surface of the base 2 that requires as large a width as possible to reduce the conduction resistance. In such a case, in order to ground the semiconductor element 3, there is a case where a substantially rectangular grounding electrode plate 5 installed on the upper surface of the base 2 so as to straddle the middle of the signal wiring 4 is used. This grounding electrode plate 5 eliminates the need for a space for routing the grounding wiring having a large width to the upper surface of the base 2 and increases the distance from the signal wiring 4 to interpose a gas such as air having a low dielectric constant. By doing so, the electrical capacitance component generated between the grounding electrode plate 5 and the signal wiring 4 can be made extremely small. Thereby, the signal wiring 4 is wired with high density, and the semiconductor package 1 having a low resonance and a high resonance frequency is obtained.
[0004]
The grounding electrode plate 5 is formed so as to be bent downward at both short sides, with an upper surface 5a provided at a height of about 0.40 to 1.2 mm from the upper surface of the substrate 2, and on the upper surface of the substrate 2. It has the joined leg 5b. The ground electrode plate 5 has an upper surface 5 a connected to the ground electrode of the semiconductor element 3 via a bonding wire 6, and a leg portion 5 b grounded to the lower surface 2 b of the base 2 via the side electrode 7 a of the base 2. The metallization layer 7 is electrically connected.
[0005]
[Problems to be solved by the invention]
However, the grounding electrode plate 5 is made of a relatively hard metal such as an iron (Fe) -nickel (Ni) -cobalt (Co) alloy or an Fe—Ni alloy having a thermal expansion coefficient similar to that of the base 2. Since the thickness is as thin as about 0.1 to 0.25 mm, when bonding the bonding wire 6 to the upper surface 5a of the ground electrode plate 5, a bonding capillary (a wire made of ceramics or the like and having a narrow tube through which the bonding wire 6 passes through the central axis) When the bonding jig) is pressed against the upper surface 5a, the upper surface 5a bends downward and comes into contact with the signal wiring 4 on the upper surface of the substrate 2. Further, even when an external force is applied to the upper surface 5 a during manufacturing, the upper electrode 5 is deformed so as to bend downward and the ground electrode plate 5 comes into contact with the signal wiring 4.
[0006]
Further, if the upper surface 5a of the ground electrode plate 5 is bent, it is difficult to connect the bonding wires 6 in a normal state, which may cause a connection failure.
[0007]
Further, when the grounding electrode plate 5 is deformed and approaches the signal wiring 4, an unnecessary capacitance component is generated in the signal wiring 4, noise is generated in the signal wiring 4, and the resonance point of the signal wiring is lowered to reduce the signal. There is a problem in that resonance occurs near the frequency of the high-frequency signal transmitted through the wiring and transmission loss increases.
[0008]
In order to prevent the deformation of the grounding electrode plate 5 as described above, it is conceivable to increase its thickness. However, if the grounding electrode plate 5 is thickened, the bonding wire 6 through which the high-frequency signal component flows becomes longer. As a result, the inductance of the bonding wire 6 increases and a high-frequency signal loss occurs. Then, there is a problem that the signal processing of the semiconductor element 3 is adversely affected.
[0009]
Accordingly, the present invention has been completed in view of the above-described problems, and the object thereof is to eliminate the deformation of the grounding electrode plate so that the semiconductor element can be reliably grounded, and the signal from the signal wiring can be obtained. In other words, it is possible to prevent leakage and decrease in resonance point.
[0010]
[Means for Solving the Problems]
A package for housing a semiconductor element of the present invention includes a base made of ceramics having a mounting portion on which a semiconductor element is mounted and a signal wiring electrically connected to the semiconductor element, and a substantially rectangular metal plate The grounding electrode is arranged so as to straddle the middle part of the signal wiring, and both short side parts bent downward are joined to the upper surface of the base and connected to the semiconductor element via a bonding wire In the package for housing a semiconductor element comprising a plate, the grounding electrode plate has an extended portion extending at a constant width over the entire length of both long sides thereof inclined upward by 45 to 90 ° with respect to the main surface. It is formed.
[0011]
The semiconductor element storage package according to the present invention has the above-described configuration, and the ground electrode plate has an extended portion extending at a constant width over the entire length of both long sides thereof inclined upward by 45 to 90 ° with respect to the main surface. Therefore, the strength of the grounding electrode plate is greatly increased with respect to the external force from above the grounding electrode plate, and the upper surface is hardly deformed. As a result, the contact between the grounding electrode plate and the signal wiring is eliminated. As a result, the semiconductor element can be grounded well and the distance between the grounding electrode plate and the signal wiring can be increased. Unnecessary capacitance components can be made extremely small, and noise can be prevented from occurring in the signal wiring and the resonance point can be prevented from being lowered.
[0012]
Further, even if the products come into contact with each other during the handling of the product in the manufacturing process, the ground electrode plate is not deformed, and the mass productivity is excellent.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
The semiconductor element storage package of the present invention will be described in detail below. FIG. 1 shows an example of an embodiment of a semiconductor package of the present invention, (a) is a plan view of the semiconductor package, (b) is a cross-sectional view taken along line XX ′ in (a), and (c) is (a) It is sectional drawing in the YY 'line | wire of (). FIG. 2 is an enlarged cross-sectional view of a main part in FIG.
[0014]
In these drawings, 1 is a semiconductor package, 2 is a base, 2a is a mounting portion for a semiconductor element 3, 2b is a lower surface of the base 2, 3 is a semiconductor element, 4 is signal wiring, and 5 is a substantially rectangular grounding electrode plate. 5a is the upper surface of the grounding electrode plate 5, 5b is the legs of both short sides of the grounding electrode plate 5, 5c is the extension of both long sides of the grounding electrode plate 5, 6 is the bonding wire, 7 is A grounding metallization layer 7 a is a side electrode for electrically connecting the grounding electrode plate 5 and the grounding metallization layer 7. In FIG. 1 and FIG. 2, the same parts as those in FIG. 3 and FIG.
[0015]
The semiconductor package 1 is a semiconductor device in which the semiconductor element 3 is mounted and fixed on the mounting portion 2 a of the base 2, and a cap-shaped lid is joined to the outer peripheral portion of the upper surface of the base 2.
[0016]
The semiconductor package 1 of the present invention has a base 2 made of ceramics having a mounting portion 2a on which the semiconductor element 3 is mounted and a signal wiring 4 electrically connected to the semiconductor element 3, and a substantially rectangular shape. A ground plate made of a metal plate, arranged so as to straddle the middle of the signal wiring 4 and bent to the upper surface of the base 2 and connected to the semiconductor element 3 via a bonding wire. And the grounding electrode plate 5 has an extended portion 5c extending at a constant width over the entire length of both long sides thereof inclined downward or upward by 45 to 90 ° with respect to the main surface. And the width is 1.5 to 3 times the thickness of the ground electrode plate 5.
[0017]
Further, the leg portion 5 b of the ground electrode plate 5 is brazed to a bonding metallization layer formed on the upper surface of the substrate 2, and a ground metallization layer 7 is formed on the lower surface 2 b of the substrate 2. A side electrode 7 a is formed on the side surface of the substrate 2, and the side electrode 7 a extends to the bonding metallization layer and is connected to the ground metallization layer 7. A grounding electrode plate 5 straddling the signal wiring 4 is joined to the upper surface of the base 2 via the legs 5b, and is further electrically connected to the grounding metallization layer 7 via the side electrodes 7a.
[0018]
The substrate 2 of the present invention includes an aluminum oxide (Al 2 O 3 ) sintered body, an aluminum nitride (AlN) sintered body, a mullite (3Al 2 O 3 .2SiO 2 ) sintered body, and silicon carbide (SiC). It is made of an insulating material such as a sintered material of glass or a sintered material of glass ceramics, and its shape is, for example, a substantially square shape.
[0019]
For example, when the base 2 is made of an aluminum oxide (Al 2 O 3 ) sintered body, it is manufactured as follows. A suitable organic binder, organic solvent, plasticizer, dispersant, etc. are added to and mixed with raw material powders such as Al 2 O 3 , silicon oxide (SiO 2 ), magnesium oxide (MgO), calcium oxide (CaO) to form a slurry. None. By forming this into a sheet shape by a conventionally known doctor blade method, a plurality of ceramic green sheets are obtained.
[0020]
Next, the ceramic green sheet is appropriately punched and tungsten (W), molybdenum (Mo), manganese (Mn), copper (Cu), silver (Ag), nickel (Ni), palladium (Pd) A conductive paste made by mixing a metal powder such as gold (Au) with an appropriate binder and solvent is preliminarily printed on a ceramic green sheet in a predetermined pattern by screen printing, etc. A printed layer to be a layer and a ground metallization layer 7 are formed. Thereafter, the ceramic green sheets are laminated in a predetermined order, cut to a predetermined size, and then printed with a conductive paste on a cut surface which is a side surface of the substrate 2 by a printing method such as a screen printing method or a transfer printing method. A printed layer to be the side electrode 7a is formed and finally baked at a temperature of about 1600 ° C., whereby the substrate 2 is produced.
[0021]
Further, a metal having good conductivity, corrosion resistance and good wettability with a brazing material, for example, a Ni plating layer is formed on the surface of the signal wiring 4, the ground metallization layer 7, the side electrode 7 a and the bonding metallization layer by plating. .5-9 .mu.m in thickness, which effectively prevents oxidative corrosion of the signal wiring 4, the ground metallization layer 7, the side electrode 7 a and the bonding metallization layer, and the grounding electrode plate 5. It is possible to easily and strengthen the brazing bonding to the metallizing layer for bonding.
[0022]
The grounding electrode plate 5 is made of Cu, Cu—Zn alloy, Fe—Ni—Co alloy, Fe—Ni alloy or the like, and is formed by a mold so that the extended portions 5c are bent, for example, downward on both long sides. Can be formed.
[0023]
The extending portion 5c of the ground electrode plate 5 is inclined upward by 45 to 90 ° with respect to the main surface, and the width is 1.5 to 3 times the thickness of the ground electrode plate 5. When the inclination angle of the extending portion 5c is less than 45 °, the bending resistance strength of the ground electrode plate 5 becomes small, and it becomes easy to deform with a small external force. If it exceeds 90 °, the effect of improving the strength by providing the extending portion 5c becomes small. If the width of the extension 5c is less than 1.5 times the thickness of the ground electrode plate 5, the effect of improving the strength is difficult to appear. If it exceeds three times, a large stray capacitance is generated between the extension 5c and the signal line 4 when the extension 5c is inclined downward.
[0024]
The ground electrode plate 5 functions as a ground electrode portion of the semiconductor element 3 and also as a heat radiating member when its upper surface 5a is connected to the ground electrode on the upper surface of the semiconductor element 3 via a bonding wire 6. To do.
[0025]
The grounding electrode plate 5 having the extending portion 5c of the present invention is excellent in the structure in terms of strength and reduction of the capacity component, and the extension portion 5c is bent upward, so that the generation of the capacity component is generated. Can be made smaller.
[0026]
Then, after the Ni plating layer is applied to the entire grounding electrode plate 5 with a thickness of 0.5 to 9 μm, the leg portion 5b of the grounding electrode plate 5 is joined to the joining metallized layer with a brazing material such as silver solder. Then, the semiconductor element 3 is placed and bonded to the placing portion 2a with a low melting point brazing material such as Au—Sn (tin) alloy, and then the grounding electrode on the semiconductor element 3 is connected to the grounding electrode via the bonding wire 6. By connecting to the upper surface 5 a of the plate 5, the semiconductor element 3 is electrically connected to the ground metallization layer 7 on the lower surface 2 b of the base 2 through the side surface electrode 7 a of the base 2.
[0027]
The semiconductor device of the present invention is bonded to the semiconductor package 1 of the present invention, the semiconductor element 3 mounted and fixed on the mounting portion 2 a and electrically connected to the signal wiring 4, and the outer peripheral portion of the upper surface of the base 2. And a cap-shaped lid. Specifically, in this semiconductor device, the semiconductor element 3 is mounted and fixed on the mounting portion 2a with an adhesive such as an Au—Sn alloy, low-melting glass, or resin adhesive, and the electrode of the semiconductor element 3 is bonded to the bonding wire 6. Are electrically connected to the predetermined signal wiring 4 and the grounding electrode plate 5, and then the cap is joined to the upper surface of the base 2 by low melting glass, resin adhesive, brazing material, seam welding, or the like. Produced. This semiconductor device operates the semiconductor element 3 by an electric signal supplied from an external electric circuit.
[0028]
【Example】
Embodiments of the semiconductor element storage package of the present invention will be described below.
[1] The base body 2 is made of an aluminum oxide sintered body, the dimensions of which are 10 × 8 mm square, and a mounting portion 2 a of about 3 mm square is formed on the upper surface. In addition, the signal wiring 4 is formed around the mounting portion 2 a, and a bonding metallization layer for bonding the ground electrode plate 5 is provided so as to sandwich the formation area of the signal wiring 4.
[2] The grounding electrode plate 5 is manufactured by a die press so that the long side has a rectangular shape with a length of 6 mm, a short side of 2 mm, and a thickness of 0.15 mm. Au plating layers were deposited with thicknesses of 2 μm and 1 μm, respectively. The leg portion 5b of the ground electrode plate 5 was bonded to the bonding metallization layer with a BAg-8 brazing material (JIS Z 3261), and the gap with the upper surface of the substrate 2 was set to 0.5 mm.
[3] Further, a Ni plating layer having a thickness of 3 μm was previously deposited on the surface of the signal wiring 4 on the upper surface of the substrate 2, the ground metallization layer 7 and the side electrode 7a. Further, the semiconductor element 3 made of LSI was placed and bonded to the mounting portion 2a of the base body 2 with a low melting point brazing material made of Au—Sn alloy.
[0029]
The grounding electrode plate 5 was produced by molding with a mold so that both long sides had extending portions 5a inclined downward. At this time, eight kinds of inclination angles of the extension part 5a are prepared as 15 °, 30 °, 45 °, 60 °, 75 °, 90 °, 105 °, 120 °, and the width of the extension part 5 is set to the grounding electrode. A total of 80 pieces of 10 pieces were prepared for each type with a thickness of 0.3 mm, which is twice the thickness of the plate 5. Using these grounding electrode plates 5, the grounding electrode on the upper surface of the semiconductor element 3 and the upper surface 5a of the grounding electrode plate 5 were connected through two bonding wires 6 made of Au and having a diameter of 0.2 mm. . Table 1 shows the results of examining the downward bending of the ground electrode plate 5 at that time.
[0030]
[Table 1]
Figure 0003840131
[0031]
From Table 1, when the inclination angle of the extended portion 5 is 45 to 90 °, the distance between the ground electrode plate 5 and the signal wiring 4 does not change during wire bonding, and the effectiveness of the present invention can be confirmed.
[0032]
Next, the inclination angle of the extending portion 5 is set to 60 ° downward, and the width is 0.5 times, 1 time, 1.5 times, 2 times, 2.5 times, 3 times, 3.5 times, 4 times the thickness of the electrode plate 5 for grounding. Table 2 shows the results of investigating the downward bending of the grounding electrode plate 5 during wire bonding for a total of eight of each of the eight types.
[0033]
[Table 2]
Figure 0003840131
[0034]
From Table 2, when the width of the extended portion 5 is 1.5 to 3 times, the interval between the ground electrode plate 5 and the signal wiring 4 does not change, and the effectiveness of the present invention can be confirmed.
[0035]
It should be noted that the present invention is not limited to the above-described embodiments and examples, and various modifications can be made without departing from the scope of the present invention.
[0036]
【The invention's effect】
The package for housing a semiconductor element of the present invention includes a base made of ceramics having a mounting portion on which a semiconductor element is mounted and a signal wiring electrically connected to the semiconductor element, and a substantially rectangular metal plate. A grounding electrode plate that is arranged so as to straddle the middle of the signal wiring and that both short side portions bent downward are bonded to the upper surface of the substrate and connected to the semiconductor element via a bonding wire. In addition, the ground electrode plate is formed with an extended portion extending at a constant width over the entire length of both long sides inclined upward by 45 to 90 ° with respect to the main surface. The strength of the grounding electrode plate is greatly increased with respect to the external force from above, and the upper surface is not easily deformed. As a result, contact between the grounding electrode plate and the signal wiring is eliminated. As a result, the semiconductor element can be grounded well and the distance between the grounding electrode plate and the signal wiring can be increased. Unnecessary capacitance components can be made extremely small, and noise can be prevented from occurring in the signal wiring and the resonance point can be prevented from being lowered. Further, even if the products come into contact with each other during the handling of the products in the manufacturing process, the ground electrode plate is not deformed, and the mass productivity is excellent.
[Brief description of the drawings]
1A and 1B show an example of an embodiment of a package for housing a semiconductor element of the present invention, wherein FIG. 1A is a plan view of the package for housing a semiconductor element, and FIG. 1B is a cross-sectional view taken along line XX ′ in FIG. (C) is sectional drawing in the YY 'line | wire of (a).
FIG. 2 is an enlarged cross-sectional view of a main part in FIG.
FIG. 3 is a plan view showing an example of a conventional package for housing semiconductor elements.
4 is a cross-sectional view of the semiconductor element storage package of FIG. 3;
[Explanation of symbols]
1: Semiconductor element storage package 2: Base 2a: Placement part 3: Semiconductor element 4: Signal wiring 5: Ground electrode plate 5a: Upper surface 5c: Extension part 6: Bonding wire

Claims (1)

上面に半導体素子が載置される載置部を有するとともに前記半導体素子に電気的に接続される信号配線を有するセラミックスから成る基体と、略長方形の金属板から成り、前記信号配線の途中の上方を跨ぐように配置されるとともに下方に折れ曲がった両短辺部が前記基体の上面に接合され、前記半導体素子にボンディングワイヤを介して接続される接地用電極板とを具備した半導体素子収納用パッケージにおいて、前記接地用電極板は、その両長辺の全長にわたって一定幅で延出した延出部が主面に対して上方に45〜90°傾斜して形成されていることを特徴とする半導体素子収納用パッケージ。A substrate made of ceramics having a mounting portion on which a semiconductor element is mounted and a signal wiring electrically connected to the semiconductor element, and a substantially rectangular metal plate, which is above the middle of the signal wiring A semiconductor element storage package comprising a grounding electrode plate that is disposed so as to straddle and has both short sides bent downwardly bonded to the upper surface of the base and connected to the semiconductor element via a bonding wire in the ground electrode plate, and characterized in that extending portions extending at a constant width over the entire length of its long sides are made form with 45 to 90 ° tilt up direction by to the main surface A package for storing semiconductor elements.
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