JP2017174872A - Package for housing semiconductor element, and semiconductor device - Google Patents

Package for housing semiconductor element, and semiconductor device Download PDF

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JP2017174872A
JP2017174872A JP2016056408A JP2016056408A JP2017174872A JP 2017174872 A JP2017174872 A JP 2017174872A JP 2016056408 A JP2016056408 A JP 2016056408A JP 2016056408 A JP2016056408 A JP 2016056408A JP 2017174872 A JP2017174872 A JP 2017174872A
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metal layer
frame body
semiconductor element
package
frame
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JP6680589B2 (en
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剛生 内田
Takeo Uchida
剛生 内田
隆 澤井
Takashi Sawai
隆 澤井
弘一 柏木
Koichi Kashiwagi
弘一 柏木
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Kyocera Corp
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PROBLEM TO BE SOLVED: To provide a package for housing a semiconductor element, which can operate a semiconductor element normally and stably for a long time, and a semiconductor device.SOLUTION: A package 1 for housing a semiconductor element includes: a metal base body 2 on which a semiconductor element is mounted; a plurality of connection terminals 7 that electrically connects between the semiconductor element and an external circuit board; and a frame body 9. The frame body 9 includes a frame main body 10 formed of an insulator, a first metal layer 13 for bonding the base body 2 and the frame main body 10, and a second metal layer 14 for bonding the connection terminal 7 and the frame main body 10. An end face of the first metal layer 13 is positioned on the outer peripheral side of the frame main body 10 relative to the inner peripheral side of the frame main body 10. A first metal layer non-formation region 15 extends along the inner periphery of the frame main body 10. An end face of the second metal layer 14 is positioned on the outer peripheral side of the frame main body 10 relative to the inner peripheral side of the frame main body 10. A second metal layer non-formation region 16 extends along the inner periphery of the frame main body 10.SELECTED DRAWING: Figure 1

Description

本発明は、半導体素子を収容するための半導体素子収納用パッケージに関するものである。   The present invention relates to a package for housing a semiconductor element for housing a semiconductor element.

近年、半導体素子は高集積化、高密度化が急激に進み、半導体素子の作動時に発する単位体積、単位面積当たりの熱量が急激に多くなっている。特に、パワーデバイス等の大電力、大電流を制御する半導体素子は、高い放熱性が求められることから、放熱性能に特化するための放熱基板によって構成された金属基体上に載置固定される。この場合、半導体素子を収納するための半導体素子収納用パッケージは、基体と、基体の外周部に半導体素子載置部を囲繞するように取着接合されて立設される、絶縁体を含む枠体と、半導体素子と外部の回路基板とを電気的に導通するための接続端子と、によって基本的に構成される。このとき、基体と枠体との接合、および接続端子と枠体との接合は、金属層を介して、ろう材等の接合材を用いて行われる。そして、基体上の載置部に半導体素子を載置固定して、半導体素子収納用パッケージに半導体素子を収納し、ボンディングワイヤ等で半導体素子の電極と接続端子とを電気的に接続することによって製品としての半導体装置となる(例えば、特許文献1参照)。   In recent years, high integration and high density of semiconductor elements have rapidly advanced, and the amount of heat generated per unit volume and unit area during operation of the semiconductor elements has increased rapidly. In particular, semiconductor elements that control large power and large current, such as power devices, are required to have high heat dissipation properties, and are thus mounted and fixed on a metal substrate constituted by a heat dissipation substrate to specialize in heat dissipation performance. . In this case, a package for housing a semiconductor element for housing a semiconductor element includes a base and a frame including an insulator, which is erected and attached to the outer periphery of the base so as to surround the semiconductor element mounting portion. The body and the connection terminal for electrically conducting the semiconductor element and the external circuit board are basically configured. At this time, the bonding between the base body and the frame body and the connection terminal and the frame body are performed using a bonding material such as a brazing material via a metal layer. Then, the semiconductor element is mounted and fixed on the mounting portion on the base, the semiconductor element is stored in the semiconductor element storage package, and the electrodes of the semiconductor element and the connection terminals are electrically connected by bonding wires or the like. It becomes a semiconductor device as a product (see, for example, Patent Document 1).

特開平8−64714号公報JP-A-8-64714

しかしながら、従来、基体と枠体とを、および接続端子と枠体とをろう材を介して接合する際に、接合部からはみ出したろう材が枠体本体の内周部に流れ込むことがあった。その場合、金属から成る基体と接続端子との間で電気的な短絡が発生し、半導体装置を正常に作動させることができないという問題点を有していた。また、十分な絶縁がはかれない場合、パッケージに収納する半導体素子を長期間にわたり正常、且つ安定に作動させることができないという欠点を有していた。したがって、本発明は上記従来の問題点に鑑み完成されたものであり、その目的は、基体と接続端子との絶縁性を向上させて電気的な短絡の発生または絶縁性能の劣化を防止し、パッケージに収納する半導体素子を正常、且つ安定に作動させることができる信頼性の高い半導体素子収納用パッケージおよび半導体装置を提供することにある。   However, conventionally, when joining the base body and the frame body and the connection terminal and the frame body via the brazing material, the brazing material protruding from the joint portion sometimes flows into the inner peripheral portion of the frame body. In this case, there is a problem that an electrical short circuit occurs between the base made of metal and the connection terminal, and the semiconductor device cannot be operated normally. Further, when sufficient insulation is not achieved, there is a drawback that the semiconductor element housed in the package cannot be operated normally and stably over a long period of time. Therefore, the present invention has been completed in view of the above-mentioned conventional problems, and its purpose is to improve the insulation between the base and the connection terminal to prevent the occurrence of an electrical short circuit or the deterioration of the insulation performance, An object of the present invention is to provide a highly reliable semiconductor element storage package and a semiconductor device capable of operating a semiconductor element stored in a package normally and stably.

本発明の一つの態様の半導体素子収納用パッケージは、第1面に半導体素子が載置される載置部を有する金属製の基体と、
前記載置部に載置される半導体素子と外部の回路基板とを電気的に導通するための、1または複数の接続端子と、
前記基体の前記第1面の外周部に前記載置部を囲繞するように取着されるとともに、前記基体と前記接続端子との間に位置して前記基体と前記接続端子とを絶縁する枠体であって、
絶縁体から成る枠体本体と、
前記枠体本体の、前記基体に対向する枠体本体第1面に設けられた第1金属層と、
前記枠体本体の、前記枠体本体第1面とは反対側の枠体本体第2面に設けられ、前記接続端子と接合された第2金属層と、を有する枠体と、を具備し、
前記第1金属層は、前記枠体本体の内周側の端面が、前記枠体本体の端面よりも前記枠体本体の外周側に位置しており、前記枠体本体第1面には内周部に沿って延在する第1金属層非形成領域が設けられ、
前記第2金属層は、前記枠体本体の内周側の端面が、前記枠体本体の端面よりも前記枠体本体の外周側に位置しており、前記枠体本体第2面には内周部に沿って延在する第2金属層非形成領域が設けられていることを特徴とする。
A package for housing a semiconductor element according to one aspect of the present invention includes a metal base having a placement portion on which a semiconductor element is placed on a first surface;
One or a plurality of connection terminals for electrically connecting the semiconductor element mounted on the mounting portion and the external circuit board;
A frame that is attached to an outer peripheral portion of the first surface of the base so as to surround the mounting portion and that is positioned between the base and the connection terminal to insulate the base and the connection terminal Body,
A frame body made of an insulator;
A first metal layer provided on the first surface of the frame body facing the base body of the frame body;
A frame having a second metal layer provided on the frame body second surface opposite to the frame body first surface of the frame body and joined to the connection terminals. ,
In the first metal layer, an end surface on the inner peripheral side of the frame main body is located on the outer peripheral side of the frame main body with respect to the end surface of the frame main body, A first metal layer non-formation region extending along the circumference is provided;
In the second metal layer, an end surface on the inner peripheral side of the frame body is located on an outer peripheral side of the frame body with respect to an end surface of the frame body, and the inner surface is on the second surface of the frame body. A second metal layer non-formation region extending along the circumference is provided.

本発明の一つの態様の半導体装置は、上記の半導体素子収納用パッケージと、前記載置部に載置されるとともに前記接続端子に電気的に接続された半導体素子とを具備していることを特徴とする。   According to another aspect of the present invention, there is provided a semiconductor device including the above-described package for housing a semiconductor element, and a semiconductor element mounted on the mounting portion and electrically connected to the connection terminal. Features.

本発明の一つの態様の半導体素子収納用パッケージによれば、枠体本体第1面には内周部に沿って延在する第1金属層非形成領域が設けられ、枠体本体第2面に内周部に沿って延在する第2金属層非形成領域が設けられる。このような非形成領域が設けられることにより、ろう材等の接合材を用いて、基体の第1面と枠体本体第1面とを接合する際、および接続端子と枠体本体第2面とを接合する際に、接合部からはみ出した接合材を第1金属層非形成領域に収容することによって、接合材が枠体本体の内周部に流れ込み難くすることが可能となる。また、枠体本体の内周部に流れ込んだ接合材によって、接続端子が短絡したり、絶縁性能が劣化したりすることを防止することが可能となる。   According to the package for housing a semiconductor element of one aspect of the present invention, the first surface of the frame body is provided with the first metal layer non-forming region extending along the inner periphery, and the second surface of the frame body. A second metal layer non-formation region is provided extending along the inner periphery. By providing such a non-formation region, when connecting the first surface of the base body and the first frame body main surface using a bonding material such as a brazing material, and the connection terminal and the second frame body main surface. When the bonding material protruding from the bonding portion is accommodated in the first metal layer non-forming region, the bonding material can hardly flow into the inner peripheral portion of the frame body. In addition, it is possible to prevent the connection terminal from being short-circuited or the insulating performance from being deteriorated by the bonding material flowing into the inner peripheral portion of the frame body.

この結果、半導体素子収納用パッケージの信頼性を向上させることが可能となる。これにより、半導体素子を長期間にわたり正常、且つ安定に作動させることができる。   As a result, it is possible to improve the reliability of the semiconductor element storage package. Thereby, the semiconductor element can be operated normally and stably over a long period of time.

また本発明の半導体装置は、上記本発明の半導体素子収納用パッケージと、載置部に載置されるとともに接続端子に電気的に接続された半導体素子とを具備していることにより、上記本発明の半導体素子収納用パッケージを用いた信頼性の高いものとなる。   The semiconductor device of the present invention includes the above-described package for housing a semiconductor element of the present invention and a semiconductor element mounted on the mounting portion and electrically connected to the connection terminal. The semiconductor device housing package of the invention is highly reliable.

本発明の一実施形態の半導体素子収納用パッケージ1の構成の一例を示す外観斜視図である。It is an external appearance perspective view which shows an example of a structure of the package 1 for semiconductor element accommodation of one Embodiment of this invention. 本発明の一実施形態の半導体素子収納用パッケージ1の構成の一例を示す分解斜視図であり、第2金属層14と絶縁体層20が同層の場合の分解斜視図である。1 is an exploded perspective view showing an example of a configuration of a semiconductor element housing package 1 according to an embodiment of the present invention, and is an exploded perspective view in a case where a second metal layer 14 and an insulator layer 20 are the same layer. FIG. 本発明の一実施形態の半導体素子収納用パッケージ1の構成の一例を示す分解斜視図であり、第2金属層14と絶縁体層20が別層の場合の分解斜視図である。FIG. 3 is an exploded perspective view showing an example of the configuration of the semiconductor element housing package 1 according to the embodiment of the present invention, and is an exploded perspective view when the second metal layer 14 and the insulator layer 20 are separate layers. 本発明の一実施形態の半導体素子収納用パッケージ1が具備する枠体9の、枠体本体第1面11側の構成の一例を示す外観斜視図である。It is an external appearance perspective view which shows an example of the structure by the side of the frame main body 1st surface 11 of the frame 9 which the package 1 for semiconductor element accommodation of one Embodiment of this invention comprises. 本発明の一実施形態の半導体素子収納用パッケージ1の構成の一例を示す平面図および断面図を含む図である。It is a figure including the top view and sectional view which show an example of the composition of semiconductor device storage package 1 of one embodiment of the present invention. 本発明の一実施形態の半導体素子収納用パッケージ1の構成の一例を示す断面図であり、図5のA部を拡大した断面図である。It is sectional drawing which shows an example of a structure of the package 1 for semiconductor element accommodation of one Embodiment of this invention, and is sectional drawing to which the A section of FIG. 5 was expanded. 本発明の一実施形態の半導体素子収納用パッケージ1の構成の一例を示す断面図であり、図5のB部を拡大した断面図である。It is sectional drawing which shows an example of a structure of the package 1 for semiconductor element accommodation of one Embodiment of this invention, and is sectional drawing to which the B section of FIG. 5 was expanded. 本発明の他の実施形態の半導体素子収納用パッケージ1の構成の一例を示す断面図であり、図5のB部に相当する部分を拡大した断面図である。It is sectional drawing which shows an example of a structure of the package 1 for semiconductor element accommodation of other embodiment of this invention, and is sectional drawing to which the part corresponded to the B section of FIG. 5 was expanded. 本発明の一実施形態の半導体素子収納用パッケージ1を備える半導体装置50の構成の一例を示す外観斜視図である。It is an external appearance perspective view which shows an example of a structure of the semiconductor device 50 provided with the package 1 for semiconductor element accommodation of one Embodiment of this invention.

以下、本発明の一実施形態の半導体素子収納用パッケージ1について、図面に基づき詳
細に説明する。なお、以降の図において同一の構成については同一の参照符を用いて説明する。図1は本発明の一実施形態の半導体素子収納用パッケージ1の構成の一例を示す外観斜視図である。図2および図3は本発明の一実施形態の半導体素子収納用パッケージ1の構成の一例を示す分解斜視図である。図2は第2金属層14と絶縁体層20が同層の場合を、図3は第2金属層14と絶縁体層20が別層の場合を示す。図4は本発明の一実施形態の半導体素子収納用パッケージ1が具備する枠体9の、枠体本体第1面11側の構成の一例を示す外観斜視図である。図5は本発明の一実施形態の半導体素子収納用パッケージ1の構成の一例を示す平面図および断面図を含む図である。図6は図5のA部を拡大した断面図であり、図7は図5のB部を拡大した断面図である。
Hereinafter, a semiconductor element storage package 1 according to an embodiment of the present invention will be described in detail with reference to the drawings. In the following drawings, the same components will be described using the same reference numerals. FIG. 1 is an external perspective view showing an example of the configuration of a semiconductor element storage package 1 according to an embodiment of the present invention. 2 and 3 are exploded perspective views showing an example of the configuration of the semiconductor element storage package 1 according to the embodiment of the present invention. 2 shows a case where the second metal layer 14 and the insulator layer 20 are the same layer, and FIG. 3 shows a case where the second metal layer 14 and the insulator layer 20 are separate layers. FIG. 4 is an external perspective view showing an example of the configuration of the frame body first surface 11 side of the frame body 9 included in the semiconductor element housing package 1 according to the embodiment of the present invention. FIG. 5 includes a plan view and a cross-sectional view showing an example of the configuration of the semiconductor element storage package 1 according to the embodiment of the present invention. 6 is an enlarged cross-sectional view of part A in FIG. 5, and FIG. 7 is an enlarged cross-sectional view of part B in FIG.

半導体素子収納用パッケージ1は、半導体素子51を収納するための基本構成として、基体2と枠体9と接続端子7とを有する。半導体素子51としては、例えば、SiC系やGaN系のパワーデバイス等の大電力、大電流を用いる素子があげられる。   The semiconductor element housing package 1 includes a base body 2, a frame body 9, and connection terminals 7 as a basic configuration for housing the semiconductor element 51. Examples of the semiconductor element 51 include an element using high power and large current, such as a SiC-based or GaN-based power device.

基体2は、放熱性能に特化するための放熱基板である金属基板によって構成される。すなわち、基体2は、高い放熱性が求められることから金属製で、基体第1面3に半導体素子51が載置される載置部5を有している。基体2は、たとえば矩形板状に形成される。載置部5は、半導体素子収納用パッケージ1に収納される半導体素子51をガラス、樹脂、ろう材等の接着剤を介して基体2の表面に接着固定するための領域である。また、半導体素子51の熱を効率よく外部へ放熱させるために、半導体素子51がペルチェ素子等の熱電冷却素子(図示せず)に搭載された状態で載置部5に載置固定されていてもよい。   The base 2 is constituted by a metal substrate which is a heat dissipation substrate for specializing in heat dissipation performance. That is, the base 2 is made of metal because high heat dissipation is required, and has a mounting portion 5 on which the semiconductor element 51 is mounted on the first surface 3 of the base. The base 2 is formed in a rectangular plate shape, for example. The mounting portion 5 is an area for bonding and fixing the semiconductor element 51 housed in the semiconductor element housing package 1 to the surface of the base 2 through an adhesive such as glass, resin, or brazing material. Further, in order to efficiently dissipate the heat of the semiconductor element 51 to the outside, the semiconductor element 51 is mounted and fixed on the mounting portion 5 in a state where it is mounted on a thermoelectric cooling element (not shown) such as a Peltier element. Also good.

金属基板の材料としては、具体的には、鉄、銅、ニッケル、クロム、コバルト、モリブデンまたはタングステンのような金属、あるいはこれらの金属の合金または複合材、たとえば銅−タングステン合金、銅−モリブデン合金、鉄−ニッケル−コバルト合金などを用いることができる。このような金属材料のインゴット(塊)に切削加工法、金型加工法、圧延加工法、打ち抜き加工法のような従来周知の金属加工法を施すことによって基体2を構成する金属基板を作製することができる。   Specific examples of the metal substrate material include metals such as iron, copper, nickel, chromium, cobalt, molybdenum, and tungsten, or alloys or composites of these metals, such as copper-tungsten alloys and copper-molybdenum alloys. An iron-nickel-cobalt alloy or the like can be used. A metal substrate constituting the base 2 is manufactured by subjecting such a metal material ingot (lumb) to a conventionally known metal processing method such as a cutting method, a die processing method, a rolling method, or a punching method. be able to.

接続端子7は、載置部5に載置される半導体素子51と、図示されない外部の回路基板と、を電気的に導通する。接続端子7は、例えば、銅、鉄、ニッケル、コバルト、クロム、タングステン、モリブデンおよびマンガンなどの金属材料、あるいはこれらの金属の合金または複合材からなり、金属材料の板材が所定の形状に加工されて作製される。接続端子7は、枠体本体第2面12において、枠体本体10を構成する絶縁体の表層に設けられた第2金属層14にろう材等の接合材を介して接合される。接続端子7の一方端には半導体素子51の電極が電気的に接続され、接続端子7の他方端には図示されない外部の回路基板の配線導体が半田等の導電性接着剤を介して電気的に接続される。半導体素子51と接続端子7との接続は、電気信号が伝送できればどのような接続でもよく、複数のボンディングワイヤによる接続、フリップチップ接続、異方性導電フィルム(ACF)による接続などであってもよい。   The connection terminal 7 electrically connects the semiconductor element 51 mounted on the mounting unit 5 and an external circuit board (not shown). The connection terminal 7 is made of, for example, a metal material such as copper, iron, nickel, cobalt, chromium, tungsten, molybdenum and manganese, or an alloy or a composite material of these metals, and a plate material of the metal material is processed into a predetermined shape. Produced. The connection terminal 7 is joined to the second metal layer 14 provided on the surface layer of the insulator constituting the frame body 10 on the second face 12 of the frame body via a joining material such as a brazing material. An electrode of the semiconductor element 51 is electrically connected to one end of the connection terminal 7, and a wiring conductor of an external circuit board (not shown) is electrically connected to the other end of the connection terminal 7 through a conductive adhesive such as solder. Connected to. The connection between the semiconductor element 51 and the connection terminal 7 may be any connection as long as an electric signal can be transmitted, such as connection using a plurality of bonding wires, flip chip connection, connection using an anisotropic conductive film (ACF), or the like. Good.

枠体9が有する枠体本体10は、電気絶縁材料である絶縁体から成る。枠体9は基体第1面3の外周部6に載置部5を囲繞するように取着接合されて立設される。枠体9は、載置部5を取り囲んでいればよい。載置部5は、枠体9の内側の中央部分にあってもよく、その他の部分にあってもよい。また、基体2は枠体9とほぼ同じ外形状を有していてもよいし、本実施形態のように基体第1面3が枠体9よりも大きく、基体2が枠体9より延出する部分があってもよいし、その逆に、基体2より枠体9が延出する部分を有していても良い。枠体本体10としてセラミック材料を用いてもよい。また、枠体本体10は、一種の材料からなっていてもよいが、複数種の材料が積層された構造であってもよい。また、一つの絶縁性基板により枠体本体10が構成されていてもよいし、複数の絶縁性基板を積
層することにより枠体本体10が構成されていてもよい。絶縁性基板としては、例えば、酸化アルミニウム質焼結体、ムライト質焼結体、炭化珪素質焼結体、窒化アルミニウム質焼結体または窒化珪素質焼結体のようなセラミック材料、またはガラスセラミック材料や樹脂材料を用いることができる。
The frame body 10 included in the frame body 9 is made of an insulator that is an electrically insulating material. The frame body 9 is erected and attached to the outer peripheral portion 6 of the base body first surface 3 so as to surround the mounting portion 5. The frame 9 only needs to surround the placement unit 5. The placement portion 5 may be in the central portion inside the frame body 9 or in other portions. The base body 2 may have substantially the same outer shape as the frame body 9, and the base body first surface 3 is larger than the frame body 9 and the base body 2 extends from the frame body 9 as in this embodiment. There may be a part to perform, and conversely, it may have a part from which the frame body 9 extends from the base 2. A ceramic material may be used as the frame body 10. Further, the frame body 10 may be made of a kind of material, but may have a structure in which a plurality of kinds of materials are laminated. Moreover, the frame main body 10 may be comprised by one insulating board | substrate, and the frame main body 10 may be comprised by laminating | stacking a several insulating board | substrate. Examples of the insulating substrate include an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, a ceramic material such as an aluminum nitride sintered body or a silicon nitride sintered body, or a glass ceramic. A material or a resin material can be used.

枠体本体10の作製方法の一例を説明する。上記材料のガラス粉末およびセラミック粉末を含有する原料粉末、有機溶剤並びにバインダを混ぜることにより混合部材を作製する。例えば原料粉末に適切な有機バインダ、可塑剤、溶剤を添加混合して泥漿物である混合部材を作製する。この混合部材を例えばドクターブレード法やカレンダーロール法を採用することによってシート状に成形し、複数のセラミックグリーンシート(生シート)を作製する。作製された複数のセラミックグリーンシートを積層することにより積層体を作製し、積層体を約1600度の温度で焼成することにより枠体本体10が作製される。   An example of a method for manufacturing the frame body 10 will be described. A mixing member is prepared by mixing a raw material powder containing glass powder and ceramic powder of the above materials, an organic solvent, and a binder. For example, an appropriate organic binder, plasticizer, and solvent are added to and mixed with the raw material powder to produce a mixing member that is a slurry. The mixed member is formed into a sheet by employing, for example, a doctor blade method or a calendar roll method, and a plurality of ceramic green sheets (raw sheets) are produced. A laminated body is produced by laminating a plurality of produced ceramic green sheets, and the laminated body is fired at a temperature of about 1600 degrees to produce the frame body 10.

枠体9が有する第1金属層13は、基体2に対向する枠体本体第1面11に設けられる。第1金属層13は、基体2の外周部6において、基体2の基体第1面3と枠体本体第1面11とを接合するために設けられる。このため、第1金属層13は枠体本体第1面を周回させて設けられる。また枠体9が有する第2金属層14は、枠体本体第1面11の反対側の枠体本体第2面12に設けられる。第2金属層14は、接続端子7と枠体本体第2面12とを接合するために設けられる。   The first metal layer 13 included in the frame body 9 is provided on the frame body first surface 11 facing the base body 2. The first metal layer 13 is provided on the outer peripheral portion 6 of the base body 2 to join the base body first surface 3 of the base body 2 and the frame body first surface 11. For this reason, the first metal layer 13 is provided around the first surface of the frame body. The second metal layer 14 included in the frame body 9 is provided on the frame body main body second surface 12 opposite to the frame body main body first surface 11. The second metal layer 14 is provided to join the connection terminal 7 and the frame body second surface 12.

第1金属層13および第2金属層14はタングステン、モリブデン、マンガン等の高融点金属粉末から成る。第1金属層13および第2金属層14は次のようにして形成される。例えばタングステン等の金属粉末に適当な有機バインダ、溶剤を添加混合して得た金属ペーストを枠体本体10となるグリーンシートの枠体本体第1面11および枠体本体第2面12となる面に予め従来周知のスクリーン印刷法により所定パターンに印刷塗布しておく。そして、セラミックグリーンシートとともに約1600度の温度で同時に焼成することにより、第1金属層13および第2金属層14が、枠体本体10の枠体本体第1面11および枠体本体第2面12に所定パターンに設けられる。なお、第1金属層13および第2金属層14の表面にはNiメッキ層を被着形成しておくのがよい。   The first metal layer 13 and the second metal layer 14 are made of a refractory metal powder such as tungsten, molybdenum, or manganese. The first metal layer 13 and the second metal layer 14 are formed as follows. For example, a frame body first surface 11 and a frame body second surface 12 of a green sheet to be a frame body 10 made of a metal paste obtained by adding and mixing a suitable organic binder and solvent to a metal powder such as tungsten. In addition, a predetermined pattern is printed and applied in advance by a conventionally known screen printing method. Then, the first metal layer 13 and the second metal layer 14 are fired simultaneously with the ceramic green sheet at a temperature of about 1600 degrees, so that the frame body first surface 11 and the frame body second surface of the frame body 10 are formed. 12 are provided in a predetermined pattern. Note that a Ni plating layer is preferably deposited on the surfaces of the first metal layer 13 and the second metal layer 14.

第1金属層13は、枠体本体第1面11を基体第1面3に接合させる際の下地金属層として機能する。また、第2金属層14は、枠体本体第2面12に接続端子7を接合させる際の下地金属層として機能する。基体2または接続端子7を接合する際には、例えば銀(Ag)−銅(Cu)ろう等のろう材を介してろう付けされる。また半田等を介して接合してもよい。   The first metal layer 13 functions as a base metal layer when the frame body first surface 11 is bonded to the base first surface 3. The second metal layer 14 functions as a base metal layer when the connection terminal 7 is joined to the frame body second surface 12. When the base body 2 or the connection terminal 7 is joined, it is brazed via a brazing material such as silver (Ag) -copper (Cu) brazing. Moreover, you may join via solder etc.

第1金属層13の第1金属層端面18は、枠体本体10の内周側の枠体本体端面17よりも枠体本体10の外周側に位置している。このため、枠体本体第1面11には枠体本体10の内周部に沿って延在する第1金属層非形成領域15が設けられる。なお、枠体本体10の内周部において、第1金属層端面18が枠体本体端面17よりも枠体本体10の外周側に後退している距離は、例えば枠体本体10の内周と外周との間の幅寸法の2%以上20%以下に設定される。   The first metal layer end face 18 of the first metal layer 13 is positioned on the outer peripheral side of the frame body 10 with respect to the frame body end face 17 on the inner peripheral side of the frame body 10. Therefore, a first metal layer non-formation region 15 extending along the inner periphery of the frame body 10 is provided on the frame body first surface 11. In addition, in the inner peripheral part of the frame main body 10, the distance which the 1st metal layer end surface 18 is retracted to the outer peripheral side of the frame main body 10 rather than the frame main body end surface 17 is, for example, the inner periphery of the frame main body 10 and It is set to 2% or more and 20% or less of the width dimension between the outer periphery.

また第2金属層14の第2金属層端面19は、枠体本体10の内周側の枠体本体端面17よりも枠体本体10の外周側に位置している。このため、枠体本体第2面12には枠体本体10の内周部に沿って延在する第2金属層非形成領域16が設けられる。なお、枠体本体10の内周部において、第2金属層端面19が枠体本体端面17よりも枠体本体10の外周側に後退している距離は、例えば枠体本体10の内周と外周との間の幅寸法の2%以上20%以下に設定される。   Further, the second metal layer end surface 19 of the second metal layer 14 is located on the outer peripheral side of the frame main body 10 with respect to the frame main body end surface 17 on the inner peripheral side of the frame main body 10. Therefore, a second metal layer non-formation region 16 extending along the inner periphery of the frame body 10 is provided on the frame body second surface 12. In addition, in the inner peripheral part of the frame main body 10, the distance by which the 2nd metal layer end surface 19 is set back to the outer peripheral side of the frame main body 10 rather than the frame main body end surface 17 is the inner periphery of the frame main body 10, for example. It is set to 2% or more and 20% or less of the width dimension between the outer periphery.

このような非形成領域が設けられることにより、ろう材等の接合材を用いて、基体第1面3と枠体本体第1面11とを接合する際、および接続端子7と枠体本体第2面12とを接合する際に、接合部からはみ出した接合材を非形成領域に収容することができる。これによって、接合材が枠体本体10の内周部から外側に流れ出すことを防止することが可能となる。この結果、接続端子7の絶縁性が向上し、接合材による接続端子7と基体2との間の電気的な短絡、または絶縁性能の劣化を防止することができ、信頼性を向上させることが可能となる。   By providing such a non-formation region, when the base body first surface 3 and the frame body first surface 11 are bonded using a bonding material such as a brazing material, the connection terminal 7 and the frame body main body When the two surfaces 12 are bonded, the bonding material that protrudes from the bonding portion can be accommodated in the non-forming region. As a result, the bonding material can be prevented from flowing out from the inner peripheral portion of the frame body 10. As a result, the insulation of the connection terminal 7 is improved, and an electrical short circuit between the connection terminal 7 and the base 2 due to the bonding material or deterioration of the insulation performance can be prevented, and the reliability can be improved. It becomes possible.

また本実施形態においては、枠体本体10の内周部において、第1金属層端面18および第2金属層端面19が枠体本体端面17よりも枠体本体10の外周側に後退している距離は略同一であり、平面透視において、前記第1金属層端面18と第2金属層端面19とは重なるように同一位置にある。第1金属層端面18および第2金属層端面19と枠体本体10との間には枠体本体10と第1金属層13および第2金属層14等との熱膨張係数の違いによって応力が生じる。しかし、この応力によって枠体本体10に生じる反りが少なくなり、枠体本体10の内周部付近に生じるクラックや割れを抑制することができる。   In the present embodiment, the first metal layer end face 18 and the second metal layer end face 19 recede from the frame body end face 17 to the outer periphery side of the frame body 10 at the inner periphery of the frame body 10. The distances are substantially the same, and the first metal layer end face 18 and the second metal layer end face 19 are in the same position so as to overlap each other in plan perspective. Stress is caused between the first metal layer end face 18 and the second metal layer end face 19 and the frame body 10 due to the difference in thermal expansion coefficient between the frame body 10 and the first metal layer 13 and the second metal layer 14. Arise. However, warpage generated in the frame body 10 due to this stress is reduced, and cracks and cracks generated in the vicinity of the inner peripheral portion of the frame body 10 can be suppressed.

図1〜図5に示されるとおり、本実施形態においては、半導体素子収納用パッケージ1は、4つの接続端子7を具備している。このため、枠体本体第2面12において、第2金属層14は、4つの接続端子7のそれぞれに対応する位置に、互いに離間させた4つの領域に分割して形成されている。そして、4つの接続端子7のそれぞれが、第2金属層14の4つの領域のそれぞれに接合される。なお、半導体素子収納用パッケージ1が具備する接続端子7の数は、1〜3でもよく、5以上でもよい。   As shown in FIGS. 1 to 5, in the present embodiment, the semiconductor element housing package 1 includes four connection terminals 7. For this reason, on the second frame body main surface 12, the second metal layer 14 is divided into four regions separated from each other at positions corresponding to the four connection terminals 7. Then, each of the four connection terminals 7 is joined to each of the four regions of the second metal layer 14. The number of connection terminals 7 included in the semiconductor element storage package 1 may be 1 to 3, or 5 or more.

また、第2金属層14は、第1金属層13と同じ金属材料から成り、少なくとも枠体本体第2面12の各辺に設けられるとともに、第1金属層13の厚さと同じであるのがよい。熱膨張係数が異なる枠体本体10が、熱膨張係数と厚さが同じ第1金属層13および枠体本体第2面12の各辺に設けられた第2金属層14によって挟まれることになる結果、枠体9に生じる反りや歪みを抑制することができる。   The second metal layer 14 is made of the same metal material as the first metal layer 13 and is provided at least on each side of the frame body second surface 12 and has the same thickness as the first metal layer 13. Good. The frame body 10 having a different thermal expansion coefficient is sandwiched between the first metal layer 13 and the second metal layer 14 provided on each side of the frame body second surface 12 having the same thermal expansion coefficient and thickness. As a result, warpage and distortion generated in the frame body 9 can be suppressed.

さらに、枠体本体第2面12を平面視したときに、外周部6の領域の中で、第2金属層14の4つの領域以外の領域には、絶縁体層20が設けられている。これにより、第2金属層14が設けられていない部分の枠体9の厚みが、第2金属層14が設けられている部分の枠体9の厚みよりも薄くならないようにすることができる。この結果、枠体本体第2面12において、互いに離間する4つの領域に分割されて設けられる第2金属層14の熱膨張や熱収縮によって枠体9が反ったり、歪んだりすることを抑止することができる。その結果、第1金属層13を介して枠体9をろう材等の接合材で基体2に接合する際に、基体2によって枠体9の反りが矯正されたりすることによって、枠体9にクラックが生じることを防ぐことができる。なお、絶縁体層20の厚みt2は、第2金属層14の厚みt1よりも大きくしてもよく、これにより、枠体9の機械的強度をさらに向上させ、枠体9の反りを抑制して、枠体9に生じるクラックを防ぐことができる。   Furthermore, when the frame main body second surface 12 is viewed in plan, the insulator layer 20 is provided in a region other than the four regions of the second metal layer 14 in the region of the outer peripheral portion 6. Thereby, the thickness of the frame 9 in the portion where the second metal layer 14 is not provided can be prevented from being thinner than the thickness of the frame 9 in the portion where the second metal layer 14 is provided. As a result, in the frame body second surface 12, the frame body 9 is prevented from being warped or distorted due to thermal expansion or contraction of the second metal layer 14 provided by being divided into four regions separated from each other. be able to. As a result, when the frame body 9 is bonded to the base body 2 with a bonding material such as a brazing material via the first metal layer 13, the warpage of the frame body 9 is corrected by the base body 2. It can prevent that a crack arises. Note that the thickness t2 of the insulator layer 20 may be larger than the thickness t1 of the second metal layer 14, thereby further improving the mechanical strength of the frame body 9 and suppressing the warp of the frame body 9. Thus, cracks occurring in the frame body 9 can be prevented.

また、枠体本体10の外周形状は平面視したときに略長方形状であり、少なくとも長方形の枠体本体第2面12の角部、かつ枠体9の長辺から隣接する短辺にわたって絶縁体層20が設けられている。これにより、角部の枠体9の厚みを大きくし、外力や応力が集中しやすい角部においてもクラックが生じることを防ぐことが可能となる。また、角部を起点とした枠体9の変形や歪みを抑制することができる。なお、角部以外の部分の絶縁体層20の厚みと比較して、角部分の絶縁体層20の厚みだけを特に大きくしてもよい。さらに、図7において示されるとおり、絶縁体層20は、第2金属層14の4つの領域のそれぞれから離間して設けられていてもよい。換言すると、絶縁体層端面23と第2金属層14との間に空隙が設けられていてもよい。これにより、第2金属層14が高温で熱膨張し
た際にも、第2金属層14と絶縁体層20との間に隙間があることにより、第2金属層14と絶縁体層20との間に生じる応力を緩和することが可能となる。
Further, the outer peripheral shape of the frame body 10 is substantially rectangular when viewed from above, and is an insulator over at least the corners of the rectangular frame body second surface 12 and the long side of the frame body 9 to the adjacent short side. A layer 20 is provided. As a result, the thickness of the corner frame 9 can be increased, and cracks can be prevented from occurring even in corners where external forces and stresses tend to concentrate. Moreover, the deformation | transformation and distortion of the frame 9 from the corner | angular part can be suppressed. Note that only the thickness of the insulating layer 20 at the corner portion may be particularly increased as compared with the thickness of the insulating layer 20 at the portion other than the corner portion. Furthermore, as shown in FIG. 7, the insulator layer 20 may be provided separately from each of the four regions of the second metal layer 14. In other words, a gap may be provided between the insulator layer end face 23 and the second metal layer 14. Thereby, even when the second metal layer 14 is thermally expanded at a high temperature, there is a gap between the second metal layer 14 and the insulator layer 20, so that the second metal layer 14 and the insulator layer 20 have a gap. It becomes possible to relieve the stress generated therebetween.

次に、本発明の他の実施形態の半導体素子収納用パッケージ1について、図8に基づき説明する。図8は本発明の他の実施形態の半導体素子収納用パッケージ1の構成の一例を示す断面図であり、図5のB部に相当する部分を拡大した断面図である。図8において示されるとおり、絶縁体層20には、枠体本体10に対向する絶縁体層第1面21の反対側の絶縁体層第2面22と、第2金属層14に近接する絶縁体層端面23との稜角部24に、湾曲部25が設けられている。湾曲部25は、傾斜面であってもよい。これにより、特に応力が集中しやすい稜角部24において生じる応力集中を緩和することが可能となる。   Next, a semiconductor element storage package 1 according to another embodiment of the present invention will be described with reference to FIG. FIG. 8 is a cross-sectional view showing an example of the configuration of the semiconductor element housing package 1 according to another embodiment of the present invention, and is an enlarged cross-sectional view corresponding to a portion B in FIG. As shown in FIG. 8, the insulator layer 20 includes an insulator layer second surface 22 on the opposite side of the insulator layer first surface 21 facing the frame body 10, and insulation adjacent to the second metal layer 14. A curved portion 25 is provided at the ridge corner 24 with the body layer end face 23. The curved portion 25 may be an inclined surface. As a result, it is possible to alleviate stress concentration that occurs at the ridge corner 24 where stress is particularly likely to concentrate.

図9は、一例として本発明の一実施形態の半導体素子収納用パッケージ1を備える半導体装置50の構成の一例を示す斜視図である。半導体装置50を組み立てる場合、基体2の載置部5に半導体素子51を載置して基体2に接着剤等を介して接着固定し、半導体素子51と接続端子7とをボンディングワイヤ等を介して電気的に接続する。このようにして、基体2、枠体9および接続端子7から成る半導体素子収納用パッケージ1を用いた半導体素子51を収納する製品としての半導体装置50が完成する。なお、本発明は以上の実施の形態の例および実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲内で種々の変更を施すことは何等支障ない。   FIG. 9 is a perspective view showing an example of the configuration of the semiconductor device 50 including the semiconductor element storage package 1 according to the embodiment of the present invention as an example. When assembling the semiconductor device 50, the semiconductor element 51 is mounted on the mounting portion 5 of the base 2 and is bonded and fixed to the base 2 via an adhesive or the like, and the semiconductor element 51 and the connection terminal 7 are connected via a bonding wire or the like. Connect them electrically. In this manner, the semiconductor device 50 as a product for storing the semiconductor element 51 using the semiconductor element storage package 1 including the base body 2, the frame body 9 and the connection terminal 7 is completed. It should be noted that the present invention is not limited to the above-described embodiments and examples, and various modifications can be made without departing from the scope of the present invention.

1 半導体素子収納用パッケージ
2 基体
3 基体第1面
5 載置部
6 外周部
7 接続端子
9 枠体
10 枠体本体
11 枠体本体第1面
12 枠体本体第2面
13 第1金属層
14 第2金属層
15 第1金属層非形成領域
16 第2金属層非形成領域
17 枠体本体の端面
18 第1金属層端面
19 第2金属層端面
20 絶縁体層
21 絶縁体層第1面
22 絶縁体層第2面
23 絶縁体層端面
24 稜角部
25 湾曲部
50 半導体装置
51 半導体素子
t1 第2金属層厚み
t2 絶縁体層厚み
DESCRIPTION OF SYMBOLS 1 Semiconductor device storage package 2 Base | substrate 3 Base | substrate 1st surface 5 Mounting part 6 Outer peripheral part 7 Connection terminal 9 Frame body 10 Frame body main body 11 Frame body main body 1st surface 12 Frame body main body 2nd surface 13 1st metal layer 14 Second metal layer 15 First metal layer non-formation region 16 Second metal layer non-formation region 17 End surface 18 of frame body First metal layer end surface 19 Second metal layer end surface 20 Insulator layer 21 Insulator layer first surface 22 Insulator layer second surface 23 Insulator layer end surface 24 Edge corner portion 25 Bending portion 50 Semiconductor device 51 Semiconductor element t1 Second metal layer thickness t2 Insulator layer thickness

Claims (10)

第1面に半導体素子が載置される載置部を有する金属製の基体と、
前記載置部に載置される半導体素子と外部の回路基板とを電気的に導通するための、1または複数の接続端子と、
前記基体の前記第1面の外周部に前記載置部を囲繞するように取着されるとともに、前記基体と前記接続端子との間に位置して前記基体と前記接続端子とを絶縁する枠体であって、
絶縁体から成る枠体本体と、
前記枠体本体の、前記基体に対向する枠体本体第1面に設けられた第1金属層と、
前記枠体本体の、前記枠体本体第1面とは反対側の枠体本体第2面に設けられ、前記接続端子と接合された第2金属層と、を有する枠体と、を具備し、
前記第1金属層は、前記枠体本体の内周側の端面が、前記枠体本体の端面よりも前記枠体本体の外周側に位置しており、前記枠体本体第1面には内周部に沿って延在する第1金属層非形成領域が設けられ、
前記第2金属層は、前記枠体本体の内周側の端面が、前記枠体本体の端面よりも前記枠体本体の外周側に位置しており、前記枠体本体第2面には内周部に沿って延在する第2金属層非形成領域が設けられていることを特徴とする半導体素子収納用パッケージ。
A metal base having a mounting portion on which the semiconductor element is mounted on the first surface;
One or a plurality of connection terminals for electrically connecting the semiconductor element mounted on the mounting portion and the external circuit board;
A frame that is attached to an outer peripheral portion of the first surface of the base so as to surround the mounting portion and that is positioned between the base and the connection terminal to insulate the base and the connection terminal Body,
A frame body made of an insulator;
A first metal layer provided on the first surface of the frame body facing the base body of the frame body;
A frame having a second metal layer provided on the frame body second surface opposite to the frame body first surface of the frame body and joined to the connection terminals. ,
In the first metal layer, an end surface on the inner peripheral side of the frame main body is located on the outer peripheral side of the frame main body with respect to the end surface of the frame main body, A first metal layer non-formation region extending along the circumference is provided;
In the second metal layer, an end surface on the inner peripheral side of the frame body is located on an outer peripheral side of the frame body with respect to an end surface of the frame body, and the inner surface is on the second surface of the frame body. A package for housing a semiconductor element, characterized in that a second metal layer non-formation region extending along the periphery is provided.
前記枠体本体の前記内周部において、前記第2金属層の端面と、前記第1金属層の端面とが平面透視において同一位置にあることを特徴とする請求項1に記載の半導体素子収納用パッケージ。   2. The semiconductor element housing according to claim 1, wherein an end surface of the second metal layer and an end surface of the first metal layer are in the same position in a plan view in the inner peripheral portion of the frame body. For package. 前記接続端子を複数具備し、
前記枠体本体第2面において、前記第2金属層は、前記複数の接続端子のそれぞれに対応する、互いに離間する複数の領域に分割され、
前記複数の接続端子のそれぞれが、前記第2金属層の前記複数の領域のそれぞれによって、前記枠体本体第2面に接合されることを特徴とする請求項1または請求項2に記載の半導体素子収納用パッケージ。
A plurality of the connection terminals,
In the second surface of the frame body, the second metal layer is divided into a plurality of regions that are spaced apart from each other, corresponding to each of the plurality of connection terminals,
3. The semiconductor according to claim 1, wherein each of the plurality of connection terminals is joined to the second surface of the frame body by each of the plurality of regions of the second metal layer. Package for element storage.
前記枠体本体第2面において、前記第2金属層の前記複数の領域以外の領域に、絶縁体層が設けられることを特徴とする請求項3に記載の半導体素子収納用パッケージ。   4. The package for housing a semiconductor element according to claim 3, wherein an insulator layer is provided in a region other than the plurality of regions of the second metal layer on the second surface of the frame body. 5. 前記枠体本体の外周形状は平面視したときに略長方形状であり、該長方形の角部に前記絶縁体層が設けられることを特徴とする請求項4に記載の半導体素子収納用パッケージ。   5. The package for housing a semiconductor element according to claim 4, wherein the outer peripheral shape of the frame body is substantially rectangular when viewed from above, and the insulator layer is provided at corners of the rectangle. 前記絶縁体層は、前記第2金属層の前記複数の領域のそれぞれから離間して設けられることを特徴とする請求項4または請求項5に記載の半導体素子収納用パッケージ。   6. The package for housing a semiconductor element according to claim 4, wherein the insulator layer is provided apart from each of the plurality of regions of the second metal layer. 前記絶縁体層は、前記枠体本体に対向する面の反対側の面と、前記第2金属層に近接する面との稜角部に、傾斜部または湾曲部が設けられることを特徴とする請求項4乃至請求項6のいずれかに記載の半導体素子収納用パッケージ。   The insulating layer is provided with an inclined portion or a curved portion at a ridge angle portion between a surface opposite to a surface facing the frame body and a surface close to the second metal layer. The package for housing a semiconductor device according to any one of claims 4 to 6. 前記絶縁体層の厚みは、前記第2金属層の厚みと同じであることを特徴とする請求項4乃至請求項7のいずれかに記載の半導体素子収納用パッケージ。   8. The package for housing a semiconductor element according to claim 4, wherein a thickness of the insulator layer is the same as a thickness of the second metal layer. 9. 前記絶縁体層の厚みは、前記第2金属層の厚みよりも大きいことを特徴とする請求項4乃至請求項7のいずれかに記載の半導体素子収納用パッケージ。   8. The package for housing a semiconductor element according to claim 4, wherein a thickness of the insulator layer is larger than a thickness of the second metal layer. 9. 請求項1乃至請求項9のいずれかに記載の半導体素子収納用パッケージと、前記載置部
に載置されるとともに前記接続端子に電気的に接続された半導体素子とを具備していることを特徴とする半導体装置。
A package for housing a semiconductor element according to any one of claims 1 to 9, and a semiconductor element mounted on the mounting portion and electrically connected to the connection terminal. A featured semiconductor device.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023053332A1 (en) * 2021-09-30 2023-04-06 住友大阪セメント株式会社 Optical waveguide element, and optical transmission apparatus and optical modulation device using same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023053332A1 (en) * 2021-09-30 2023-04-06 住友大阪セメント株式会社 Optical waveguide element, and optical transmission apparatus and optical modulation device using same

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