JP3764074B2 - 電子機器の製造方法および加工システム - Google Patents

電子機器の製造方法および加工システム Download PDF

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Publication number
JP3764074B2
JP3764074B2 JP2001236547A JP2001236547A JP3764074B2 JP 3764074 B2 JP3764074 B2 JP 3764074B2 JP 2001236547 A JP2001236547 A JP 2001236547A JP 2001236547 A JP2001236547 A JP 2001236547A JP 3764074 B2 JP3764074 B2 JP 3764074B2
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Japan
Prior art keywords
hole
electronic component
wire
width
substrate
Prior art date
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Expired - Fee Related
Application number
JP2001236547A
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English (en)
Japanese (ja)
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JP2003051579A5 (enExample
JP2003051579A (ja
Inventor
照美 仲沢
四郎 大内
磯野  忠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Astemo Ltd
Original Assignee
Hitachi Ltd
Hitachi Car Engineering Co Ltd
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Priority to JP2001236547A priority Critical patent/JP3764074B2/ja
Publication of JP2003051579A publication Critical patent/JP2003051579A/ja
Publication of JP2003051579A5 publication Critical patent/JP2003051579A5/ja
Application granted granted Critical
Publication of JP3764074B2 publication Critical patent/JP3764074B2/ja
Anticipated expiration legal-status Critical
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6605High-frequency electrical connections
    • H01L2223/6611Wire connections
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
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    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009Pre-treatment of the connector or the bonding area
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    • H01L2924/161Cap
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    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP2001236547A 2001-08-03 2001-08-03 電子機器の製造方法および加工システム Expired - Fee Related JP3764074B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001236547A JP3764074B2 (ja) 2001-08-03 2001-08-03 電子機器の製造方法および加工システム

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Application Number Priority Date Filing Date Title
JP2001236547A JP3764074B2 (ja) 2001-08-03 2001-08-03 電子機器の製造方法および加工システム

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JP2003051579A JP2003051579A (ja) 2003-02-21
JP2003051579A5 JP2003051579A5 (enExample) 2004-08-26
JP3764074B2 true JP3764074B2 (ja) 2006-04-05

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100751471B1 (ko) 2006-02-02 2007-08-23 영풍전자 주식회사 연성인쇄회로기판의 윈도우 오픈부 형성 방법
CN101578695B (zh) * 2006-12-26 2012-06-13 松下电器产业株式会社 半导体元件的安装结构体及半导体元件的安装方法
JP6956823B2 (ja) * 2015-05-08 2021-11-02 アジャイル・パワー・スイッチ・3・ディー−インテグレイション・エイ・ピー・エス・アイ・3・ディー 半導体パワーデバイスの組立て方法

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