JP3748904B2 - Liquid crystal display - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a liquid crystal display device, and more particularly to a TFT (Thin Film Transi). st or) It relates to a technology effective when applied to a liquid crystal display.
[0002]
[Prior art]
Conventionally, a TFT liquid crystal display module is known as one of TFT liquid crystal displays.
[0003]
FIG. 39 is a block diagram showing a schematic configuration of the conventional TFT liquid crystal display module.
[0004]
In FIG. 39, the liquid crystal display panel (LCD) is composed of 640 × 3 × 480 pixels, and drain drivers 511 are arranged above and below the liquid crystal display panel (LCD). Connected to the drain line (D), a voltage for driving the liquid crystal is supplied to the thin film transistor TFT.
[0005]
A gate driver 506 disposed on the side surface of the liquid crystal display panel (LCD) is connected to the gate line (G) of the thin film transistor TFT to supply a voltage to the gate of the thin film transistor TFT for one horizontal operation time.
[0006]
A display control device 501 composed of one semiconductor integrated circuit (LSI) receives display data and a display control signal from the main body computer, and drives the drain driver 511 and the gate driver 506 based on the data.
[0007]
In this case, display data from the main computer is transferred in units of one pixel, that is, each data of red (R), green (G), and blue (B) is made into one set.
[0008]
Here, the display data is composed of 12 bits of 4 bits for each color or 18 bits of 6 bits for each color.
[0009]
Further, since the drain driver 511 is arranged above and below, the output for driving the drain driver 511 from the display control device 501 has two systems for both the control signal and the display data bus.
[0010]
FIG. 40 is a block diagram showing a schematic configuration of a drain driver 511 of a conventional TFT liquid crystal display module.
[0011]
As shown in FIG. 40, the drain driver 511 includes a data latch section 551 for display data and an output voltage generation circuit 552.
[0012]
Note that the drain driver 511 shown in FIG. 40 receives 6-bit display data and 9-level gradation reference voltage from the outside, and obtains an output voltage value of 64 levels.
[0013]
The data latch unit 551 fetches display data by the number of outputs in synchronization with the display data latch clock signal (CL1), and the output voltage generation circuit 552 generates the 64th floor generated from the gradation reference voltage input from the outside. Among the output voltages, the output voltage corresponding to the display data from the data latch unit 551 is selected and output to the drain signal line.
[0014]
FIG. 41 is a diagram showing an outline of the circuit configuration of the output voltage generation circuit 552 of the drain driver 511 of the conventional TFT liquid crystal display module. One circuit among the output voltage generation circuits provided for the total number of drain signal lines is shown. The circuit configuration of is shown.
[0015]
As shown in FIG. 41, the output voltage generating circuit is a circuit between nine gray scale reference voltages (V0 to V8) inputted from the outside. The A voltage value (VO0 to VO64) divided into eight equal parts is generated, selected by the decoder 553, and output.
[0016]
FIG. 42 is a diagram showing the relationship between the gradation reference voltage and the output voltage in FIG.
[0017]
In FIG. 42, 65 output voltage values are obtained in total, but among them, VO64 equal to V8 is not used.
[0018]
When the display data of the TFT liquid crystal display module is composed of 6 bits for each color, when the display data is transmitted with 4 bits for each color from the main body computer, 4 bits from the main body computer are displayed. The display data in the TFT liquid crystal display module is the upper 4 bits data of 6 bits, and the lower 2 bits without input data are fixed to Low or High. The bit display data is converted into 6-bit display data for each color of the TFT liquid crystal display module.
[0019]
In addition, it has been conventionally known that a low-voltage drain driver can be used by adopting a common electrode AC driving method in which the voltage applied to the common electrode is AC as a common electrode driving method of the TFT liquid crystal display module. Yes.
[0020]
[Problems to be solved by the invention]
In general, it is clear from the applied voltage-transmittance characteristics of a typical liquid crystal shown in FIG. Et As such, the voltage applied to the liquid crystal and its transparency are non-linear.
[0021]
Bright from FIG. Et As described above, the applied voltage-transmittance characteristics of the liquid crystal are markedly non-linear at both ends of the operating voltage range and relatively linear at the center.
[0022]
Usually, it is possible to obtain a linear preferable gradation display by inputting a voltage value in accordance with this nonlinear characteristic to the drain driver.
[0023]
However, the 9-level gradation reference voltage (VI0 to VI8) input from the outside The In the drain driver 511 that generates voltage values (VO0 to VO64) divided into eight equal parts and selects and outputs them, the output voltage can be arbitrarily set by the user out of all 64 gradations. There is only gradation.
[0024]
In addition, the grayscale voltages generated inside the drain driver 511 are equally spaced between the grayscale reference voltages input from the outside in order to simplify the versatility of the drain driver 511 and the internal circuit of the drain driver 511. It is generated by partial pressure.
[0025]
For this reason, the gradation voltage generated inside the drain driver 511 has a problem that a deviation occurs from a voltage for obtaining a desirable linear and preferable gradation display.
[0026]
In the central portion of the operating voltage range where the applied voltage-transmittance characteristics of the liquid crystal exhibit a relatively linear characteristic, the influence of the “deviation” is not so great, but at both ends of the operating voltage where the nonlinear characteristics are significant, this “ The influence of “shift” cannot be ignored, and there is a problem that good gradation display characteristics cannot be obtained.
[0027]
Although it is possible to reduce this “deviation” by increasing the number of gradation reference voltages input from the outside, this method drives the drain driver 511, which increases the number of input leads of the drain driver 511. For this reason, there is a problem that the external circuit configuration is complicated and not practical.
[0029]
The present invention was made to solve the problems of the prior art, The purpose of the present invention is to Liquid crystal display To display good gradation But Possible Become To provide technology.
[0031]
The above and other objects and novel configurations of the present invention will become apparent from the description of the present specification and the accompanying drawings.
[0032]
[Means for Solving the Problems]
Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.
[0033]
That is, the present invention provides a plurality of pixels having pixel electrodes and thin film transistors provided in a matrix, Provided in the row direction to which the gate electrode of the thin film transistor in the row direction is connected Multiple gate signal lines; Provided in the column direction to which the drain electrode of the thin film transistor in the column direction is connected A TFT liquid crystal display panel having a plurality of drain signal lines;
A gate driving circuit for driving the plurality of gate signal lines; a drain driving circuit for driving the plurality of drain signal lines; and a display control device for controlling the gate driving circuit and the drain driving circuit. Shi The drain driving circuit is External circuit By Supply Is Double Number of gradation reference voltages Vn On the basis of the A plurality of intermediate voltages interpolated between the plurality of gradation reference voltages Vn The The gradation reference voltage Vn is generated, and the corresponding gradation level becomes higher as n increases. V0 is the lowest gradation and Vm is the reference voltage corresponding to the largest gradation, and is the highest at (Vm + V0) / 2. When the near gradation reference voltage is Vi, the number of intermediate voltage levels between V (i−1) and Vi generated by the drain driving circuit is between V0 and V1 and between V (m−1) and Vm. More than the number of intermediate voltage levels.
[0034]
The present invention also provides: The number of levels of intermediate voltage between V (i−1) and Vi generated by the drain driving circuit is two or more than the number of intermediate voltages between V0 and V1 and between V (m−1) and Vm. It is characterized by many.
[0035]
[Action]
in front Scribe According to the stage ,liquid In the region where the applied voltage-transmittance characteristic of the crystal is relatively linear, the number of intermediate voltages interpolated between the reference voltages is increased, and in the region where the applied voltage-transmittance characteristic of the liquid crystal is non-linear, it is within the reference voltage. Since the number of intermediate voltages to be inserted is reduced, a gamma correction voltage suitable for the applied voltage-transmittance characteristics of the liquid crystal can be obtained without increasing the number of reference voltages input from the outside. It is possible to obtain a good gradation display.
[0038]
【Example】
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0039]
In all the drawings for explaining the embodiments, parts having the same functions are given the same reference numerals, and repeated explanation thereof is omitted.
[0040]
FIG. 1 shows a liquid crystal display device according to the present invention. reference Example ( reference It is a block diagram which shows the circuit arrange | positioned in the TFT liquid crystal display panel of the TFT liquid crystal display module which is Example 1), and its periphery.
[0041]
Book reference In the TFT liquid crystal display module of Example 1, the drain driver unit 103 is disposed on the upper side of the TFT liquid crystal display panel (TFT-LCD), and the gate driver unit 104 is provided on the side surface of the TFT liquid crystal display panel (TFT-LCD). A controller unit 101 and a power supply unit 102 are arranged.
[0042]
The drain driver unit 103, the gate driver unit 104, the controller unit 101, and the power supply unit 102 are each mounted on a dedicated printed circuit board.
[0043]
The liquid crystal display panel (LCD) is composed of 640 × 3 × 480 pixels.
[0044]
FIG. 2 is a diagram showing an equivalent circuit of the TFT liquid crystal display panel (TFTP-LCD) shown in FIG.
[0045]
As shown in FIG. 2, the thin film transistor TFT is disposed in an intersection region between two adjacent drain signal lines D and two adjacent gate signal lines G.
[0046]
The drain electrode and the gate electrode of the thin film transistor TFT are connected to the drain signal line D and the gate signal line G, respectively.
[0047]
Since the source electrode of the thin film transistor TFT is connected to the pixel electrode, and the liquid crystal layer is provided between the pixel electrode and the common electrode, the liquid crystal capacitor CLC is equivalently connected between the source electrode of the thin film transistor TFT.
[0048]
The thin film transistor TFT becomes conductive when a positive bias voltage is applied to the gate electrode, and becomes non-conductive when a negative bias voltage is applied to the gate electrode.
[0049]
A storage capacitor CADD is connected between the source electrode of the thin film transistor TFT and the previous gate signal line.
[0050]
It should be understood that the source electrode and the drain electrode are originally determined by the bias polarity between them, and the polarity is inverted during the operation in the circuit of this liquid crystal display device, so that the source electrode and the drain electrode are interchanged during the operation. However, in the following description, for convenience, one is fixed as a source electrode and the other is fixed as a drain electrode.
[0051]
In this case, a dummy gate signal line (G0) is provided outside the gate signal line (G1) in order to prevent the other end of the storage capacitor CADD in the first gate line from being opened. The other end of the holding capacitor CADD is connected to the dummy gate signal line (G0).
[0052]
In the equivalent circuit of one pixel of the TFT liquid crystal display panel (TFT-LCD) shown in FIG. 3, stray capacitances CGD and CGS exist between the drain and gate of the thin film transistor TFT and between the gate and source.
[0053]
Therefore, as shown in FIG. 4, a series circuit of a storage capacitor CADD and a gate-source stray capacitor CGS is connected between the gate signal lines.
[0054]
However, since there is no gate signal line outside the gate signal line (Gend) of the final line, the gate signal is between the final gate signal line (Gend) and the other gate signal lines (G1 to Gend-1). The capacitance value of the capacitor connected to the line is different.
[0055]
Book reference In the TFT liquid crystal display module of Example 1, a dummy gate signal line (Gend + 1) is provided outside the final gate signal line (Gend) so that the capacitance values of capacitors connected to the gate signal line are substantially the same. .
[0056]
Further, the dummy gate signal lines (G0, Gend + 1) provided on both sides of the regular gate signal lines (G1 to Gend) also have an effect of preventing static electricity from entering during the manufacturing process.
[0057]
As is well known, the storage capacitor CADD functions to reduce the influence of the change in the gate potential on the pixel electrode potential when the thin film transistor (TFT) is switched.
[0058]
The storage capacitor CADD also has an action of extending the discharge time, and accumulates video information after the thin film transistor TFT is turned off for a long time.
[0059]
Figure 5 shows the book reference 2 is a block diagram showing a schematic configuration of each driver (drain driver, gate driver, common driver) of the TFT liquid crystal display module of Example 1 and a signal flow. FIG.
[0060]
5, the display control device 201 and the buffer circuit 210 are provided in the controller unit 101 shown in FIG. 1, the drain driver 211 is provided in the drain driver unit 103 shown in FIG. 1, and the gate driver 206 is the gate driver shown in FIG. The unit 104 is provided.
[0061]
Similar to the drain driver 511 shown in FIG. 40, the drain driver 211 includes a data latch unit for display data and an output voltage generation circuit.
[0062]
The gradation reference voltage generator 208, multiplexer 209, common voltage generator 202, common driver 203, level shift circuit 207, gate-on voltage generator 204, gate-off voltage generator 205, and DC-DC converter 212 are shown in FIG. Provided in the power supply unit 102.
[0063]
As described in the prior art, in the conventional common electrode AC driving method, a square wave is used as the AC waveform, so that a large peak current flows through the common electrode driving transistor when the phase is switched, A transistor having a large value is required, and the drive circuit is enlarged accordingly.
[0064]
In order to solve the above problems, this book reference In the TFT liquid crystal display module of Example 1, the common voltage generator 202 shown in FIG. 5 converts the square wave AC signal (M) into a trapezoidal AC signal, and converts the trapezoidal AC drive voltage to the common electrode. Is applied.
[0065]
FIG. 6 is a diagram showing a circuit configuration and input / output waveforms of the common voltage generation unit 202 shown in FIG.
[0066]
In the common voltage generation circuit 302 in FIG. 6A, when the high-level square wave shown in FIG. 6B is applied to the AC signal input terminal of the operational amplifier OP1, a current is passed through the resistor R1 and the capacitor C1. When the capacitor C1 is charged, the output voltage of the operational amplifier OP1 gradually decreases.
[0067]
When the potential difference between both ends of the capacitor C1 exceeds the forward voltage of the diode D1 connected in parallel with the capacitor C1, the diode D1 is turned on, so that the output voltage of the operational amplifier OP1 is a constant voltage on the low potential side. It becomes.
[0068]
When a low-level square wave shown in FIG. 6B is applied to the AC signal input terminal of the operational amplifier, the capacitor C1 is charged via the capacitor C1 and the resistor R1, whereby the output of the operational amplifier OP1. The voltage gradually increases.
[0069]
When the potential difference between both ends of the capacitor C1 exceeds the forward voltage of the diode D2 connected in parallel with the capacitor C1, the diode D2 is turned on, so that the output voltage of the operational amplifier OP1 is a constant voltage on the high potential side. It becomes.
[0070]
Thereby, as shown in FIG. 6B, a trapezoidal AC signal is obtained from the output terminal of the operational amplifier.
[0071]
The trapezoidal wave amplitude level can be changed by connecting a plurality of diodes D1 and D2 in series.
[0072]
By inputting the trapezoidal AC signal to the common driver 203 and driving the common electrode with the trapezoidal AC drive voltage, the peak current of the driving transistor can be suppressed as shown in FIG. As a result, the drive circuit of the TFT liquid crystal display module can be reduced in size, and the outer size of the TFT liquid crystal display module can be reduced.
[0073]
In the equivalent circuit shown in FIG. 3, the other end of the liquid crystal capacitor CLC is connected to the common electrode COM.
[0074]
And books reference In the TFT liquid crystal display module of Example 1, since the common electrode is driven with an AC drive waveform, the previous gate signal line to which the other end of the holding capacitor CADD is connected also has an AC drive waveform applied to the common electrode. Unless an AC drive waveform having the same phase and the same amplitude is added for driving, the potential difference between both ends of the liquid crystal capacitor CLC cannot be kept constant.
[0075]
So book reference In the TFT liquid crystal display module of Example 1, as shown in FIG. 5, an AC signal from the common voltage generator 202 is input to the gate-on voltage generator 204 and the gate-off voltage generator 205, and a common electrode AC drive waveform is added. A gate-on voltage and a gate-off voltage are generated.
[0076]
Figure 8 shows the book reference 4 is a diagram illustrating a circuit configuration of a gate-on voltage generation unit 204 and a gate-off voltage generation unit 205 in the TFT liquid crystal display module of Example 1. FIG.
[0077]
In FIG. 8, the gate-on voltage generation circuit 304 is composed of a level shift circuit composed of a constant current source I1 and a Zener diode ZD1, and a buffer circuit composed of an operational amplifier OP2, a PNP transistor TR1, and an NPN transistor TR2. The output voltage of the common driver 203 is shifted by a level shift circuit, and the shifted voltage is amplified by a buffer circuit.
[0078]
The gate-off voltage generation circuit 305 includes a level shift circuit including a constant current source I2 and a Zener diode ZD2, and a buffer circuit including an operational amplifier OP3, a PNP transistor TR3, and an NPN transistor TR4. The output voltage of the driver 203 is shifted by a level shift circuit, and the shifted voltage is amplified by a buffer circuit.
[0079]
FIG. 9 shows the common voltage applied to the common electrode, the drain voltage applied to the drain, the level of the gate voltage applied to the gate electrode, and the waveform thereof.
[0080]
In FIG. 9, the drain waveform indicates the drain waveform when black is displayed.
[0081]
In the circuit shown in FIG. 5, the common electrode AC drive waveform is added to both the gate-on voltage and the gate-off voltage. However, since the thin film transistor TFT can operate even when the gate-on voltage is a DC voltage, in FIG. The generation unit 204 can be omitted.
[0082]
By omitting the gate-on voltage generation unit 204, the circuit configuration is simplified, and the TFT liquid crystal display module can be downsized.
[0083]
FIG. 10 shows the common voltage applied to the common electrode, the drain voltage applied to the drain, the level of the gate voltage applied to the gate electrode, and the waveform when the gate-on voltage generation unit 204 is omitted.
[0084]
Further, as described above, the other end of the storage capacitor CADD in the first gate line is connected to the dummy gate signal line (G0).
[0085]
By applying a normal gate drive voltage (gate-on voltage, gate-off voltage) to the first dummy gate signal line (G0), the drive conditions can be made the same as the other gate signal lines. The contrast of the pixels on the line can be improved.
[0086]
Further, by applying a normal gate drive voltage (gate-on voltage, gate-off voltage) to the final dummy gate signal line (Gend + 1), the drive condition can be made the same as other gate signal lines. As a result, the contrast of the pixels in the final line can be improved.
[0087]
FIG. 11 shows a liquid crystal display device of the present invention. reference Example ( reference It is a figure which shows the circuit structure of the power supply part of the TFT liquid crystal display module which is Example 2).
[0088]
Book reference In Example 2, the gate-on voltage generation unit is omitted.
[0089]
In FIG. 11, the gradation reference voltage generation unit 208, the multiplexer 209, the common voltage generation unit 202, the common driver 203, the level shift circuit 207, the gate-off voltage generation unit 205, and the DC-DC converter 212 in FIG. Shown in dotted frame.
[0090]
In FIG. 11, a current mirror circuit CM corresponds to the constant current source I2 shown in FIG. 8, and a Zener diode ZD1 and the current mirror circuit CM constitute a level shift circuit.
[0091]
The output voltage from the common driver 203 is level-shifted in the level shift circuit, and the level-shifted voltage is taken out as a gate-off voltage.
[0092]
In FIG. 11, the frame signal (FLM) and the clock signal (CL3) are level-shifted by the level shift circuits (410, 420) and input to the buffer circuit 430.
[0093]
The frame signal (FLM) and the clock signal (CL3) output from the buffer circuit 430 are input to the gate driver.
[0094]
However, if noise is superimposed on the positive power supply for some reason, the buffer circuit operates with reference to the positive power supply, so that the buffer circuit 430 malfunctions and the TFT liquid crystal display module performs an erroneous display.
[0095]
For this reason, in the circuit configuration shown in FIG. 11, the capacitor C2 is connected between the positive power supply and the level shift circuit output.
[0096]
The malfunction of the buffer circuit 430 will be described with reference to FIG.
[0097]
In the differential amplifier type level shift circuit shown in FIG. 12A, when noise as shown in FIG. 12B is superimposed on the positive power supply, when the capacitor C2 is not connected, the level shift circuit of FIG. Since the noise superimposed on the output terminal from the positive power supply flows to the ground via the stray capacitance CCB between the collector and base of the transistor TR5, the output voltage of the level shift circuit is as shown by the solid line in FIG. It changes gently at the falling edge of noise.
[0098]
Therefore, when considering the output voltage of the level shift circuit with reference to the positive power supply, as shown in FIG. 3C, the potential difference between the positive power supply and the output voltage of the level shift circuit is small at the falling edge of the noise. As a result, a false pulse is generated, whereby the buffer circuit 430 malfunctions.
[0099]
That is, when CL3 input to the power supply unit shown in FIG. 11 is at a low level, the false pulse is input to the gate driver as CL3. When the false pulse is input to the gate driver, the gate driver performs a shift operation, and thus erroneous display occurs.
[0100]
Book reference In the example, by connecting the capacitor C2 between the positive power supply and the output terminal of the level shift circuit, noise having the same waveform as the noise superimposed on the positive power supply passes through the capacitor C and is superimposed on the output terminal of the level shift circuit. Therefore, considering the output voltage of the level shift circuit with reference to the positive power supply, the potential difference between the positive power supply and the output voltage of the level shift circuit is substantially constant as shown by the broken line in FIG. It becomes a potential difference.
[0101]
As a result, a false pulse is not generated as indicated by a broken line in FIG. 5C, so that the malfunction of the buffer circuit 430 can be prevented and the noise resistance can be improved.
[0102]
If the value of the capacitor C2 is large, the function of the level shift circuit is lost. If the value of C2 is small, the effect of noise cancellation is small. Therefore, the value of the capacitor C2 needs to be 20 to 100 pF.
[0103]
Further, in the conventional TFT liquid crystal display module, the viewing angle adjustment is performed by changing the voltage applied to the drain signal line (D). Since it is only necessary to change the applied voltage, reference In Example 2, the voltage applied to the common electrode is changed in order to adjust the viewing angle.
[0104]
For this reason, in the circuit configuration of the power supply unit 102 shown in FIG. 11, the common voltage generator 202 is connected to the terminals VA1, VA2, and VA3 by connecting variable resistors as shown in FIG. 13 to the terminals VA1, VA2, and VA3. The amplitude of the common voltage of the generated AC drive waveform is changed.
[0105]
As a result, the viewing angle of the TFT liquid crystal display module can be adjusted with a relatively simple circuit configuration, the driving circuit of the TFT liquid crystal display module can be simplified, and the outer dimensions of the TFT liquid crystal display module can be reduced. It becomes possible.
[0106]
Next, the gradation reference voltage generation unit 208 and the multiplexer 209 in the circuit configuration shown in FIG. 11 will be described.
[0107]
As shown in FIG. 11, the gradation reference voltage generation unit 208 includes two voltage dividing circuits, and the outputs of the two voltage dividing circuits are input to the multiplexer 209.
[0108]
The resistor series circuit of the two voltage divider circuits is that if the resistor series circuit constituting the first voltage divider circuit is RB1, RB2 to RB10, the resistor series circuit constituting the second voltage divider circuit is , RB10, RB9 to RB1 are configured.
[0109]
Further, the multiplexer 209 switches the outputs from the two voltage dividing circuits according to the high level and low level of the alternating signal (M) and outputs the gradation reference voltages (V0 to V8).
[0110]
Assuming that the gray level reference voltage V7 is applied from the drain driver 211 to the drain electrode and the low level common voltage is applied from the common driver to the common electrode, the common signal is inverted along with the inversion of the alternating signal (M). A high level common voltage is applied from the driver 203 to the common electrode.
[0111]
In this case, inverted display data is input to the drain driver 211, and the gray scale reference voltage V1 is applied to the drain electrode from the drain driver 211.
[0112]
The reason why there are two resistor series circuits is that, as shown in FIG. 43, since the liquid crystal has a gamma characteristic, it is necessary to switch the gradation reference voltage applied to the drain driver 211 during forward rotation and inversion.
[0113]
Further, the semi-fixed resistor connected to the inverting input terminal of the operational amplifier OP4 of the common driver 203 shown in FIG. 11 is for adjusting the DC level of the common signal voltage.
[0114]
Next, the liquid crystal display device of the present invention Examples of The TFT liquid crystal display module will be described.
[0115]
Implementation Example The TFT liquid crystal display module is designed to perform good gradation display.
[0116]
Figure 14 shows the implementation Example The circuit configuration of the output voltage generation circuit of the drain driver 211 of the TFT liquid crystal display module is shown, and the circuit configuration of one circuit among the output voltage generation circuits provided for the total number of drain signal lines (D) is shown.
[0117]
This implementation Example The configuration of the drain driver 211 of the TFT liquid crystal display module is the same as that of the drain driver 511 shown in FIG. 40, and includes a data latch unit for display data and an output voltage generation circuit.
[0118]
In general, as shown in FIG. 43, the applied voltage-transmittance characteristics of the liquid crystal are markedly non-linear at both ends of the operating voltage range and relatively linear at the center.
[0119]
Therefore, this implementation Example In the output voltage generation circuit of the drain driver 211 of the TFT liquid crystal display module, the number of voltage values to be interpolated between the gradation reference voltages from the outside is reduced at both ends of the operating voltage range and increased at the center. The 9-level gray scale reference voltages (V0 to V8) inputted from the outside are each divided into 16 equal parts, and at both ends of the operating voltage range where the voltage-transmittance characteristic of the liquid crystal exhibits a non-linear characteristic, it is divided into 16 equal parts. The most appropriate voltage of 3 or 7 is selected by the decoder, and the voltage divided by 16 at the center of the working voltage range where the voltage-transmittance characteristics of the liquid crystal exhibit a relatively linear characteristic. Is selected by the decoder 253.
[0120]
Therefore, this implementation Example In the output voltage generation circuit of the drain driver of the TFT liquid crystal display module, the number of gradations provided between the gradation reference voltages is 3, 3, 7, 15, 15, 7, 3, 3 in order.
[0121]
In the gradation reference voltage generation unit 208, nine gradation reference voltages (V0 to V8) are applied to the gradation reference voltages at both ends of the working voltage range in which the voltage-transmittance characteristics of the liquid crystal exhibit nonlinear characteristics. V0-V1, V1-V2, V2-V3, V5-V6, V6-V7, V7-V8) are small in potential difference, and the central portion of the operating voltage range in which the voltage-transmittance characteristics of the liquid crystal exhibit a relatively linear characteristic The gray scale reference voltages are generated so that the potential difference becomes large between the gray scale reference voltages (V3-V4, V4-V5).
[0122]
FIG. 15 is a diagram showing the relationship between each gradation reference voltage and the output voltage in FIG.
[0123]
In FIG. 15, a total of 65 output voltage values are obtained, but VO64 equal to V8 is not used.
[0124]
FIG. 16 is a table showing the correspondence between decoder inputs and decoder outputs in FIG.
[0125]
As explained above, this implementation Example If the gray scale reference voltage generation unit 208 and the output voltage generation unit of the drain driver 211 in the TFT liquid crystal display module are used, it is arbitrary from the outside at both ends of the use voltage range where the nonlinear characteristic of the applied voltage-transmittance characteristic of the liquid crystal is remarkable. The number of gradation reference voltages that can be set to 1 can be increased, and the “deviation” between the originally desired gradation voltage and the gradation voltage generated inside the drain driver can be reduced.
[0126]
However, the number of gradation reference voltages that can be arbitrarily set from the outside decreases in the central portion of the working voltage range where the applied voltage-transmittance characteristics of the liquid crystal exhibit linear characteristics, and the level generated inside the drain driver 211. The number of regulated voltages increases.
[0127]
However, since the applied voltage-transmittance characteristic of the liquid crystal exhibits a relatively linear characteristic at the center of the operating voltage range, there is a “shift” between the desired gradation voltage and the gradation voltage generated inside the drain driver 211. It won't be too big and won't be a big problem.
[0128]
As a result, a gamma correction voltage suitable for the voltage-luminance characteristics of the liquid crystal can be obtained, and better gradation display characteristics can be obtained.
[0129]
In addition, it is not necessary to increase the number of gradation reference voltage values input from the outside, and it is not necessary to increase the number of peripheral circuits, so there is no increase in cost and increase in mounting area due to an increase in peripheral circuit components.
[0130]
Book reference In the TFT liquid crystal display module of Example 1, as shown in FIG. 1, the drain driver 211 is disposed only on the upper side of the liquid crystal display panel (LCD).
[0131]
Figure 17 shows the book reference FIG. 5 is a diagram showing the flow of display data and clock signals for the drain driver 211 in the TFT liquid crystal display module of Example 1.
[0132]
The carry output of the previous stage of the drain driver 211 is directly input to the carry input of the drain driver 211 of the next stage.
[0133]
The carry signal controls the latch operation of the data latch unit 511 of the drain driver 211 to prevent erroneous display data from being written to the data latch unit 511.
[0134]
The display control unit 201 serves as an interface with the main computer, and drives the drain driver 211 and the gate driver 206 based on a control signal, a clock, and display data transmitted from the main computer.
[0135]
Book reference In the display control device 201 in the TFT liquid crystal display module of Example 1, simple one-line display data transmitted from the main body computer is input to the drain driver 211.
[0136]
18 is a block diagram showing a schematic configuration of the display control apparatus 201 shown in FIG.
[0137]
FIG. 19 is a diagram showing a timing chart of the display control apparatus 201 shown in FIG.
[0138]
Book reference In the TFT liquid crystal display module of Example 1, the display control device 201 includes a data processing unit 221 and a control signal processing / generation unit 222. The control signal processing / generation unit 222 receives control signals (clock, In response to the display timing signal and the synchronization signal, control signals to the data processing unit 221 and the liquid crystal drivers (the drain driver 211 and the gate driver 206) are generated.
[0139]
The control signal processing / generation unit 222 includes a drain driver drive circuit 223, a gate driver drive circuit 224, and an output clock generation circuit 225. The output clock generation circuit 225 shifts the data output clock and the drain driver 211. A clock (CL2) is generated.
[0140]
The data processing unit 221 includes a D-type flip-flop 226, a logic processing circuit 227, and a D-type flip-flop 228 that are connected in cascade, receives display data from the main body computer, and receives data from the control signal processing / generation unit 222. The display data is output to the drain driver 211 based on the clock signal.
[0141]
The logic processing circuit 227 of the data processing unit 221 is inserted to invert the display data, and can be configured by a multiplexer shown in FIG.
[0142]
Note that the logic processing circuit 227 is not necessary if the display data is not inverted.
[0143]
Bright from FIG. Et Thus, the data output clock has the same frequency as the clock signal and display data input from the main computer, and is taken into the D-type flip-flop 226 by the clock signal having the same frequency as the clock signal from the main computer. The display data is output from the D-type flip-flop 228 to the data bus by a clock signal, and simple one-line display data transmitted from the main computer is output to the data bus.
[0144]
As explained above, the book reference According to Example 1, in the TFT liquid crystal display module, the drain driver is arranged on either the upper or lower side of the liquid crystal display panel, so that the area of the frame of the liquid crystal display panel can be reduced. The display area can be made larger than the external dimensions.
[0145]
Also book reference In the TFT liquid crystal display module of Example 1, a buffer circuit 210 is inserted between the display control device 201 and the drain driver 211 as shown in FIG.
[0146]
FIG. 21 shows another example of the liquid crystal display device of the present invention. reference Example ( Reference example 3 2 is a block diagram showing a schematic configuration of a buffer circuit of a TFT liquid crystal display module.
[0147]
Above reference In the case of Example 1, all the drain drivers 211 are driven by one clock signal from the buffer circuit 210.
[0148]
In this case, when the number of drain drivers 211 increases, the buffer circuit 210 may not be able to drive the drain drivers 211, and a stable clock signal may not be supplied.
[0149]
So book Reference example 3 In this TFT liquid crystal display module, the clock signal is divided into two systems, and the two systems of clock signals are supplied from independent buffer circuits (451, 452).
[0150]
This makes it possible to supply a stable clock signal even when the number of drain driver 211 serving as a load increases.
[0151]
Each reference In the example, the actual liquid crystal drive circuit is configured using a dedicated LSI and IC, respectively.
[0152]
FIG. 22 shows another example of the liquid crystal display device of the present invention. reference Example ( Reference example 4 2 is a block diagram showing a schematic configuration of a display control device of a TFT liquid crystal display module.
[0153]
In FIG. 22, the difference from FIG. 39 is that a buffer circuit (451, 452) is inserted between the display controller 201 of the TFT liquid crystal display module and the liquid crystal drivers (drain driver 211, gate driver 206). It is in.
[0154]
Accordingly, the buffer circuits (451, 452) drive the liquid crystal drivers (drain driver 211, gate driver 206) which are borne by the display control device 201 of the conventional TFT liquid crystal display module.
[0155]
The buffer circuits (451, 452) can be constituted by a plurality of semiconductor integrated circuits depending on the number of output terminals to be driven.
[0156]
As a result, the power consumption of the display control device 201, that is, the heat generation, can be distributed to each buffer circuit (451, 452).
[0157]
Then, compared with the wiring capacitance (about 20 [pF]) from the display control device 201 to the buffer circuit (451, 452), the buffer circuit (451, 452) to the liquid crystal driver group (drain driver 211, gate driver 206). Since the wiring capacitance (approximately 100 [pF] or more depending on the number of connected driver ICs) is large, the effect of distributing the power consumption of the display control device 201 to each buffer circuit (451, 452) is large. There is something.
[0158]
When components are placed on a printed circuit board, the display controller 201 and the buffer circuits (451, 452) are as close as possible to reduce the wiring capacity, so that the power consumption of the display controller 201 is suppressed. Is possible.
[0159]
Book Reference example 4 In the TFT liquid crystal display module, the buffer circuit (451, 452) need not be developed as a custom semiconductor integrated circuit, and can be realized by a standard semiconductor integrated circuit.
[0160]
Also book Reference example 4 In the TFT liquid crystal display module, a non-inverted circuit element is used for the buffer circuit (451, 452), but an inverted circuit element (inverter) or a flip-flop circuit is used depending on the circuit configuration. Is also possible.
[0161]
But book Reference example 4 In the TFT liquid crystal display module, the total area of the semiconductor integrated circuit to be mounted increases due to the addition of the buffer circuit (451, 452), and the buffer circuit (451, 452) is added from the display control device 201. As a result, the power consumption corresponding to driving increases.
[0162]
In the display control device 201, when the drain driver 211 is driven, the display data bus has more outputs than the control signal.
[0163]
When the display gradation increases, the number of data output from the display control apparatus 201 increases accordingly.
[0164]
Therefore, the display control apparatus 201 can be divided into a data processing unit and a control signal processing / generation unit to reduce power consumption.
[0165]
FIG. 23 shows another example of the liquid crystal display device of the present invention. reference Example ( Reference Example 5 2 is a block diagram showing a schematic configuration of a display control device of a TFT liquid crystal display module.
[0166]
Book Reference Example 5 Is a case where the display control device 201 is divided into a data processing unit and a control signal processing / generation unit. reference It is an example.
[0167]
24 is a diagram showing a circuit configuration of the data processing unit shown in FIG.
[0168]
FIG. 25 is a diagram showing a timing chart of the data processing unit shown in FIG.
[0169]
In FIG. 24, the control signal processing / generation unit 230 receives the control signals (clock, display timing signal, synchronization signal) from the main body computer, and sends them to the data processing units (231, 232) and each liquid crystal driver (drain driver 211). , A control signal of the gate driver 206) is generated.
[0170]
24 includes a multiplexer 233, a D-type flip-flop 234 to which the clock CK1 is input, and a D-type flip-flop 235 to which the clock CK2 is input. Display data from the main computer is received, and the display data is output to the drain driver 211 based on the clock signal from the control signal processing / generation unit 230.
[0171]
It is clear from the timing chart shown in FIG. Et Thus, the clock signal (CK2) input to the upper data processing unit 231 and the clock signal (CK2) input to the lower data processing unit 232 have a phase difference of 180 °. The clock signal (CK2) has a cycle twice that of the clock signal from the main body computer.
[0172]
As a result, in the upper and lower data processing units (231 and 232), the display data fetched into the D-type flip-flop 234 by the clock signal (CK1) having the same frequency as the clock signal from the main computer is In the D-type flip-flop 235 of the data processing unit 231, every other display data (a, c, e...) Is taken in by the clock signal (CK 2) and output to the upper data bus. In the D-type flip-flop 235 of the data processing unit 232, every other display data (b, d, f...) Is captured by the clock signal (CK2) and output to the lower data bus.
[0173]
The display data is composed of 18 bits of 6 bits for each color.
[0174]
Book Reference Example 5 In the TFT liquid crystal display module, since the data processing units (231 and 232) also serve to drive the drain driver 211, the total power consumption of the display control device 201 is the same as that of the conventional example.
[0175]
Further, since the control signal processing / generation unit 230 does not need to perform data processing, the size of the package is 100 to 150 in the conventional display control apparatus 201, whereas Reference Example 5 This TFT liquid crystal display module can be realized with 50 or less terminals.
[0176]
Book Reference Example 5 In the TFT liquid crystal display module, the multiplexer 233 is inserted because it is necessary for the IC used for the drain driver 211 to invert the data in accordance with the AC cycle of the voltage applied to the liquid crystal. is there.
[0177]
When data inversion is not necessary and data can be captured once, a standard semiconductor integrated circuit can be used for the data processing units (231 and 232).
[0178]
FIG. 26 shows another example of the liquid crystal display device of the present invention. reference Example ( Reference Example 6 2 is a block diagram showing a schematic configuration of a display control device of a TFT liquid crystal display module.
[0179]
Book Reference Example 6 Said Reference Example 5 In the TFT liquid crystal display module, the display data from the main computer is input to the upper and lower data processing units in parallel in two pixels. reference This is an example, and it corresponds to the high definition TFT liquid crystal display module. reference It is an example.
[0180]
FIG. 27 is a diagram showing a timing chart of the data processing unit shown in FIG.
[0181]
Book Reference Example 6 In the TFT liquid crystal display module of FIG. Et Since the display data from the main computer is input to the upper and lower data processing units (231, 232) in parallel, the clock signal (CK1) and the clock signal (CK2) are It has the same frequency as the clock signal from the main computer.
[0182]
As a result, in the upper and lower data processing units (231 and 232), the display data fetched into the D-type flip-flop 234 by the clock signal (CK1) having the same frequency as the clock signal from the main computer is D Display data (A, B, C...) And (a, b, c...) Input in parallel by the clock signal (CK2) from the type flip-flop 235 are output to the upper and lower data buses.
[0183]
In addition, Reference Example 5 And books Reference Example 6 In the TFT liquid crystal display module, the data processing unit (231, 232) can be composed of a plurality of semiconductor integrated circuits, and can cope with higher gradation and higher definition such as 256 gradations. In this way, by configuring the control signal processing / generation unit 230, it is not necessary to newly develop the control signal processing / generation unit 230 when realizing multi-gradation.
[0184]
Further, this semiconductor integrated circuit can be realized by a semiconductor integrated circuit of a small package such as TSOP (Thin Small Outline Package).
[0185]
As explained above, each of the above reference In the TFT liquid crystal display module of the example, the display control device 201 in the conventional TFT liquid crystal display module is constituted by a plurality of semiconductor integrated circuits or the function is constituted by a plurality of semiconductor integrated circuits. Can be distributed.
[0186]
Further, as shown in FIG. reference In the TFT liquid crystal display module of the example, a specific terminal is provided on an I / F connector of a printed circuit board (interface board) on which the controller unit 101 is mounted, and various signal voltages of the power supply unit 102 of the TFT liquid crystal display module from the specific terminal. Signal voltage to be monitored, for example, DC level of common signal voltage, amplitude level of common signal voltage, DC level of gate on and gate off signal voltage, amplitude level of gate on and gate off signal voltage, gradation voltage, etc. It is also possible to do.
[0187]
Thereby, an I / F connector can be inserted to monitor various signal voltages of the power supply unit 102 of the TFT liquid crystal display module, thereby simplifying the adjustment work of the adjustment part during the manufacturing process and the final inspection process. The work process is reduced.
[0188]
In addition, as shown in FIG. reference In the TFT liquid crystal display module of the example, the specific terminal of the I / F connector is connected to a specific part of the driving circuit of the TFT liquid crystal display module, for example, the inverting input terminal of the operational amplifier OP4 of the common driver 203 shown in FIG. The DC level of the common signal voltage can also be adjusted from the outside by applying a voltage from.
[0189]
As a result, an I / F connector can be inserted and an adjustment voltage can be applied from the outside, whereby a test of the driving circuit of the TFT liquid crystal display module can be easily performed from the outside.
[0190]
In addition, each of the above reference In the TFT liquid crystal display module of the example, the display data for each color is composed of 6 bits and can display 64 gradations. In On the other hand, it is assumed that the display data transmitted from the main computer is composed of less than 6 bits for each color, for example, 4 bits for each color.
[0191]
In that case, it is necessary to convert 4-bit display data for each color from the main computer side into 6-bit display data for each color.
[0192]
Therefore, the present invention proposes an optimum digital-to-digital conversion method in the above case as shown in FIG.
[0193]
In FIG. 29, output 4 bits indicate display data of 4 bits for each color output from the main computer, and input 6 bits indicate the above-mentioned respective data. reference 6 shows 6-bit display data for each color inputted to the drain driver 211 of the TFT liquid crystal panel (LCD) in the example.
[0194]
In the digital-to-digital conversion method shown in FIG. 29, the display data of 4 bits from the main body computer side is used for the display of the upper 4 bits of 6 bits which are inputted to the drain driver 211 of the TFT liquid crystal panel (LCD) as it is. As data, the upper 2 bits of 4 bits from the main computer side are input to the lower 2 bits without 6 bits of input data input to the drain driver 211 of the TFT liquid crystal panel (LCD).
[0195]
FIG. 30 shows a bit string converted from 4 bits to 6 bits by the digital-digital conversion method shown in FIG.
[0196]
As is apparent from FIG. 30, according to the digital-to-digital conversion method shown in FIG. 29, all bits Low (0, 0, 0, 0, 0, 0) are changed to all bits High (1, 1, 1, 1). , 1, 1), a bit string obtained by thinning out with an optimum width is obtained.
[0197]
As a result, the digital-to-digital conversion method shown in FIG. 29 can display 100% white or black and linear gradation compared to the conventional method of fixing the low-order bits with insufficient display data to Low or High. Display is possible.
[0198]
In the digital-digital conversion method shown in FIG. 29, the case of converting from 4 bits to 6 bits has been described as an example, but the present invention is not limited to this.
[0199]
FIGS. 31-38 show another embodiment of the present invention. reference Example ( Reference Example 7 FIG. 2 is a diagram illustrating a TFT liquid crystal display module, including a connection portion between each IC and an I / F (interface) connector, and a diagram illustrating a circuit configuration of an actual liquid crystal driving circuit. .
[0200]
31 and 32 show the controller unit 101 shown in FIG. 1, FIGS. 33 and 34 show the drain driver unit 103 shown in FIG. 1, FIGS. 35 and 36 show the gate driver unit 104 shown in FIG. FIG. 38 shows the power supply unit 102 shown in FIG.
[0201]
Book Reference Example 7 Said each reference For example, in FIG. 31 and FIG. 32, the display control device 201 is configured by one LSI, and a buffer circuit (IC2) is provided between the display control device 201 and the drain driver 211. , IC3, IC4) are inserted.
[0202]
Further, the clock signal (CL2) is divided into two systems, and is supplied to every other drain driver IC from each independent buffer circuit in the IC3.
[0203]
The I / F connectors 15 to 17 shown in FIG. 31 are terminals for connecting diopter adjusting resistors as shown in FIG. 13, and the I / F connector 18 is an operational amplifier OP4 shown in FIG. Connected to the non-inverting terminal to monitor the DC level of the common signal voltage and the amplitude level of the common signal voltage, or to adjust the DC level of the common signal voltage from the outside by applying an external voltage It is.
[0204]
Although the present invention has been specifically described above based on the embodiments, it is needless to say that the present invention is not limited to the above embodiments and can be variously modified without departing from the gist thereof.
[0205]
【The invention's effect】
The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
[0206]
(1) According to the liquid crystal display device of the present invention, the input to the drain drive circuit. Without increasing the number of reference voltages, it is possible to obtain a gamma correction voltage that matches the applied voltage-transmittance characteristics of the liquid crystal, which makes it possible to obtain a good gradation display. And The
[Brief description of the drawings]
FIG. 1 shows a liquid crystal display device according to the present invention. reference Example ( reference It is a block diagram which shows the circuit arrange | positioned in the TFT liquid crystal display panel of the TFT liquid crystal display module which is Example 1), and its periphery.
2 is a diagram showing an equivalent circuit of the TFT liquid crystal display panel (TFTP-LCD) shown in FIG. 1. FIG.
3 is a diagram showing an equivalent circuit of one pixel of the TFT liquid crystal display panel (TFTP-LCD) shown in FIG. 1. FIG.
4 is a diagram showing capacitors connected to each gate signal line of an equivalent circuit of one pixel of the TFT liquid crystal display panel (TFTP-LCD) shown in FIG. 1. FIG.
[Figure 5] Book reference It is a block diagram which shows schematic structure of each driver of the TFT liquid crystal display module of Example 1, and a signal flow.
6 is a diagram showing a circuit configuration and input / output waveforms of a common voltage generation unit shown in FIG. 5;
FIG. 7 is a diagram showing that a peak current of a driving transistor can be suppressed by driving a common electrode with a trapezoidal wave AC driving voltage.
[Figure 8] Book reference 4 is a diagram illustrating a circuit configuration of a gate-on voltage generation unit and a gate-off voltage generation unit in the TFT liquid crystal display module of Example 1. FIG.
[Figure 9] Book reference In Example 1, it is a figure which shows the level of the common voltage applied to a common electrode, the drain voltage applied to a drain, the level of the gate voltage applied to a gate electrode, and its waveform.
FIG. 10 Book reference FIG. 6 is a diagram illustrating a common voltage applied to the common electrode, a drain voltage applied to the drain, a level of the gate voltage applied to the gate electrode, and a waveform thereof when the gate-on voltage generation unit in Example 1 is omitted. is there.
FIG. 11 shows a liquid crystal display device according to the present invention. reference Example ( reference It is a figure which shows the circuit structure of the power supply part of the TFT liquid crystal display module which is Example 2).
12 is a diagram for explaining a malfunction of the buffer circuit 430 in FIG. 11. FIG.
13 is a diagram showing a resistor network connected to terminals VA1, VA2, and VA3 in order to change the amplitude of a trapezoidal common voltage generated by a common voltage generator in the circuit configuration shown in FIG. .
FIG. 14 Implementation of the invention It is a figure which shows the circuit structure of the output voltage generation circuit of the drain driver of the TFT liquid crystal display module of an example.
15 is a diagram showing the relationship between each gradation reference voltage and the output voltage in FIG.
16 is a table showing a correspondence relationship between decoder inputs and decoder outputs in FIG.
FIG. 17 Book reference FIG. 6 is a diagram illustrating a flow of display data and a clock signal for a drain driver in the TFT liquid crystal display module of Example 1.
18 is a block diagram showing a schematic configuration of the display control apparatus shown in FIG.
FIG. 19 is a diagram showing a timing chart of the display control device shown in FIG. 18;
20 is a diagram showing a circuit configuration of the logic processing circuit shown in FIG. 18;
FIG. 21 shows another liquid crystal display device of the present invention. reference Example ( Reference example 3 2 is a block diagram showing a schematic configuration of a buffer circuit of a TFT liquid crystal display module.
FIG. 22 shows another liquid crystal display device of the present invention. reference Example ( Reference example 4 2 is a block diagram showing a schematic configuration of a display control device of a TFT liquid crystal display module.
FIG. 23 shows another liquid crystal display device of the present invention. reference Example ( Reference Example 5 2 is a block diagram showing a schematic configuration of a display control device of a TFT liquid crystal display module.
24 is a diagram showing a circuit configuration of a data processing unit shown in FIG.
FIG. 25 is a diagram showing a timing chart of the data processing unit shown in FIG. 23;
FIG. 26 shows another liquid crystal display device of the present invention. reference Example ( Reference Example 6 2 is a block diagram showing a schematic configuration of a display control device of a TFT liquid crystal display module.
FIG. 27 is a diagram showing a timing chart of the data processing unit shown in FIG. 26;
FIG. 28 is a diagram for explaining that a specific terminal is provided in the I / F connector, and the drive circuit inside the TFT liquid crystal display module can be adjusted from the specific terminal.
FIG. 29 is a diagram for explaining the digital-to-digital conversion method of the present invention.
30 is a table showing a bit string converted from 4 bits to 6 bits by the digital-digital conversion method shown in FIG. 29;
FIG. 31 shows another embodiment of the present invention. reference Example ( Reference Example 7 FIG. 2 is a diagram illustrating a TFT liquid crystal display module, including a connection portion between each IC and an I / F connector, and a diagram illustrating a circuit configuration of an actual liquid crystal driving circuit.
FIG. 32 shows another embodiment of the present invention. reference Example ( Reference Example 7 FIG. 2 is a diagram illustrating a TFT liquid crystal display module, including a connection portion between each IC and an I / F connector, and a diagram illustrating a circuit configuration of an actual liquid crystal driving circuit.
FIG. 33 shows another embodiment of the present invention. reference Example ( Reference Example 7 FIG. 2 is a diagram illustrating a TFT liquid crystal display module, including a connection portion between each IC and an I / F connector, and a diagram illustrating a circuit configuration of an actual liquid crystal driving circuit.
FIG. 34 shows another embodiment of the present invention. reference Example ( Reference Example 7 FIG. 2 is a diagram illustrating a TFT liquid crystal display module, including a connection portion between each IC and an I / F connector, and a diagram illustrating a circuit configuration of an actual liquid crystal driving circuit.
FIG. 35 shows another embodiment of the present invention. reference Example ( Reference Example 7 FIG. 2 is a diagram illustrating a TFT liquid crystal display module, including a connection portion between each IC and an I / F connector, and a diagram illustrating a circuit configuration of an actual liquid crystal driving circuit.
FIG. 36 shows another embodiment of the present invention. reference Example ( Reference Example 7 FIG. 2 is a diagram illustrating a TFT liquid crystal display module, including a connection portion between each IC and an I / F connector, and a diagram illustrating a circuit configuration of an actual liquid crystal driving circuit.
FIG. 37 shows another embodiment of the present invention. reference Example ( Reference Example 7 FIG. 2 is a diagram illustrating a TFT liquid crystal display module, including a connection portion between each IC and an I / F connector, and a diagram illustrating a circuit configuration of an actual liquid crystal driving circuit.
FIG. 38 shows another embodiment of the present invention. reference Example ( Reference Example 7 FIG. 2 is a diagram illustrating a TFT liquid crystal display module, including a connection portion between each IC and an I / F connector, and a diagram illustrating a circuit configuration of an actual liquid crystal driving circuit.
FIG. 39 is a block diagram showing a schematic configuration of a conventional TFT liquid crystal display module.
FIG. 40 is a block diagram showing a schematic configuration of a drain driver of a conventional TFT liquid crystal display module.
FIG. 41 is a diagram showing a circuit configuration of an output voltage generation circuit of a drain driver of a conventional TFT liquid crystal display module.
42 is a diagram illustrating a relationship between a gradation reference voltage and an output voltage in FIG. 41. FIG.
FIG. 43 is a diagram illustrating applied voltage-transmittance characteristics of a typical liquid crystal.
[Explanation of symbols]
TFT-LCD: TFT liquid crystal display panel, TR1 to TR5, transistor, OP1 to OP4, operational amplifier, 101 ... controller, 102 ... power supply, 103 ... drain driver, 104 ... gate driver, 201, 501 ... display control device , 202 ... common voltage generation unit, 203 ... common driver, 204 ... gate-on voltage generation unit, 205 ... gate-off voltage generation unit, 206, 506 ... gate driver, 207 ... level shift circuit, 208 ... gradation reference voltage generation unit, 209 , 233 ... multiplexer, 210, 430, 451, 452 ... buffer circuit, 211, 511 ... drain driver, 212 ... DC-DC converter, 221 ... data processor, 222, 230 ... control signal processor / generator, 223 ... gate Driver drive circuit, 224 ... drain Driver driving circuit, 225... Output clock generation circuit, 226, 228, 234, 235... D-type flip-flop, 227... Logic processing circuit, 231. DESCRIPTION OF SYMBOLS Decoder, 302 ... Common voltage generation circuit, 304 ... Gate on voltage generation circuit, 305 ... Gate off voltage generation circuit, 410, 420 ... Level shift circuit, 551 ... Data latch part, 552 ... Output voltage generation circuit.

Claims (2)

A plurality of pixels having a pixel electrode and a thin film transistor provided in a matrix, a plurality of gate signal lines provided in a row direction to which a gate electrode of a thin film transistor in a row direction is connected, and a drain electrode of the thin film transistor in a column direction are connected A TFT liquid crystal display panel having a plurality of drain signal lines provided in the column direction;
A gate driving circuit that drives the plurality of gate signal lines; a drain driving circuit that drives the plurality of drain signal lines; and a display control device that controls the gate driving circuit and the drain driving circuit;
The drain drive circuit, based on a gradation reference voltage Vn of the number of double that will be supplied by an external circuit, to generate a plurality of intermediate voltages comprising interpolated between said plurality of gradation reference voltages Vn,
The gradation reference voltage Vn has a corresponding gradation level that increases as n increases.
When V0 is the reference voltage corresponding to the lowest gradation and Vm is the reference voltage corresponding to the maximum gradation, and the gradation reference voltage closest to (Vm + V0) / 2 is Vi, V (i−1) generated by the drain driving circuit is used. A liquid crystal display device characterized in that the number of intermediate voltage levels between Vi is greater than the number of intermediate voltage levels between V0 and V1 and between V (m-1) and Vm. The number of intermediate voltage levels between V (i−1) and Vi generated by the drain drive circuit is two or more than the number of intermediate voltages between V0 and V1 and between V (m−1) and Vm. The liquid crystal display device according to claim 1 .

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