JP3736866B2 - スーパーパイプライン式スーパースカラーマイクロプロセッサ用のマイクロコントロールユニット - Google Patents

スーパーパイプライン式スーパースカラーマイクロプロセッサ用のマイクロコントロールユニット Download PDF

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Publication number
JP3736866B2
JP3736866B2 JP25198894A JP25198894A JP3736866B2 JP 3736866 B2 JP3736866 B2 JP 3736866B2 JP 25198894 A JP25198894 A JP 25198894A JP 25198894 A JP25198894 A JP 25198894A JP 3736866 B2 JP3736866 B2 JP 3736866B2
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Japan
Prior art keywords
instruction
circuit
address
instructions
memory
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Expired - Lifetime
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JP25198894A
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English (en)
Japanese (ja)
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JPH07152560A (ja
Inventor
ブルーム マーク
ダブリュー ハーヴィン マーク
シー マクマハン スチーブン
エイ ガリベイ ジュニア ロール
ケイ アイトリーム ジョン
エス マクマホン ロナルド
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ヴァイア サイリックス インコーポレイテッド
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Priority claimed from US08/138,855 external-priority patent/US5644741A/en
Priority claimed from US08/138,660 external-priority patent/US5794026A/en
Application filed by ヴァイア サイリックス インコーポレイテッド filed Critical ヴァイア サイリックス インコーポレイテッド
Publication of JPH07152560A publication Critical patent/JPH07152560A/ja
Application granted granted Critical
Publication of JP3736866B2 publication Critical patent/JP3736866B2/ja
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Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/261—Microinstruction address formation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/264—Microinstruction selection based on results of processing
    • G06F9/265—Microinstruction selection based on results of processing by address selection on input of storage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/28—Enhancement of operational speed, e.g. by using several microcontrol devices operating in parallel
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
JP25198894A 1993-10-18 1994-10-18 スーパーパイプライン式スーパースカラーマイクロプロセッサ用のマイクロコントロールユニット Expired - Lifetime JP3736866B2 (ja)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US13832093A 1993-10-18 1993-10-18
US08/138855 1993-10-18
US08/138320 1993-10-18
US08/138,855 US5644741A (en) 1993-10-18 1993-10-18 Processor with single clock decode architecture employing single microROM
US08/138,660 US5794026A (en) 1993-10-18 1993-10-18 Microprocessor having expedited execution of condition dependent instructions
US08/138660 1993-10-18

Publications (2)

Publication Number Publication Date
JPH07152560A JPH07152560A (ja) 1995-06-16
JP3736866B2 true JP3736866B2 (ja) 2006-01-18

Family

ID=27385166

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25198894A Expired - Lifetime JP3736866B2 (ja) 1993-10-18 1994-10-18 スーパーパイプライン式スーパースカラーマイクロプロセッサ用のマイクロコントロールユニット

Country Status (4)

Country Link
US (1) US5771365A (de)
EP (1) EP0649083B1 (de)
JP (1) JP3736866B2 (de)
DE (1) DE69425310T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69408769T2 (de) 1993-10-18 1998-07-09 Cyrix Corp Fliessbandsteuerung und Registerübersetzung in Mikroprozessor
KR100384875B1 (ko) * 1995-12-16 2003-08-21 주식회사 하이닉스반도체 파이프라인구조를갖는마이크로프로세서에서의언세이프처리마이크로시퀀서
WO2000004484A2 (en) * 1998-07-17 2000-01-27 Intergraph Corporation Wide instruction word graphics processor
US6957322B1 (en) * 2002-07-25 2005-10-18 Advanced Micro Devices, Inc. Efficient microcode entry access from sequentially addressed portion via non-sequentially addressed portion
US6851033B2 (en) * 2002-10-01 2005-02-01 Arm Limited Memory access prediction in a data processing apparatus
US7284100B2 (en) 2003-05-12 2007-10-16 International Business Machines Corporation Invalidating storage, clearing buffer entries, and an instruction therefor
US7530067B2 (en) * 2003-05-12 2009-05-05 International Business Machines Corporation Filtering processor requests based on identifiers
US9454490B2 (en) 2003-05-12 2016-09-27 International Business Machines Corporation Invalidating a range of two or more translation table entries and instruction therefore
JP2007528213A (ja) * 2003-11-06 2007-10-11 ユニバーシティ・オブ・ネバダ・リノ 特定の核酸配列の検出および測定の改良された方法
US7743233B2 (en) * 2005-04-05 2010-06-22 Intel Corporation Sequencer address management
US9182984B2 (en) 2012-06-15 2015-11-10 International Business Machines Corporation Local clearing control
CN115080116B (zh) * 2022-07-25 2022-11-29 广州智慧城市发展研究院 兼容多种存储器接口的微控制器、方法、芯片和显示器

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2112973B (en) * 1978-11-08 1983-12-21 Data General Corp High-speed digital computer system
US4430706A (en) * 1980-10-27 1984-02-07 Burroughs Corporation Branch prediction apparatus and method for a data processing system
US4984151A (en) * 1985-03-01 1991-01-08 Advanced Micro Devices, Inc. Flexible, next-address generation microprogram sequencer
US4685088A (en) * 1985-04-15 1987-08-04 International Business Machines Corporation High performance memory system utilizing pipelining techniques
DE3650473T2 (de) * 1985-11-08 1996-08-14 Nippon Electric Co Mikroprogrammsteuereinheit
JPH0743648B2 (ja) * 1985-11-15 1995-05-15 株式会社日立製作所 情報処理装置
EP0279953B1 (de) * 1987-02-24 1994-11-02 Texas Instruments Incorporated Computersystem mit Durchführung von vermischten Makro- und Mikrocodebefehlen
US5032983A (en) * 1987-04-10 1991-07-16 Tandem Computers Incorporated Entry point mapping and skipping method and apparatus
JPH01271838A (ja) * 1988-04-22 1989-10-30 Fujitsu Ltd マイクロプログラム分岐方法
US5088035A (en) * 1988-12-09 1992-02-11 Commodore Business Machines, Inc. System for accelerating execution of program instructions by a microprocessor
JP3063006B2 (ja) * 1989-02-08 2000-07-12 インテル・コーポレーション マイクロプログラムされるコンピュータ装置及びマイクロコードシーケンスメモリをアドレツシングする方法
GB2230116B (en) * 1989-04-07 1993-02-17 Intel Corp An improvement for pipelined decoding of instructions in a pipelined processor

Also Published As

Publication number Publication date
DE69425310D1 (de) 2000-08-24
EP0649083A2 (de) 1995-04-19
JPH07152560A (ja) 1995-06-16
EP0649083A3 (de) 1995-05-10
DE69425310T2 (de) 2001-06-13
US5771365A (en) 1998-06-23
EP0649083B1 (de) 2000-07-19

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