JP3716088B2 - Wiring board - Google Patents
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- JP3716088B2 JP3716088B2 JP33730297A JP33730297A JP3716088B2 JP 3716088 B2 JP3716088 B2 JP 3716088B2 JP 33730297 A JP33730297 A JP 33730297A JP 33730297 A JP33730297 A JP 33730297A JP 3716088 B2 JP3716088 B2 JP 3716088B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Compositions Of Oxide Ceramics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【０００１】
【発明の属する技術分野】
本発明は、ＬＳＩ（大規模集積回路素子）等の半導体素子が搭載接続される配線基板に関するものである。
【０００２】
【従来の技術】
従来、半導体素子が搭載接続される外部電気回路基板は酸化アルミニウム質焼結体等の電気絶縁材料から成る絶縁基体と、該絶縁基体の表面及び内部に形成され、タングステン、モリブデン、マンガン等の金属材料から成る複数個の配線導体とで構成されている。
【０００３】
かかる外部電気回路基板は一般にＭｏーＭｎ法等の厚膜形成技術を採用することによって形成され、具体的には、タングステン、モリブデン、マンガン等の高融点金属から成る金属粉末に有機バインダー、溶剤等を添加し、ペースト状となした金属ペーストを生もしくは焼結セラミック体の外表面にスクリーン印刷法により配線導体となる所定パターンに印刷塗布し、次にこれを還元雰囲気中で焼成し、高融点金属とセラミック体とを焼結一体化させることによって形成されている。
【０００４】
また近時、電子機器の小型化に対応して外部電気回路基板も小型にして、かつ配線導体を高密度に形成することが要求されるようになってきており、これに対応するために配線導体を厚膜形成技術で形成するのに変えて微細配線が可能な薄膜形成技術で形成した外部電気回路基板も使用されるようになってきた。
【０００５】
この配線導体を薄膜形成技術で形成した外部電気回路基板は、絶縁基体上に、例えば、窒化タンタルやニッケル・クロム合金等から成る接着層と、ニッケル・クロム合金やチタン・タングステン合金、ニッケル、パラジウム等から成る中間層と、金や銅等から成る主導体層をイオンプレーティング法やスパッタリング法、蒸着法、メッキ法等の薄膜形成技術を採用することによって順次被着させ、次に、これらの各層をフォトリソグラフィー技術で所定パターンに加工し、配線導体とすることによって形成されている。
【０００６】
かかる外部電気回路基板は、絶縁基体の上面に、下面に電極を有する半導体素子が載置され、絶縁基体上面の配線導体と半導体素子の下面の電極とを半田等を介し接合させることによって半導体素子が搭載接続されることとなり、配線導体を介して半導体素子に所定の電気信号を出し入れすることによって半導体素子が駆動する。
【０００７】
【発明が解決しようとする課題】
しかしながら、近年、情報処理装置は高性能化が急激に進展し、これに伴って半導体素子も高速駆動が行われ、ノイズの影響を極めて受け易いものになってきたこと、従来の外部電気回路基板はタングステン、モリブデン等から成る配線導体が高調波のノイズを伝搬させ易いこと等から配線基板の配線導体に高調波のノイズが入り込んだ場合、このノイズがそのまま配線導体を介して半導体素子に入り込み、半導体素子を誤動作させるという欠点を有していた。
【０００８】
本発明は、上記欠点に鑑み案出されたもので、その目的は、半導体素子と従来の外部電気回路基板との間に配され、外部電気回路基板の配線導体に入り込んだノイズがそのまま半導体素子に入り込むのを有効に防止し、半導体素子を長期間にわたり正常に作動させることができる配線基板を提供することにある。
【０００９】
【課題を解決するための手段】
本発明は、厚み方向に複数個の貫通孔を有する絶縁基体と、前記貫通孔内に充填され、一端が絶縁基体の上面に導出されて半導体素子の電極が接続される上部接続パッドを形成し、他端が絶縁基体の下面に導出されて外部電気回路基板の配線導体が接続される下部接続パッドを形成する複数個の配線層とから成る配線基板であって、前記絶縁基体はＳｉＯ２ーＡｌ２Ｏ３ーＭｇＯーＺｎＯーＢ２Ｏ３系結晶性ガラスから成り、かつＺｎＦｅ２Ｏ４、ＭｎＦｅ２Ｏ４、ＦｅＦｅ２Ｏ４、ＣｏＦｅ２Ｏ４、ＮｉＦｅ２Ｏ４、ＣｕＦｅ２Ｏ４の少なくとも１種から成る磁性材料が含有されていることを特徴とするものである。
【００１０】
また本発明は前記磁性材料の含有量が５０〜９０重量％であることを特徴とするものである。
【００１１】
更に本発明は、前記絶縁基体に、外添加で１０〜４０重量部の無機物フィラーを含有させたことを特徴とするものである。
【００１２】
本発明の配線基板によれば、絶縁基体をＳｉＯ２ーＡｌ２Ｏ３ーＭｇＯーＺｎＯーＢ２Ｏ３系結晶性ガラスで形成するとともにＺｎＦｅ２Ｏ４、ＭｎＦｅ２Ｏ４、ＦｅＦｅ２Ｏ４、ＣｏＦｅ２Ｏ４、ＮｉＦｅ２Ｏ４、ＣｕＦｅ２Ｏ４の少なくとも１種から成る磁性材料を含有させたことから絶縁基体に設けた配線層にノイズが伝搬した場合、そのノイズは磁性材料で熱エネルギーに変換されて吸収され、その結果、ノイズが半導体素子に入り込むことはなく、半導体素子を常に正常に作動させることが可能となる。
【００１３】
また本発明の配線基板によれば、絶縁基体を形成するＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの焼成温度が８００〜１０５０℃であり、低いことからこの結晶性ガラス中に磁性材料を含有させて焼成しても磁性材料は磁性を失うことはなく、ノイズを良好に吸収することが可能となる。
【００１４】
同時にガラスセラミック焼結体の焼成温度が低いことから銅、銀、金等の融点が低くく、導通抵抗の低い材料から成る配線層を同時焼成によって形成することが可能となり、配線層を電気信号が伝搬した際、電気信号に減衰等が生じるのを有効に防止して半導体素子を正確に作動させることもできる。
【００１５】
更に絶縁基体に無機物フィラーを外添加で１０〜４０重量部の範囲で含有させると絶縁基体の機械的強度が強くなり、外力印加によって破損等が招来するのを有効に防止することもできる。
【００１６】
【発明の実施の形態】
次に本発明を添付図面に基づき詳細に説明する。
図１は本発明の配線基板の一実施例を示し、１は絶縁基体、２は配線層である。
【００１７】
前記絶縁基体１はＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスから成り、その厚み方向に貫通する複数個の貫通孔３が形成されており、該貫通孔３内には銅、銀、金等から成る導通抵抗の小さい金属材料から成る配線層２が形成されている。
【００１８】
前記ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスから成る絶縁基体１は、例えば、ＳｉＯ2 、Ａｌ2 Ｏ3 、ＭｇＯ、ＺｎＯ、Ｂ2 Ｏ3 から成るガラス成分粉末に適当な有機バインダー、溶剤、可塑剤等を添加混合して泥漿状となすとともにこれを従来周知のドクターブレード法やカレンダーロール法等を採用しシート状に成形することによって複数枚のグリーンシート（生シート）を得、次に、前記グリーンシートに適当な打ち抜き加工を施すとともに所定の順に上下に積層して生成形体となすとともに該生成形体を８００〜１０５０℃の温度で焼成することによって製作される。
【００１９】
また前記絶縁基体１に形成されている貫通孔３は、焼成によって絶縁基体１となるグリーンシート（生シート）に従来周知の金型によるパンチング孔開け加工法を採用することによって、例えば、直径８０μｍ〜２５０μｍに形成される。
【００２０】
前記絶縁基体１に形成した貫通孔３内には配線層２が形成されており、該配線層２は外部電気回路基板５の配線導体５ａと半導体素子４の電極４ａとを電気的に接続する作用をなし、配線層２の一端を絶縁基体１の上面に導出させて上部接続パッド２ａを形成するとともに、他端を絶縁基体１の下面に導出されて下部接続パッド２ｂを形成し、上部接続パッド２ａに半導体素子４の電極４ａを半田等から成る導電性接合材６を介して接合させ、下部接続パッド２ｂに外部電気回路基板５の配線導体５ａを半田等から成る導電性接合材７を介して接合させれば半導体素子４の電極４ａは配線層２を介して外部電気回路基板５の配線導体５ａに接続されることとなり、これによって外部電気回路より半導体素子４に電気信号が出し入れし、半導体素子４を作動させることができる。
【００２１】
前記配線層２は銅、銀、金等の融点が低く、導通抵抗の小さい金属材料によって形成されており、銅、銀、金等の金属粉末に有機バインダー、溶剤、可塑材等を添加混合して金属ペーストを作成し、この金属ペーストを焼成によって絶縁基体１となるグリーンシート（生シート）に設けた貫通孔内に充填しておき、グリーンシートの焼成と同時焼成によって絶縁基体１の貫通孔３内に形成される。この場合、ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスはその焼成温度が８００〜１０５０℃と低いため、絶縁基体１の焼成時に金属ペーストの金属粉末が気散してしまうことはなく、絶縁基体１と同時焼成によって絶縁基体１の貫通孔３内に形成することができる。
【００２２】
なお、前記配線層２は銅、銀、金等の導通抵抗が低い金属材料で形成されていることから配線層２を電気信号が伝搬しても電気信号に減衰等が生じるのを有効に防止することができ、その結果、半導体素子４を正確に作動させることができる。
【００２３】
また前記貫通孔３内に配線層２を有する絶縁基体１は、その内部にＺｎＦｅ2 Ｏ4 、ＭｎＦｅ2 Ｏ4 、ＦｅＦｅ2 Ｏ4 、ＣｏＦｅ2 Ｏ4 、ＮｉＦｅ2 Ｏ4 、ＣｕＦｅ2 Ｏ4 の少なくとも１種から成る磁性材料が含有されており、該磁性材料は配線層２に外部電気回路から入り込んだ高調波ノイズが伝搬した場合、そのノイズを熱エネルギーに変換して吸収し、ノイズが半導体素子に入り込むのを有効に防止する作用をなし、これによって半導体素子は常に正常に作動させることが可能となる。
【００２４】
前記磁性材料は、例えば、焼成によって絶縁基体１となるグリーンシートに、ＺｎＦｅ2 Ｏ4 、ＭｎＦｅ2 Ｏ4 、ＦｅＦｅ2 Ｏ4 、ＣｏＦｅ2 Ｏ4 、ＮｉＦｅ2 Ｏ4 、ＣｕＦｅ2 Ｏ4 の少なくとも１種から成る磁性粉末を添加含有させておくことによって絶縁基体１内に含有される。
【００２５】
前記磁性材料を含有する絶縁基体１、即ち、ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスと、磁性材料とより成る絶縁基体１はＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの量が１０重量％未満、言い換えると磁性材料が９０重量％を超えたものとなるとＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの焼成温度が高いものとなって銅等の金属材料から成る配線層２と同時に焼成するのが困難となり、またＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの量が５０重量％を超え、言い換えると磁性材料が５０重量％未満となると、絶縁基体１に設けた配線層２に外部電気回路基板５の配線導体５ａよりノイズが入り込んだ場合、ノイズを良好に吸収することができず、半導体素子４に誤動作を起こさせてしまう。従って、前記ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスに磁性材料を含有させた絶縁基体１は、ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの量を１０〜５０重量％の範囲に、磁性材料の量を５０〜９０重量％の範囲にしておくことが好ましい。
【００２６】
前記磁性材料はまたその粒径が０．５μｍ未満となると、焼成によって絶縁基体１を製作する際、ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスとの反応が進行し、磁性材料の残存率が低下してノイズを効果的に吸収することができなくなり、また１０μｍを超えるとＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの焼成温度が高いものとなって銅等の金属材料から成る配線層２と同時に焼成するのが困難となる。従って、前記磁性材料はその粒径を０．５μｍ〜１０μｍの範囲としておくことが好ましい。
【００２７】
本発明の配線基板においては絶縁基体１をＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスで形成することが重要である。
【００２８】
このＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスは、例えば、ＳｉＯ2 ：４０〜４６重量％、Ａｌ2 Ｏ3 ：２５〜３０重量％、ＭｇＯ：８〜１３重量％、ＺｎＯ：６〜９重量％、Ｂ2 Ｏ3 ：８〜１１重量％で形成されている。
【００２９】
前記ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスは、焼成時にガーナイト（ＺｎＯ・Ａｌ2 Ｏ3 ）、コージェライト（２ＭｇＯ・２Ａｌ2 Ｏ3 ）、スピネル型結晶相（ＭｇＯ・Ａｌ2 Ｏ3 、ＺｎＯ・Ａｌ2 Ｏ3 ）等の結晶相を生成するが、これらの結晶相の生成により絶縁基体１の強度が向上するという性質を持っている。
【００３０】
また前記ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスはその焼成温度が８００〜１０５０℃と低いことから、配線層２を銅、銀、金等の融点が低くく、導通抵抗の低い材料としても絶縁基体１と同時焼成によって形成することが可能となり、配線層２を電気信号が伝搬した際、電気信号に減衰等が生じるのを有効に防止して半導体素子４を正確に作動させることができる。
【００３１】
更に前記ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの焼成温度が８００〜１０５０℃と低いことから焼成時に磁性材料を含有させておいても磁性材料の磁性が失われることはなく、これによって配線層２に入り込んだノイズを良好に吸収することが可能となる。
【００３２】
前記ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスはまたその比誘電率が約５（室温１ＭＨｚ）と低くく、そのため絶縁基体１の貫通孔３内に配されている配線層２に電気信号を伝搬させても伝搬遅延を招来することはなく、これによって配線層２に高速で電気信号を伝搬させることが可能となる。
【００３３】
なお、前記ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスは、ＳｉＯ2 の量が４０重量％未満、或いは４６重量％を超えるとＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの焼成温度が高いものとなって銅等の金属材料から成る配線層２と同時に焼成するのが困難となる。従って、ＳｉＯ2 の量は４０〜４６重量％の範囲としておくことが好ましい。
【００３４】
またＡｌ2 Ｏ3 の量が２５重量％未満、或いは３０重量％を超えるとＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの焼成温度が高いものとなって銅等の金属材料から成る配線層２と同時に焼成するのが困難となる。従って、Ａｌ2 Ｏ3 の量は２５〜３０重量％の範囲としておくことが好ましい。
【００３５】
またＭｇＯの量が８重量％未満となると焼成によってＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスから成る絶縁基体１を製作する際、生成するコージェライト（２ＭｇＯ・２Ａｌ2 Ｏ3 ）の量が少なくなって絶縁基体１の強度を大きく向上させることができず、また１３重量％を超えるとＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの焼成温度が高いものとなって銅等の金属材料から成る配線層２と同時に焼成するのが困難となる。従って、ＭｇＯの量は８〜１３重量％の範囲としておくことが好ましい。
【００３６】
またＺｎＯの量が６重量％未満となると焼成によってＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスから成る絶縁基体１を製作する際、生成するガーナイト（ＺｎＯ・Ａｌ2 Ｏ3 ）の量が少なくなって絶縁基体１の強度を大きく向上させることができず、また９重量％を超えるとＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの焼成温度が高いものとなって銅等の金属材料から成る配線層２と同時に焼成するのが困難となる。従って、ＺｎＯの量は６〜９重量％の範囲としておくことが好ましい。
【００３７】
またＢ2 Ｏ3 の量が８重量％未満となると焼成によってＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスから成る絶縁基体１を製作する際、ガーナイト（ＺｎＯ・Ａｌ2 Ｏ3 ）、コージェライト（２ＭｇＯ・２Ａｌ2 Ｏ3 ）、スピネル型結晶相（ＭｇＯ・Ａｌ2 Ｏ3 、ＺｎＯ・Ａｌ2 Ｏ3 ）等の結晶相が過剰に生成され、絶縁基体１が多孔質のものとなって配線基板として不向きとなり、また１１重量％を超えると耐薬品性が大きく劣化して配線基板としての信頼性が大きく低下してしまう。従って、Ｂ2 Ｏ3 の量は８〜１１重量％の範囲としておくことが好ましい。
【００３８】
更に前記ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスはその内部に無機物フィラー，具体的にはアルミナ、シリカ、窒化珪素、窒化アルミニウム等の粉末を外添加で１０〜４０重量部添加含有させておくと機械的強度が大幅に向上し、外力印加によって破損等を招来するのが有効に防止される。従って、絶縁基体１の機械的強度を向上させ、外力印加によって破損等を招来しないようにするのは前記ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスに無機物フィラーを外添加で１０〜４０重量部添加含有させて絶縁基体１を形成することが好ましい。
【００３９】
前記無機物フィラーは更にその粒径を０．５〜５μｍの範囲としておくとガラスセラミック焼結体中に均一に分散含有させて絶縁基体１の機械的強度を均一に向上させることができる。従って、前記無機物フィラーはその粒径を０．５〜５μｍの範囲としておくことが好ましい。
【００４０】
なお、本発明は上述の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。
【００４１】
また上述の実施例では複数のグリーンシートを積層した成形体を焼成して絶縁基体１を作成したが、これをプレス成形等によって成形した１つの成形体を焼成して作成してもよい。また同時に複数のグリーンシートを積層した成形体を焼成して絶縁基体１を作成する際、ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスに磁性材料を含有させたものと、ＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスに無機物フィラーを含有させたものとを多層に配して作成してもよい。
【００４２】
【発明の効果】
本発明の配線基板によれば、絶縁基体をＳｉＯ２ーＡｌ２Ｏ３ーＭｇＯーＺｎＯーＢ２Ｏ３系結晶性ガラスで形成するとともにＺｎＦｅ２Ｏ４、ＭｎＦｅ２Ｏ４、ＦｅＦｅ２Ｏ４、ＣｏＦｅ２Ｏ４、ＮｉＦｅ２Ｏ４、ＣｕＦｅ２Ｏ４の少なくとも１種から成る磁性材料を含有させたことから絶縁基体に設けた配線層にノイズが伝搬した場合、そのノイズは磁性材料で熱エネルギーに変換されて吸収され、その結果、ノイズが半導体素子に入り込むことはなく、半導体素子を常に正常に作動させることが可能となる。
【００４３】
また本発明の配線基板によれば、絶縁基体を形成するＳｉＯ2 ーＡｌ2 Ｏ3 ーＭｇＯーＺｎＯーＢ2 Ｏ3 系結晶性ガラスの焼成温度が８００〜１０５０℃であり、低いことからこの結晶性ガラス中に磁性材料を含有させて焼成しても磁性材料は磁性を失うことはなく、ノイズを良好に吸収することが可能となる。
【００４４】
同時にガラスセラミック焼結体の焼成温度が低いことから銅、銀、金等の融点が低くく、導通抵抗の低い材料から成る配線層を同時焼成によって形成することが可能となり、配線層を電気信号が伝搬した際、電気信号に減衰等が生じるのを有効に防止して半導体素子を正確に作動させることもできる。
【００４５】
更に絶縁基体に無機物フィラーを外添加で１０〜４０重量部の範囲で含有させると絶縁基体の機械的強度が強くなり、外力印加によって破損等が招来するのを有効に防止することもできる。
【図面の簡単な説明】
【図１】本発明の配線基板の一実施例を示す断面図である。
【符号の説明】
１・・・絶縁基体
２・・・配線層
２ａ・・上部接続パッド
２ｂ・・下部接続パッド
３・・・貫通孔
４・・・半導体素子
４ａ・・半導体素子の電極
５・・・外部電気回路基板
５ａ・・外部電気回路基板の配線導体[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a wiring board on which a semiconductor element such as an LSI (Large Scale Integrated Circuit Element) is mounted and connected.
[0002]
[Prior art]
Conventionally, an external electric circuit board on which a semiconductor element is mounted and connected is formed on an insulating base made of an electric insulating material such as an aluminum oxide sintered body, and on the surface and inside of the insulating base, and a metal such as tungsten, molybdenum or manganese. It consists of a plurality of wiring conductors made of material.
[0003]
Such an external electric circuit board is generally formed by adopting a thick film forming technique such as a Mo-Mn method. Specifically, an organic binder, a solvent, etc. are added to a metal powder made of a refractory metal such as tungsten, molybdenum, or manganese. Is added to the outer surface of the raw or sintered ceramic body in a predetermined pattern to be a wiring conductor by screen printing, and then fired in a reducing atmosphere to obtain a high melting point. It is formed by sintering and integrating a metal and a ceramic body.
[0004]
Recently, in response to miniaturization of electronic devices, it has been demanded that an external electric circuit board be made smaller and that a wiring conductor be formed at a high density. An external electric circuit board formed by a thin film forming technique capable of fine wiring instead of forming a conductor by a thick film forming technique has also been used.
[0005]
An external electric circuit board in which this wiring conductor is formed by a thin film forming technology is formed on an insulating substrate, for example, an adhesive layer made of tantalum nitride, nickel-chromium alloy, etc., nickel-chromium alloy, titanium-tungsten alloy, nickel, palladium And the like, and a main conductor layer made of gold, copper, or the like are sequentially deposited by adopting a thin film forming technique such as an ion plating method, a sputtering method, a vapor deposition method, or a plating method. Each layer is formed by processing it into a predetermined pattern by a photolithography technique to form a wiring conductor.
[0006]
In such an external electric circuit board, a semiconductor element having an electrode on the lower surface is placed on the upper surface of the insulating base, and the wiring conductor on the upper surface of the insulating base and the electrode on the lower surface of the semiconductor element are joined via solder or the like. The semiconductor element is driven by inputting and outputting a predetermined electric signal to and from the semiconductor element through the wiring conductor.
[0007]
[Problems to be solved by the invention]
However, in recent years, the performance of information processing devices has advanced rapidly, and with this, semiconductor elements have also been driven at high speed, making them extremely susceptible to noise. Conventional external electric circuit boards When the harmonic noise enters the wiring conductor of the wiring board because the wiring conductor made of tungsten, molybdenum, etc. easily propagates the harmonic noise, this noise directly enters the semiconductor element via the wiring conductor, The semiconductor device has a drawback of malfunctioning.
[0008]
The present invention has been devised in view of the above disadvantages, and its object is to arrange a semiconductor element between a semiconductor element and a conventional external electric circuit board, and the noise that enters the wiring conductor of the external electric circuit board remains as it is. An object of the present invention is to provide a wiring board that can effectively prevent the semiconductor element from entering and can operate the semiconductor element normally over a long period of time.
[0009]
[Means for Solving the Problems]
The present invention forms an insulating substrate having a plurality of through holes in the thickness direction, and an upper connection pad filled in the through holes, one end of which is led out to the upper surface of the insulating substrate and connected to an electrode of a semiconductor element. A wiring board comprising a plurality of wiring layers, the other end of which is led out to the lower surface of the insulating base to form a lower connection pad to which the wiring conductor of the external electric circuit board is connected, the insulating base being SiO 2− al 2 O 3 consists of over MgO over ZnO over B 2 O 3 based crystalline glass, and ZnFe 2 O 4, MnFe 2 O 4, FeFe 2 O 4, CoFe 2 O 4, NiFe 2 O 4, CuFe 2 O 4 The magnetic material which consists of at least 1 type of these is contained, It is characterized by the above-mentioned.
[0010]
The present invention is also characterized in that the content of the magnetic material is 50 to 90% by weight.
[0011]
Furthermore, the present invention is characterized in that 10 to 40 parts by weight of an inorganic filler is added to the insulating base by external addition.
[0012]
According to the wiring board of the present invention, ZnFe 2 O 4, MnFe 2 O 4, FeFe 2 O 4 with an insulating substrate with SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass , CoFe 2 O 4 , NiFe 2 O 4 , CuFe 2 O 4 containing a magnetic material, when noise propagates to the wiring layer provided on the insulating substrate, the noise is heated by the magnetic material. It is converted into energy and absorbed. As a result, noise does not enter the semiconductor element, and the semiconductor element can always operate normally.
[0013]
According to the wiring board of the present invention, the firing temperature of the SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass forming the insulating base is 800 to 1050 ° C., from this low that Even if a magnetic material is contained in the crystalline glass and baked, the magnetic material does not lose its magnetism and can absorb noise well.
[0014]
At the same time, since the firing temperature of the glass ceramic sintered body is low, it becomes possible to form a wiring layer made of a material with low melting point such as copper, silver, gold, etc. and low conduction resistance by simultaneous firing. When the signal propagates, it is possible to effectively prevent the electric signal from being attenuated and to operate the semiconductor device accurately.
[0015]
Furthermore, when an inorganic filler is added to the insulating substrate in an amount of 10 to 40 parts by weight, the mechanical strength of the insulating substrate is increased, and it is possible to effectively prevent breakage due to the application of external force.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Next, the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 shows an embodiment of a wiring board according to the present invention, where 1 is an insulating substrate and 2 is a wiring layer.
[0017]
The insulating substrate 1 is made of SiO 2 —Al 2 O 3 —MgO—ZnO—B 2 O 3 crystalline glass, and has a plurality of through
[0018]
The insulating substrate 1 made of the SiO 2 -Al 2 O 3 -MgO-ZnO-B 2 O 3 crystalline glass is composed of, for example, a glass component made of SiO 2 , Al 2 O 3 , MgO, ZnO, B 2 O 3. Add a suitable organic binder, solvent, plasticizer, etc. to the powder to make a slurry, and then form this into a sheet using a well-known doctor blade method, calendar roll method, etc. (Green sheet) is obtained, and then the green sheet is appropriately punched and laminated in a predetermined order to form a generated shape and the generated shape is fired at a temperature of 800 to 1050 ° C. Is done.
[0019]
Further, the
[0020]
A wiring layer 2 is formed in the
[0021]
The wiring layer 2 is formed of a metal material having a low melting point such as copper, silver, and gold and having a low conduction resistance. An organic binder, a solvent, a plasticizer, and the like are added to and mixed with metal powder such as copper, silver, and gold. A metal paste is prepared, and this metal paste is filled into a through hole provided in a green sheet (raw sheet) to be the insulating base 1 by firing, and the through hole of the insulating base 1 is fired simultaneously with the firing of the green sheet. 3 is formed. In this case, since SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass the firing temperature is 800 to 1050 ° C. and lower, the metal powder of the metal paste during firing of the insulating base 1 Eat However, it can be formed in the through
[0022]
Since the wiring layer 2 is made of a metal material having a low conduction resistance such as copper, silver, or gold, it is possible to effectively prevent the electric signal from being attenuated even if the electric signal propagates through the wiring layer 2. As a result, the semiconductor element 4 can be operated accurately.
[0023]
The insulating substrate 1 having the wiring layer 2 in the through
[0024]
The magnetic material is, for example, at least one of ZnFe 2 O 4 , MnFe 2 O 4 , FeFe 2 O 4 , CoFe 2 O 4 , NiFe 2 O 4 , and CuFe 2 O 4 on a green sheet that becomes the insulating base 1 by firing. It is contained in the insulating substrate 1 by adding a magnetic powder composed of seeds.
[0025]
The insulating substrate 1 containing the magnetic material, that is, the insulating substrate 1 made of SiO 2 -Al 2 O 3 -MgO-ZnO-B 2 O 3 crystalline glass and a magnetic material is SiO 2 -Al 2 O 3. When the amount of —MgO—ZnO—B 2 O 3 crystalline glass is less than 10% by weight, in other words, the magnetic material exceeds 90% by weight, SiO 2 —Al 2 O 3 —MgO—ZnO—B 2 O Since the firing temperature of the 3 series crystalline glass becomes high, it becomes difficult to fire simultaneously with the wiring layer 2 made of a metal material such as copper, and SiO 2 —Al 2 O 3 —MgO—ZnO—B 2 O 3 When the amount of the crystalline glass exceeds 50% by weight, in other words, when the magnetic material becomes less than 50% by weight, noise enters the wiring layer 2 provided on the insulating substrate 1 from the wiring conductor 5a of the external electric circuit board 5. , Can not absorb the noise well Thereby to cause a malfunction in the semiconductor device 4. Accordingly, the insulating substrate 1 in which the magnetic material is contained in the SiO 2 —Al 2 O 3 —MgO—ZnO—B 2 O 3 crystalline glass is SiO 2 —Al 2 O 3 —MgO—ZnO—B 2 O. It is preferable to keep the amount of the 3 series crystalline glass in the range of 10 to 50% by weight and the amount of the magnetic material in the range of 50 to 90% by weight.
[0026]
When the magnetic material has a particle size of less than 0.5 μm, when the insulating substrate 1 is manufactured by firing, the reaction with the SiO 2 —Al 2 O 3 —MgO—ZnO—B 2 O 3 crystalline glass occurs. As a result, the residual rate of the magnetic material is reduced and noise cannot be effectively absorbed. When the thickness exceeds 10 μm, the SiO 2 -Al 2 O 3 -MgO-ZnO-B 2 O 3 crystalline glass It becomes difficult to fire at the same time as the wiring layer 2 made of a metal material such as copper due to the high firing temperature. Therefore, the magnetic material preferably has a particle size in the range of 0.5 μm to 10 μm.
[0027]
In the wiring board of the present invention, it is important to form the insulating base 1 by SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass.
[0028]
The SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass, for example, SiO 2: 40 to 46 wt%, Al 2 O 3: 25~30 wt%, MgO: 8 to 13 % By weight, ZnO: 6 to 9% by weight, B 2 O 3 : 8 to 11% by weight.
[0029]
The SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass, gahnite during firing (ZnO · Al 2 O 3) , cordierite (2MgO · 2Al 2 O 3) , spinel-type crystal phase Crystal phases such as (MgO · Al 2 O 3 , ZnO · Al 2 O 3 ) are generated, and the strength of the insulating substrate 1 is improved by the generation of these crystal phases.
[0030]
From The said SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass that the calcination temperature is 800 to 1050 ° C. and less, the wiring layer 2 of copper, silver, the melting point of gold or the like low In addition, even a material having a low conduction resistance can be formed by simultaneous firing with the insulating substrate 1, and when the electric signal propagates through the wiring layer 2, it is possible to effectively prevent the electric signal from being attenuated. 4 can be operated accurately.
[0031]
Further magnetism of the SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based magnetic material be allowed to contain a magnetic material at the time of firing because the firing temperature of the crystalline glass is 800 to 1050 ° C. and lower It is not lost, and this makes it possible to absorb the noise that has entered the wiring layer 2 satisfactorily.
[0032]
The SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass also a relative dielectric constant of about 5 (room temperature 1 MHz) and Hikukuku, therefore disposed in the through-
[0033]
The SiO 2 -Al 2 O 3 -MgO-ZnO-B 2 O 3 crystalline glass is SiO 2 -Al 2 O 3 -when the amount of SiO 2 is less than 40% by weight or more than 46% by weight. The firing temperature of the MgO—ZnO—B 2 O 3 crystalline glass becomes high, making it difficult to fire simultaneously with the wiring layer 2 made of a metal material such as copper. Therefore, the amount of SiO 2 is preferably in the range of 40 to 46% by weight.
[0034]
Moreover, if the amount of Al 2 O 3 is less than 25% by weight or more than 30% by weight, the firing temperature of the SiO 2 -Al 2 O 3 -MgO-ZnO-B 2 O 3 crystalline glass becomes high and copper It becomes difficult to fire simultaneously with the wiring layer 2 made of a metal material such as. Therefore, the amount of Al 2 O 3 is preferably in the range of 25 to 30% by weight.
[0035]
When the amount of MgO is less than 8% by weight, the cordierite (2MgO · 2) produced when the insulating substrate 1 made of SiO 2 -Al 2 O 3 -MgO-ZnO-B 2 O 3 crystalline glass is produced by firing. 2Al 2 O 3) amount becomes less can not greatly improve the strength of the insulating substrate 1, also more than 13% by weight SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystals It becomes difficult to fire simultaneously with the wiring layer 2 made of a metal material such as copper due to the high firing temperature of the functional glass. Therefore, the amount of MgO is preferably in the range of 8 to 13% by weight.
[0036]
Also when manufacturing the insulating substrate 1 made of SiO 2 over Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass by baking the amount of ZnO is less than 6% by weight, produced gahnite (ZnO · Al When the amount of 2 O 3 ) decreases and the strength of the insulating substrate 1 cannot be greatly improved, and the content exceeds 9% by weight, the SiO 2 -Al 2 O 3 -MgO-ZnO-B 2 O 3 crystallinity It becomes difficult to fire at the same time as the wiring layer 2 made of a metal material such as copper due to the high firing temperature of the glass. Therefore, the amount of ZnO is preferably in the range of 6 to 9% by weight.
[0037]
Also when the amount of B 2 O 3 is to fabricate the insulating substrate 1 made of SiO 2 over Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass by firing less than 8 wt%, gahnite (ZnO · Al 2 O 3), cordierite (2MgO · 2Al 2 O 3) , the crystalline phase such as a spinel-type crystal phase (MgO · Al 2 O 3, ZnO · Al 2 O 3) is excessively formed, the insulating base 1 It becomes porous and unsuitable as a wiring board, and if it exceeds 11% by weight, the chemical resistance is greatly deteriorated and the reliability as a wiring board is greatly lowered. Therefore, the amount of B 2 O 3 is preferably in the range of 8 to 11% by weight.
[0038]
Further, the SiO 2 —Al 2 O 3 —MgO—ZnO—B 2 O 3 crystalline glass has an inorganic filler, specifically, powder of alumina, silica, silicon nitride, aluminum nitride, etc. added to the inside thereof. Addition of ˜40 parts by weight significantly improves the mechanical strength and effectively prevents breakage and the like due to the application of external force. Accordingly, it is the inorganic filler in the SiO 2 -Al 2 O 3 -MgO-ZnO-B 2 O 3 crystalline glass that improves the mechanical strength of the insulating substrate 1 and prevents damage due to the application of external force. It is preferable to form the insulating substrate 1 by adding 10 to 40 parts by weight of an external additive.
[0039]
When the particle size of the inorganic filler is further in the range of 0.5 to 5 μm, the mechanical strength of the insulating substrate 1 can be improved uniformly by uniformly dispersing and containing it in the glass ceramic sintered body. Therefore, the inorganic filler preferably has a particle size in the range of 0.5 to 5 μm.
[0040]
In addition, this invention is not limited to the above-mentioned Example, A various change is possible if it is a range which does not deviate from the summary of this invention.
[0041]
In the above-described embodiment, the insulating substrate 1 is formed by firing a formed body in which a plurality of green sheets are laminated. However, it may be formed by firing a single formed body formed by press molding or the like. At the same time, when the insulating substrate 1 is formed by firing a molded body in which a plurality of green sheets are laminated, a magnetic material is contained in the SiO 2 -Al 2 O 3 -MgO-ZnO-B 2 O 3 crystalline glass. It is also possible to make a multilayer structure composed of an inorganic filler and an SiO 2 -Al 2 O 3 -MgO-ZnO-B 2 O 3 crystalline glass.
[0042]
【The invention's effect】
According to the wiring board of the present invention, ZnFe 2 O 4, MnFe 2 O 4, FeFe 2 O 4 with an insulating substrate with SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass , CoFe 2 O 4 , NiFe 2 O 4 , CuFe 2 O 4 containing a magnetic material, when noise propagates to the wiring layer provided on the insulating substrate, the noise is heated by the magnetic material. It is converted into energy and absorbed. As a result, noise does not enter the semiconductor element, and the semiconductor element can always operate normally.
[0043]
According to the wiring board of the present invention, the firing temperature of the SiO 2 chromatography Al 2 O 3 over MgO over ZnO over B 2 O 3 based crystalline glass forming the insulating base is 800 to 1050 ° C., from this low that Even if a magnetic material is contained in the crystalline glass and baked, the magnetic material does not lose its magnetism and can absorb noise well.
[0044]
At the same time, since the firing temperature of the glass ceramic sintered body is low, it becomes possible to form a wiring layer made of a material with low melting point such as copper, silver, gold, etc. and low conduction resistance by simultaneous firing. When the signal propagates, it is possible to effectively prevent the electric signal from being attenuated and to operate the semiconductor device accurately.
[0045]
Furthermore, when an inorganic filler is added to the insulating substrate in an amount of 10 to 40 parts by weight, the mechanical strength of the insulating substrate is increased, and it is possible to effectively prevent breakage due to the application of external force.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an embodiment of a wiring board according to the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Insulation base | substrate 2 ... Wiring layer 2a ...
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33730297A JP3716088B2 (en) | 1997-12-08 | 1997-12-08 | Wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33730297A JP3716088B2 (en) | 1997-12-08 | 1997-12-08 | Wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11176998A JPH11176998A (en) | 1999-07-02 |
| JP3716088B2 true JP3716088B2 (en) | 2005-11-16 |
Family
ID=18307353
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33730297A Expired - Fee Related JP3716088B2 (en) | 1997-12-08 | 1997-12-08 | Wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3716088B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0720049A2 (en) | 1990-05-09 | 1996-07-03 | Fuji Photo Film Co., Ltd. | Photographic processing composition and processing method using the same |
| EP1914594A2 (en) | 2004-01-30 | 2008-04-23 | FUJIFILM Corporation | Silver halide color photographic light-sensitive material and color image-forming method |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SG10201403905YA (en) | 2003-04-15 | 2014-10-30 | Sensors For Med & Science Inc | System and method for attenuating the effect of ambient light on an optical sensor |
| KR20060111449A (en) * | 2003-09-24 | 2006-10-27 | 이비덴 가부시키가이샤 | Interposer and multilayer printed wiring board |
| JP4489491B2 (en) * | 2004-04-28 | 2010-06-23 | イビデン株式会社 | Interposer |
-
1997
- 1997-12-08 JP JP33730297A patent/JP3716088B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0720049A2 (en) | 1990-05-09 | 1996-07-03 | Fuji Photo Film Co., Ltd. | Photographic processing composition and processing method using the same |
| EP1914594A2 (en) | 2004-01-30 | 2008-04-23 | FUJIFILM Corporation | Silver halide color photographic light-sensitive material and color image-forming method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH11176998A (en) | 1999-07-02 |
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