JP3681922B2 - Drawer terminal, power semiconductor device case, and power semiconductor device - Google Patents

Drawer terminal, power semiconductor device case, and power semiconductor device Download PDF

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JP3681922B2
JP3681922B2 JP15618399A JP15618399A JP3681922B2 JP 3681922 B2 JP3681922 B2 JP 3681922B2 JP 15618399 A JP15618399 A JP 15618399A JP 15618399 A JP15618399 A JP 15618399A JP 3681922 B2 JP3681922 B2 JP 3681922B2
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power semiconductor
semiconductor device
case
lead terminal
terminal
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JP2000349219A (en
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慶久 小栗
紀行 財前
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、電力用半導体チップ等が樹脂封止された電力用半導体装置又は電力用半導体モジュールに関し、特に、当該電力用半導体装置に適用されるインサートケース(ないしはインサートモールドケース)及び同ケース用の(外部)引き出し端子の構造に関する。
【0002】
【従来の技術】
従来の電力用半導体装置20Pの構成を図6の斜視図と図6中の要部拡大図である図7とを用いて説明する。図6に示すように、電力用半導体装置20Pは、一方の表面(第3方向D3に垂直を成す。なお、第3方向D3は、互いに垂直な第1及び第2方向D1,D2の双方に垂直を成す)上に絶縁層(図示せず)が配置された金属板から成る基板3を備える。基板3の上記絶縁層上には所定の配線パターン(図示せず)が銅箔等で形成されており、当該配線パターンの所定の位置に電力用半導体チップ2や当該チップ2の制御回路等を成す表面実装部品(抵抗やIC等)4が配置されている。また、電力用半導体チップ2と配線パターンの所定の箇所とがワイヤボンディングされている。
【0003】
更に、基板3が、当該基板3の形状寸法に対応した開口形状の貫通孔を有するインサートケース1Pの一方の開口部を塞ぐように配置されて、両者が接着剤で接着されている。インサートケース1Pは、引き出し端子5Pと樹脂10とが一体成型されて成る。引き出し端子5Pの一端部50BP側は外部リードとしてインサートケース1Pの外部に延在する一方で、その他端部50AP側は内部リードとしてインサートケース1Pの内部に延在している。図7に示すように、インサートケース1Pの端子配列部1APにおいて樹脂10から露出している端部50AP側表面の一部であるワイヤボンディング面52SPと、上記配線パターンの所定の箇所とがワイヤ6を介してワイヤボンディングされている。そして、基板3とインサートケース1Pとで以て形成される器状構造の内部にエポキシ樹脂等が電力用半導体チップ2等を覆うように充填されている。
【0004】
【発明が解決しようとする課題】
ここで、引き出し端子5Pのみを抽出して図8に示す。図8に示すように、引き出し端子5Pは、ワイヤボンディング面52SPを有する部分52Pの第2方向D2における両(側)端部に段差部53Pを有している。かかる段差部53Pが樹脂10内に埋設されることによって(図6又は図7参照)、引き出し端子5Pが樹脂10に対して密着・固定され、ワイヤボンディング面52SPに対するワイヤボンディングを実施可能にしている。
【0005】
しかしながら、従来の引き出し端子5Pでは、段差部53Pがワイヤボンディング面52SPを有する部分52Pの上記端部に形成されているので、ワイヤボンディング面52SPの幅(第2方向D2に沿った長さ)W2は、引き出し端子5Pの基材である長尺部材の幅W0(引き出し端子5Pの幅として捉えることができる)よりも狭い。このため、当該狭いワイヤボンディング面52SPに対して確実にワイヤボンディングを実施することは難しいので、従来の電力用半導体装置20Pは、ワイヤボンディング面52SPに対するワイヤボンディングの歩留まりが低いという問題点、即ち、これに起因して同装置20Pの歩留まりが低いという問題点を有している。
【0006】
かかる問題点を解決しうる手段の一つとして、段差部53Pの形成部分を小さくしてワイヤボンディング面52SPの面積を拡大することが考えられる。ところが、かかる場合には、引き出し端子5Pの樹脂10への固定強度が低下してしまう。
【0007】
上述の問題点に対する他の解決手段の一つとして、ワイヤボンディング面52SP(を有する部分52P)よりも端部50AP側の部分51Pの露出表面に対してワイヤボンディングを実施することが挙げられる。しかしながら、上記部分51Pの露出表面は端部50AP近傍の領域であるためワイヤボンディングを実施するために十分な作業マージンを確保することができず、引き出し端子へのワイヤボンディングの歩留まり改善策とはなり難いと考えられる。
【0008】
このとき、図7及び図8に示すように当該部分51Pの幅が狭い先端部分51bPの幅を拡大すれば良いと考えられる。しかしながら、インサートケース1Pの製造方法を鑑みれば、かかる拡大化は望めないことは明らかである。即ち、引き出し端子5Pは複数個が上記各先端部51bPを伸延した部分において互いに連結された状態でインサートケース1Pの金型へ配置されて、樹脂10と一体成型される。その後、インサートケース1Pの上記貫通孔内に突出している上記連結部分が切断除去される。かかる切断時に生じうる引き出し端子5P及び樹脂10の変形等を抑制防止するために、先端部51bPの幅は狭い方が望ましいのである。
【0009】
これに対して、ワイヤボンディング面52SPよりもL字型の角部59P側の部分58Pの露出表面に対してワイヤボンディングを実施することも考えられる。しかし、図1及び図2を参照すれば分かるように上記部分58Pはインサートケース1Pの内壁面に近接しており、ワイヤボンディング装置の作業ヘッドが当該部分58Pの露出表面に到達することができないので、ワイヤボンディング自体を実施することができない。
【0010】
逆に言えば、上記部分51P,58Pを考慮の上でワイヤボンディング面52SP(を有する部分52P)が規定されているため、上記部分51P,58Pへワイヤボンディングを実施するという方法は採用するに至らないと言える。
【0011】
また、上述のワイヤボンディングの歩留まりに関する問題点を解決しうる更に他の手段の一つとして、上記長尺部材ないしは引き出し端子5Pの幅W0を増大することによってワイヤボンディング面52SPの幅W2を拡大する方法が考えられる。しかしながら、かかる場合には引き出し端子5P自体が大型化してしまうので、同数の引き出し端子が同様に配置される場合を比較すると、そのような引き出し端子を有するインサートケース又は電力用半導体装置は、引き出し端子の配列方向(第2方向D2)に沿った寸法が大きくなってしまうという新たな問題点が惹起される。このとき、引き出し端子5Pの樹脂10への密着・固定強度を確保するためには引き出し端子5Pの幅W0の拡大に対応して段差部53Pを大きくしなければならないので、結果的に、上記幅W0の拡大によってワイヤボンディング面52SPの拡大を実現することは難しいと考えられる。
【0012】
本発明は、かかる点に鑑みてなされたものであり、樹脂への密着固定強度を確保しつつ、ワイヤボンディングの高い歩留まりを実現可能であると同時に、電力用半導体装置用ケース及び電力用半導体装置を小型化しうる、引き出し端子を提供することを第1の目的とする。
【0013】
更に、本発明の第2の目的は、上記第1及び第2の目的が実現されて、引き出し端子へのワイヤボンディングが確実に実施可能であり、引き出し端子の緩みや外れ等の不具合が抑制排除されると共に、小型化を推進しうる電力用半導体装置用ケースを提供することにある。
【0014】
加えて、本発明は、上記第1及び第2の目的が実現されて、所定の動作特性で以て確実に且つ安定的に動作する電力用半導体装置を提供することを第3の目的とする。
【0015】
また、本発明は、上記第1乃至第3の目的を低コストで以て実現しうる、引き出し端子,電力用半導体装置用ケース又は電力用半導体装置を提供することを第4の目的とする。
【0016】
【課題を解決するための手段】
(1)請求項1に記載の発明に係る引き出し端子は、長尺部材を基材とし、樹脂と一体成型されて電力用半導体装置のケースを構成する引き出し端子であって、前記ケース内に配置される側の端部から前記長尺部材の長手方向に沿った第1距離の範囲内の部分である第1部分と、前記第1部分から前記端部とは反対側に前記長手方向に沿って引き続く第2距離の範囲内の部分であり、ワイヤボンディング面を有する第2部分とを備え、前記第1部分は、少なくとも一部に前記ワイヤボンディング面に対する後退面を有し、前記後退面は、前記長尺部材を厚さの方向にプレス加工されて成ることを特徴とする。
【0017】
(2)請求項2に記載の発明に係る引き出し端子は、請求項1に記載の引き出し端子であって、前記第1部分の全体が前記後退面を成すことを特徴とする。
【0019】
(3)請求項3に記載の発明に係る電力用半導体装置用ケースは、請求項1又は2に記載の引き出し端子と、前記引き出し端子と一体成型された樹脂とを備えることを特徴とする。
【0020】
(4)請求項4に記載の発明に係る電力用半導体装置は、請求項に記載の電力用半導体装置用ケースと、前記電力用半導体装置用ケース内に配置されて前記引き出し端子と電気的に接続された電力用半導体チップとを備えることを特徴とする。
【0021】
【発明の実施の形態】
<実施の形態1>
図1は、実施の形態1に係る電力用半導体装置20の構成の一例を示す斜視図である。図1に示すように、電力用半導体装置20は、金属板と当該金属板上の所定の位置に配置された絶縁層ないしは絶縁板(図示せず)とから成る、いわゆる金属絶縁基板ないしは絶縁金属基板(以下、単に「基板」とも呼ぶ)3を備える。上記金属板は、第1方向D1に平行な辺ないしはエッジ(図示せず)と第1方向D1に垂直な第2方向D2に平行な辺ないしはエッジ(図示せず)とで規定される4角形状の金属板から成り、上記第1及び第2方向D1,D2の双方に垂直を成す第3方向D3に垂直な表面を有する。かかる表面上に配置された上記絶縁層上には所定の配線パターンないしは回路パターン(図示せず)が銅箔等で形成されており、当該配線パターンの所定の位置に電力用半導体チップ2や当該チップ2の制御回路等を構成する表面実装部品(抵抗やIC等)4が配置されている。そして、電力用半導体チップ2と配線パターンの所定の箇所とがワイヤボンディングされて接続されている。電力用半導体チップ2等の配置・接続は以下のようにして行われる。まず、上記配線パターン上であって電力用半導体チップ2等を配置すべき所定の位置にクリーム半田を印刷し、その上に電力用半導体チップ2等を搭載する。その後、リフロー処理を施して、電力用半導体チップ2等を上記配線パターンに接続する。そして、配線パターンの所定の箇所と電力用半導体チップ2の端子とをワイヤボンディングする。
【0022】
更に、図1に示すように、電力用半導体装置20は、引き出し端子5と樹脂10とが一体成型されたインサートケース(電力用半導体装置用ケース。以下、単に「ケース」とも呼ぶ)1を備える。当該インサートケース1には、上記基板3で以て塞ぎうる程度の形状寸法の(4角形状の)開口を有する貫通孔が第3方向D3に沿って形成されている。
【0023】
そして、引き出し端子5は、後述の図3に示すように略L字型の金属長尺部材から成り、L字型の角部59及びその付近は図1に示すように樹脂10中に完全に埋設されて固定されている。そして、第3方向D3に沿って延在して樹脂10又はケース1の外側に突出する部分(端部50B側の部分)が外部リードを成し、ケース1の内部において第2方向D2に沿って延在する部分(端部50A側の部分)が内部リードを成す。図1中の要部拡大図である図2に示すように、端部50Aから第1方向D1沿った距離ないしは長さL0の範囲の部分は樹脂10中に埋設されつつも、一部の表面が樹脂10又はケース1の端子配列部1Aにおいて露出している。引き出し端子5の構造は後に詳述する。
【0024】
なお、図1では、図面の煩雑化を避けるために、ケース1が第1方向D1に沿った奥側にのみ引き出し端子5を有する場合を図示しているが、(図1中の引き出し端子5に代えて又は加えて)他の箇所に引き出し端子5を設けても良いことが言うまでもない。なお、貫通孔11Aを有して当該貫通孔11Aを介したネジ止め等によって電力用半導体装置20を放熱ブロック(図示せず)等に固定するための固定部材11も樹脂10と一体成型されてケース1の一部を成す。
【0025】
そして、図1に示すように、電力用半導体チップ2等が搭載された上記基板3がケース1の開口部の一方を塞ぐように配置されて接着剤等で固定されている。更に、図2に示すように、引き出し端子5の上記端子配列部1Aにおいて露出する上記表面の一部であるワイヤボンディング面52Sと上記配線パターンの所定の箇所とがボンディング用ワイヤ6を介して接続されている。また、基板3とケース1とで以て形成される器状構造の内部に基板3上の電力用半導体チップ2等を覆うようにエポキシ樹脂等が充填され加熱硬化されて、電力用半導体チップ2等が樹脂封止されている。
【0026】
ここで、引き出し端子5の構造を図3の斜視図を用いて説明する。図3に示すように、引き出し端子5は、所定の幅W0及び厚さt0を有して縦断面形状が4角形を成す金属長尺部材を基材又は原材料とし、当該長尺部材が略L字型形状に折り曲げ加工されて成る。ここで、L字型に折り曲げ加工された上記長尺部材ないしは引き出し端子5の長手方向とは、L字型の角部59から端部50A側の部分に対しては第1方向D1を言い、角部59から端部50B側の部分に対しては第3方向D3を言うものとする。このとき、引き出し端子5の厚さとは、端部50A側の同部分に対しては第3方向D3に沿った長さ(又は長さ寸法)が該当し、端部50B側の同部分に対しては第1方向D1に沿った長さ(又は長さ寸法)が該当する。なお、引き出し端子5の幅は、端部50A側の同部分及び端部50B側の同部分の双方ともに第2方向D2に沿った長さ(又は長さ寸法)である。
【0027】
引き出し端子5は、ケース1(図1参照)内に配置される側の端部50A側に、(i)上記端部50Aから第1方向D1(長手方向)に沿った第1距離L1の範囲内の部分である第1部分51と、(ii)第1部分51から端部50Aとは反対側に(従って、角部59側に)第1方向D1(長手方向)に沿って引き続く第2距離L2の範囲内の部分である第2部分52とを備える。第2部分52の表面の内で上記外部リードを成す部分に対面する表面を上記ワイヤボンディング面52Sとして有している。
【0028】
ここで、図3に示すように、第1部分51は、(a)第2部分52から端部50A側に第1方向D1に沿って引き続く距離L11の範囲内の端子固定部51aと、(b)上記端子固定部51aから第1方向D1に沿って引き続く距離L12(=L1−L11)の範囲内の突出部51bとに区別される。
【0029】
特に、図3に示すように、端子固定部51aは第2方向D2における両(側)端部に段差部53を有しており、端子固定部51aを第1方向D1から見た縦断面は幅W12及び厚さt11の4角形状の上部51aT及び幅W0及び厚さt12(=t0−t11)の4角形状の下部51aBで構成される凸型形状である。即ち、(第1部分51の一部である)段差部53は、第2部分52のワイヤボンディング面52Sに対して後退面を成している(以下、符号53を以て「後退面53」とも呼ぶ)。かかる段差部53は、原材料となる上記長尺部材の内で端子固定部51aとなる部分の幅方向(第2方向D2)における両(側)端部のそれぞれ幅W11(=(W0−W12)/2)及び長手方向(第1方向D1)に沿った長さL11の各部分に対して、上記ワイヤボンディング面52Sと同一の表面側から厚さ方向にプレス加工を施すことにより形成される。このように、段差部53はプレス加工という簡便な方法により形成可能であるので、引き出し端子5を安価に製造することができる。
【0030】
突出部51bは、第1方向D1に沿った長さL12,幅W14(<W0)及び厚さt0を有する直方体又は立方体から成り、上記長尺部材の幅W0の略中央に(又は第1方向D1に沿った中心軸同士が一致して)位置している。ちょうど、原材料となる上記長尺部材の内で突出部分51bとなる部分の幅方向(第2方向D2)における両(側)端部がそれぞれ幅W13(=(W0−W14)/2)分だけ除去されて残存する部分が突出部51bに相当する。
【0031】
なお、上記幅W0の寸法は、その引き出し端子5に流れる電流量等に基づいて規定される。例えば、既述の図1に示すように、電力用半導体チップ2と電気的に接続される引き出し端子5(図1中の紙面に向かって右側の5個が該当)の幅W0はより大きい寸法に設定するのが望ましい一方で、抵抗やIC等の電流量が小さい部品4と接続される同端子5(図1中の紙面に向かって左側の4個が該当)の幅W0は比較的に小さく設定することができる。勿論、幅W0を全て同一の寸法としても構わない。更に、図4に示す引き出し端子5Aのように、例えば電力用半導体装置20に適用されるソケットの形状等に基づいて、端部50B側(外部リード側)の幅を上記幅W0よりも小さく加工しても良い。この際、図4の構造とは違えて、引き出し端子の長手方向に沿った中心軸から外れた位置にそのような幅が小さい部分を設けても良い。なお、以下の説明では、特に明記する場合を除き、既述の引き出し端子5及び引き出し端子5Aの総称を「引き出し端子5」と呼ぶ。
【0032】
ここで、上述の構造を有する引き出し端子5を用いたケース1の成型方法を説明する。引き出し端子5は複数個が第2方向D2に沿って所定の間隔で配列されて突出部51bを更に伸長した部分において連結された状態(図3中の破線で示す連結部60参照)で、樹脂10(図1参照)と一体成型される。即ち、そのように連結された状態で、複数の引き出し端子5をケース1の成形金型へセッティングし、当該金型へ樹脂10を充填して硬化することにより、両者5,10を一体成型する。その後、既述の貫通孔内に突出している上記連結部60を切断除去することにより、図1に示すケース1が完成する。このとき、切断面として突出部51bないしは引き出し端子5の端部表面51S(図2又は図3参照)が露出する。なお、かかる切断時に生じうる引き出し端子5及び樹脂10の変形等を抑制防止するために、突出部51bの幅W14は他の部分の幅よりも小さく設定している。
【0033】
上述のケース1の成型時に、第1部分51の段差部53が(引き出し端子5の周囲と連続する)樹脂10内に埋設されることによって、引き出し端子5は樹脂10に対して密着固定される。特に、引き出し端子5は従来の引き出し端子5P(図6〜図8参照)よりも端部(端部50A)側に、即ち、角部(角部59)からより遠い位置に後退面53を有するので、従来の引き出し端子5Pよりも強固に又は安定に密着固定させることができる。このとき、段差部53の幅の寸法を例えば上記幅W13と同等に拡大したり、或いは、図5に示す引き出し端子5Bのように第1部分51全体をプレス加工して厚さt12とするときには、第1部分51の内で樹脂10内に埋設される部分としての後退面53をより大きくすることができるので、上述の効果をより増大することができる。なお、後退面53は第1部分51の内の少なくとも一部に設けられれば(例えば図3に示す2カ所の後退面53の内の片方であっても)、上述の固定強度の向上効果を一定程度に得ることができる。以下の説明では、特に明記する場合を除き、既述の引き出し端子5及び引き出し端子5Bの総称を「引き出し端子5」と呼ぶ。
【0034】
更に、引き出し端子5によれば、後退面53によって樹脂10への強固な密着固定が実現されるので、従来の引き出し端子5Pのようにワイヤボンディング面52Sを有する第2部分52に段差部を設けてこれを埋設する必要性が無い。このため、第2部分の幅W0全体をワイヤボンディング面52Sとして利用することができる。つまり、同一の幅寸法を有する引き出し端子5,5Pを比較した場合、実施の形態1に係る引き出し端子5におけるワイヤボンディング面52Sの方が、従来のワイヤボンディング面52SP(幅W2(<W0))。図7又は図8参照)よりも広く取ることができる。従って、引き出し端子5及び当該端子5を備えるケース1によれば、従来の引き出し端子5Pを用いる場合よりもワイヤボンディング面に対するワイヤボンディングの歩留まりを向上することができる。このとき、図5に示す上記引き出し端子5Bによれば、樹脂10への必要十分な固定強度を確保しつつ第1部分51を小さくして第2部分52をより大きくすることによって、ワイヤボンディング面52Sを拡大することができる。その結果、ワイヤボンディング面52Sに対するワイヤボンディングの歩留まりを更に向上することができる。
【0035】
このように、引き出し端子5を有するケース1を備えた電力用半導体装置20(図1参照)は、引き出し端子5の緩みや外れ等の不具合が抑制排除されて、且つ、ワイヤボンディング面52Sにワイヤ6が確実に接続されて、所定の動作特性で以て確実に且つ安定的に動作することができる。
【0036】
また、上述のように第2部分52の幅W0全体をワイヤボンディング面52Sとして利用可能であること及び第2部分52に段差部(図8の段差部53Pを参照)を設ける必要性が無いことに起因して、同一の幅寸法のワイヤボンディング面を有する引き出し端子5,5Pを比較した場合、実施の形態1に係る引き出し端子5の方が、従来の引き出し端子5Pよりも同端子自体の幅を狭小化することができる。従って、引き出し端子5によれば、従来の引き出し端子5Pを用いる場合よりもインサートケース及び電力用半導体装置の小型化を図ることが可能である。加えて、上述のように安価に製造可能な引き出し端子5を用いることによって低コストで以てインサートケース及び電力用半導体装置を提供することができる。
【0037】
【発明の効果】
(1)請求項1に係る発明によれば、当該引き出し端子を樹脂と一体成型して電力用半導体装置用ケースを形成する場合、第1部分が有する後退面の部分を樹脂に埋設することによって当該引き出し端子を樹脂に対して密着固定することが可能である。このとき、当該引き出し端子は、第2部分に相当する部分に同様の後退面を有する従来の引き出し端子よりも同端子の端部側に上記後退面を備えるので、上記樹脂に対する固定強度を従来の引き出し端子よりも強固にすることができる。従って、引き出し端子と樹脂とがより強固に密着固定された電力用半導体装置用ケースを提供することができる。
【0038】
その結果、当該引き出し端子を樹脂に密着固定させるために第2部分に同様の後退面を設けてこれを埋設する必要性を無くすることができる。これにより、第2部分の幅(長手方向に垂直な長さ)全体をワイヤボンディング面として利用することができるので、上記従来の引き出し端子を電力用半導体装置用ケースに適用する場合よりも、ワイヤボンディング面を広く取ることができる。従って、引き出し端子のワイヤボンディング面に対するワイヤボンディングの歩留まりを向上可能な電力用半導体装置用ケースを提供することができる。
【0039】
また、上述のように第2部分の幅全体をワイヤボンディング面として利用でき、第2部分に後退面を設ける必要性が無いので、同一の幅のワイヤボンディング面を有する従来の引き出し端子よりも端子自体の幅を狭小化することができる。従って、従来の引き出し端子を用いた電力用半導体装置用ケースよりも小型化を図ることができる。
【0040】
(2)請求項2に係る発明によれば、第1部分の一部のみに後退面を有する場合と比較して、引き出し端子がより強固に樹脂に密着固定された電力用半導体装置用ケースを提供することができる。このとき、電力用半導体装置用ケースにおける引き出し端子の樹脂への必要十分な固定強度を確保しつつ第1部分を小さくして第2部分をより大きくすることによって、ワイヤボンディング面を拡大することができる。その結果、ワイヤボンディング面に対するワイヤボンディングの歩留まりを更に向上することができる。
【0041】
(1)請求項1に係る発明によれば、後退面はプレス加工という簡便な方法により形成されるので、安価な引き出し端子を提供することができる。
【0042】
(3)請求項3に係る発明によれば、上記(1)又は(2)の効果が発揮されて、以下の効果を奏する電力用半導体装置を提供することができる。即ち、従来の引き出し端子を有する電力用半導体装置用ケースと比較して、ワイヤボンディング面に対するワイヤボンディングの歩留まりを向上することができる。更に、上記従来の電力用半導体装置用ケースと比較して、引き出し端子の樹脂への密着固定がより強固な電力用半導体装置用ケースを得ることができる。従って、ワイヤボンディング面にボンディング用ワイヤが確実に接続されて、又、引き出し端子の緩みや外れ等の不具合が抑制排除されて、所定の動作特性を確実に且つ安定的に実現可能な電力用半導体装置を提供することができる。更に、従来よりも小型化された電力用半導体装置用ケース及び電力用半導体装置を提供することができる。また、安価な引き出し端子を用いることによって、低コストで以て電力用半導体装置用ケース及び電力用半導体装置を提供することができる。
【0043】
(4)請求項4に係る発明によれば、上記(3)の効果が発揮されて、当該電力用半導体装置は、従来の電力用半導体装置用ケースを備えた電力用半導体装置と比較して、所定の動作特性で以て確実に且つ安定的に動作することができる。更に、従来の電力用半導体装置より小型化を図ることができる。また、低コストで以て電力用半導体装置を提供することができる。
【図面の簡単な説明】
【図1】 実施の形態1に係る電力用半導体装置を模式的に示す斜視図である。
【図2】 図1中の要部を拡大して示す斜視図である。
【図3】 実施の形態1に係る引き出し端子の構造を説明するための斜視図である。
【図4】 実施の形態1に係る引き出し端子の第2の構造を説明するための斜視図である。
【図5】 実施の形態1に係る引き出し端子の第3の構造を説明するための斜視図である。
【図6】 従来の電力用半導体装置を模式的に示す斜視図である。
【図7】 図5中の要部を拡大して示す斜視図である。
【図8】 従来の引き出し端子の斜視図である。
【符号の説明】
1 インサートケース(電力用半導体装置用ケース)、2 電力用半導体チップ、5,5A,5B 引き出し端子、10 樹脂、20 電力用半導体装置、51 第1部分、51a 端子固定部、51b 突出部、50A,50B 端部、52 第2部分、52S ワイヤボンディング面、53 段差部(後退面)、D1,D2,D3 方向、L1 第1距離、L2 第2距離、L0,L11,L12 長さ(距離)、W0,W11,W12,W13,W14 幅、t0,t11,t12 厚さ。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a power semiconductor device or power semiconductor module in which a power semiconductor chip or the like is resin-sealed, and in particular, an insert case (or insert mold case) applied to the power semiconductor device and the case. It relates to the structure of (external) lead terminals.
[0002]
[Prior art]
A configuration of a conventional power semiconductor device 20P will be described with reference to a perspective view of FIG. 6 and FIG. 7 which is an enlarged view of a main part in FIG. As shown in FIG. 6, the power semiconductor device 20P has one surface (perpendicular to the third direction D3. Note that the third direction D3 is in both the first and second directions D1 and D2 perpendicular to each other. The substrate 3 is made of a metal plate on which an insulating layer (not shown) is arranged. A predetermined wiring pattern (not shown) is formed of copper foil or the like on the insulating layer of the substrate 3, and the power semiconductor chip 2, the control circuit of the chip 2, etc. are disposed at a predetermined position of the wiring pattern. Surface mount components (resistors, ICs, etc.) 4 to be formed are arranged. The power semiconductor chip 2 and a predetermined portion of the wiring pattern are wire-bonded.
[0003]
Furthermore, the board | substrate 3 is arrange | positioned so that one opening part of the insert case 1P which has the through-hole of the opening shape corresponding to the shape dimension of the said board | substrate 3 may be plugged, and both are adhere | attached with the adhesive agent. The insert case 1P is formed by integrally molding the lead terminal 5P and the resin 10. One end 50BP side of the lead terminal 5P extends outside the insert case 1P as an external lead, while the other end 50AP side extends inside the insert case 1P as an internal lead. As shown in FIG. 7, the wire bonding surface 52SP which is a part of the surface on the end portion 50AP side exposed from the resin 10 in the terminal arrangement portion 1AP of the insert case 1P and the predetermined portion of the wiring pattern are the wires 6. It is wire-bonded through. An epoxy resin or the like is filled in the container-like structure formed by the substrate 3 and the insert case 1P so as to cover the power semiconductor chip 2 and the like.
[0004]
[Problems to be solved by the invention]
Here, only the lead terminal 5P is extracted and shown in FIG. As shown in FIG. 8, the lead terminal 5P has step portions 53P at both (side) end portions in the second direction D2 of the portion 52P having the wire bonding surface 52SP. By embedding the stepped portion 53P in the resin 10 (see FIG. 6 or 7), the lead terminal 5P is brought into close contact with and fixed to the resin 10, and wire bonding to the wire bonding surface 52SP can be performed. .
[0005]
However, in the conventional lead terminal 5P, the stepped portion 53P is formed at the end of the portion 52P having the wire bonding surface 52SP, so the width (length along the second direction D2) W2 of the wire bonding surface 52SP. Is narrower than the width W0 of the long member which is the base material of the lead terminal 5P (which can be taken as the width of the lead terminal 5P). For this reason, since it is difficult to reliably perform wire bonding on the narrow wire bonding surface 52SP, the conventional power semiconductor device 20P has a problem that the yield of wire bonding to the wire bonding surface 52SP is low, that is, As a result, the yield of the apparatus 20P is low.
[0006]
As one of means for solving such a problem, it is conceivable to enlarge the area of the wire bonding surface 52SP by reducing the formation portion of the stepped portion 53P. However, in such a case, the fixing strength of the lead terminal 5P to the resin 10 is reduced.
[0007]
As another solution to the above-described problem, wire bonding may be performed on the exposed surface of the portion 51P on the end 50AP side with respect to the wire bonding surface 52SP (the portion 52P having the wire bonding surface 52SP). However, since the exposed surface of the portion 51P is a region in the vicinity of the end portion 50AP, it is not possible to secure a sufficient working margin for performing wire bonding, which is a measure for improving the yield of wire bonding to the lead terminal. It seems difficult.
[0008]
At this time, as shown in FIGS. 7 and 8, it is considered that the width of the tip portion 51bP where the width of the portion 51P is narrow should be enlarged. However, in view of the manufacturing method of the insert case 1P, it is obvious that such enlargement cannot be expected. That is, a plurality of lead terminals 5P are arranged in a mold of the insert case 1P in a state where a plurality of lead terminals 5P are connected to each other at the extended portions of the respective tip portions 51bP, and are integrally molded with the resin 10. Thereafter, the connecting portion protruding into the through hole of the insert case 1P is cut and removed. In order to suppress and prevent deformation of the lead terminal 5P and the resin 10 that may occur at the time of such cutting, it is desirable that the width of the tip 51bP is narrow.
[0009]
On the other hand, it is also conceivable to perform wire bonding on the exposed surface of the portion 58P on the L-shaped corner 59P side of the wire bonding surface 52SP. However, as can be seen from FIGS. 1 and 2, the portion 58P is close to the inner wall surface of the insert case 1P, and the work head of the wire bonding apparatus cannot reach the exposed surface of the portion 58P. The wire bonding itself cannot be performed.
[0010]
In other words, since the wire bonding surface 52SP (having the portion 52P) is defined in consideration of the portions 51P and 58P, the method of performing wire bonding on the portions 51P and 58P has been adopted. I can say no.
[0011]
Further, as another means for solving the above-described problems relating to the yield of wire bonding, the width W2 of the wire bonding surface 52SP is enlarged by increasing the width W0 of the long member or the lead terminal 5P. A method is conceivable. However, in such a case, the lead terminal 5P itself becomes large, and therefore, when compared with the case where the same number of lead terminals are arranged in the same manner, the insert case or the power semiconductor device having such lead terminals has a lead terminal. This leads to a new problem that the dimension along the arrangement direction (second direction D2) becomes large. At this time, in order to secure the adhesion / fixing strength of the lead terminal 5P to the resin 10, the stepped portion 53P must be enlarged corresponding to the increase in the width W0 of the lead terminal 5P. It is considered difficult to enlarge the wire bonding surface 52SP by increasing W0.
[0012]
The present invention has been made in view of the above points, and can achieve a high yield of wire bonding while ensuring a tight fixation strength to a resin, and at the same time, a case for a power semiconductor device and a power semiconductor device It is a first object to provide a lead terminal that can be miniaturized.
[0013]
Further, the second object of the present invention is that the first and second objects are realized, wire bonding to the lead terminal can be surely performed, and problems such as looseness and disconnection of the lead terminal are suppressed and eliminated. Another object of the present invention is to provide a case for a power semiconductor device that can promote downsizing.
[0014]
In addition, a third object of the present invention is to provide a power semiconductor device that realizes the above first and second objects and operates reliably and stably with predetermined operating characteristics. .
[0015]
A fourth object of the present invention is to provide a lead terminal, a power semiconductor device case, or a power semiconductor device that can realize the first to third objects at low cost.
[0016]
[Means for Solving the Problems]
(1) A lead terminal according to the first aspect of the present invention is a lead terminal that uses a long member as a base material and is integrally molded with a resin to constitute a case of a power semiconductor device, and is disposed in the case. A first portion which is a portion within a first distance range along the longitudinal direction of the long member from the end portion on the side to be formed, and along the longitudinal direction from the first portion to the side opposite to the end portion And a second portion having a wire bonding surface, wherein the first portion has at least a part of a receding surface with respect to the wire bonding surface. The receding surface is formed by pressing the long member in the thickness direction. It is characterized by that.
[0017]
(2) A lead terminal according to a second aspect of the present invention is the lead terminal according to the first aspect, wherein the entire first portion forms the receding surface.
[0019]
(3) Claim 3 The case for a power semiconductor device according to the invention described in Claim 1 or 2 And a resin integrally molded with the lead terminal.
[0020]
(4) Claim 4 A power semiconductor device according to the invention described in claim 3 And a power semiconductor chip disposed in the power semiconductor device case and electrically connected to the lead-out terminal.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
<Embodiment 1>
FIG. 1 is a perspective view showing an example of the configuration of the power semiconductor device 20 according to the first embodiment. As shown in FIG. 1, a power semiconductor device 20 is a so-called metal insulating substrate or insulating metal comprising a metal plate and an insulating layer or insulating plate (not shown) disposed at a predetermined position on the metal plate. A substrate (hereinafter simply referred to as “substrate”) 3 is provided. The metal plate has four corners defined by sides or edges (not shown) parallel to the first direction D1 and sides or edges (not shown) parallel to the second direction D2 perpendicular to the first direction D1. It is made of a metal plate having a shape, and has a surface perpendicular to the third direction D3 perpendicular to both the first and second directions D1 and D2. A predetermined wiring pattern or circuit pattern (not shown) is formed of a copper foil or the like on the insulating layer disposed on the surface, and the power semiconductor chip 2 or the circuit pattern is formed at a predetermined position of the wiring pattern. Surface mount components (resistors, ICs, etc.) 4 constituting the control circuit of the chip 2 are arranged. The power semiconductor chip 2 and a predetermined portion of the wiring pattern are connected by wire bonding. The arrangement and connection of the power semiconductor chip 2 and the like are performed as follows. First, cream solder is printed on a predetermined position on the wiring pattern where the power semiconductor chip 2 or the like is to be placed, and the power semiconductor chip 2 or the like is mounted thereon. Thereafter, a reflow process is performed to connect the power semiconductor chip 2 and the like to the wiring pattern. And the predetermined part of a wiring pattern and the terminal of the power semiconductor chip 2 are wire-bonded.
[0022]
Further, as shown in FIG. 1, the power semiconductor device 20 includes an insert case (power semiconductor device case; hereinafter, also simply referred to as “case”) 1 in which the lead terminals 5 and the resin 10 are integrally molded. . In the insert case 1, a through hole having a (quadrangular) opening having a shape that can be closed by the substrate 3 is formed along the third direction D <b> 3.
[0023]
The lead terminal 5 is formed of a substantially L-shaped long metal member as shown in FIG. 3 to be described later, and the L-shaped corner portion 59 and its vicinity are completely in the resin 10 as shown in FIG. It is buried and fixed. The portion extending along the third direction D3 and projecting to the outside of the resin 10 or the case 1 (the portion on the end portion 50B side) forms an external lead, and along the second direction D2 inside the case 1 The extending portion (the portion on the side of the end portion 50A) forms an internal lead. As shown in FIG. 2, which is an enlarged view of a main part in FIG. 1, a portion within a range of a distance or length L0 from the end portion 50A along the first direction D1 is embedded in the resin 10, but a part of the surface. Is exposed in the resin 10 or the terminal arrangement portion 1A of the case 1. The structure of the lead terminal 5 will be described in detail later.
[0024]
In FIG. 1, in order to avoid complication of the drawing, the case 1 has a case where the case 1 has the lead terminal 5 only on the back side along the first direction D1, but the lead terminal 5 in FIG. It goes without saying that the lead-out terminals 5 may be provided in other places instead of or in addition. A fixing member 11 having a through hole 11A and fixing the power semiconductor device 20 to a heat dissipation block (not shown) or the like by screwing or the like through the through hole 11A is also integrally formed with the resin 10. Part of case 1.
[0025]
As shown in FIG. 1, the substrate 3 on which the power semiconductor chip 2 and the like are mounted is disposed so as to close one of the openings of the case 1 and fixed with an adhesive or the like. Further, as shown in FIG. 2, the wire bonding surface 52 </ b> S which is a part of the surface exposed at the terminal arrangement portion 1 </ b> A of the lead terminal 5 and a predetermined portion of the wiring pattern are connected via the bonding wire 6. Has been. Also, an epoxy resin or the like is filled in the container-like structure formed by the substrate 3 and the case 1 so as to cover the power semiconductor chip 2 on the substrate 3, and is heated and cured, so that the power semiconductor chip 2 is covered. Etc. are resin-sealed.
[0026]
Here, the structure of the lead terminal 5 will be described with reference to the perspective view of FIG. As shown in FIG. 3, the lead-out terminal 5 is made of a metal long member having a predetermined width W0 and a thickness t0 and having a quadrangular sectional shape as a base material or raw material, and the long member is substantially L. It is bent into a letter shape. Here, the longitudinal direction of the elongate member or the lead terminal 5 bent into an L-shape refers to the first direction D1 with respect to the portion on the side of the end 50A from the L-shaped corner 59, The third direction D3 is referred to for the portion from the corner 59 to the end 50B side. At this time, the thickness of the lead-out terminal 5 corresponds to the length (or length dimension) along the third direction D3 for the same portion on the end portion 50A side, and to the same portion on the end portion 50B side. This corresponds to the length (or length dimension) along the first direction D1. In addition, the width | variety of the lead-out terminal 5 is the length (or length dimension) along the 2nd direction D2 in both the same part by the side of the edge part 50A, and the same part by the side of the edge part 50B.
[0027]
The lead terminal 5 is located on the side of the end 50A on the side disposed in the case 1 (see FIG. 1). (I) A range of a first distance L1 from the end 50A along the first direction D1 (longitudinal direction). A first portion 51 that is an inner portion, and (ii) a second portion that continues along the first direction D1 (longitudinal direction) from the first portion 51 to the side opposite to the end portion 50A (and thus toward the corner 59). And a second portion 52 that is a portion within the range of the distance L2. Of the surface of the second portion 52, the surface facing the portion forming the external lead is provided as the wire bonding surface 52S.
[0028]
Here, as shown in FIG. 3, the first portion 51 includes: (a) a terminal fixing portion 51a within a range of a distance L11 that continues along the first direction D1 from the second portion 52 toward the end portion 50A; b) A distinction is made between the terminal fixing portion 51a and the protruding portion 51b within the range of the distance L12 (= L1-L11) that continues along the first direction D1.
[0029]
In particular, as shown in FIG. 3, the terminal fixing portion 51a has step portions 53 at both (side) end portions in the second direction D2, and the longitudinal section of the terminal fixing portion 51a viewed from the first direction D1 is as follows. This is a convex shape composed of a rectangular upper part 51aT having a width W12 and a thickness t11 and a rectangular lower part 51aB having a width W0 and a thickness t12 (= t0−t11). In other words, the stepped portion 53 (which is a part of the first portion 51) forms a receding surface with respect to the wire bonding surface 52S of the second portion 52 (hereinafter, also referred to as “the receding surface 53” by reference numeral 53). ). The stepped portion 53 has a width W11 (= (W0−W12)) at both (side) end portions in the width direction (second direction D2) of the portion serving as the terminal fixing portion 51a in the long member as the raw material. / 2) and a portion of the length L11 along the longitudinal direction (first direction D1) is formed by pressing in the thickness direction from the same surface side as the wire bonding surface 52S. As described above, the stepped portion 53 can be formed by a simple method of press working, so that the lead terminal 5 can be manufactured at low cost.
[0030]
The protrusion 51b is formed of a rectangular parallelepiped or a cube having a length L12, a width W14 (<W0), and a thickness t0 along the first direction D1, and is substantially in the center of the width W0 of the long member (or the first direction). The central axes along D1 are in agreement). Exactly, both (side) end portions in the width direction (second direction D2) of the portion that becomes the protruding portion 51b in the long member that is the raw material are each the width W13 (= (W0−W14) / 2). The portion that remains after removal corresponds to the protruding portion 51b.
[0031]
The dimension of the width W0 is defined based on the amount of current flowing through the lead terminal 5 and the like. For example, as shown in FIG. 1 described above, the width W0 of the lead terminal 5 (five to the right in FIG. 1 corresponds to the paper surface in FIG. 1) that is electrically connected to the power semiconductor chip 2 is larger. On the other hand, the width W0 of the same terminal 5 connected to the component 4 having a small amount of current such as resistance and IC (four on the left side of the page in FIG. 1 corresponds) is relatively large. Can be set small. Of course, the width W0 may be the same size. Further, as in the lead terminal 5A shown in FIG. 4, for example, based on the shape of a socket applied to the power semiconductor device 20, the width on the end 50B side (external lead side) is made smaller than the width W0. You may do it. At this time, unlike the structure of FIG. 4, a portion having such a small width may be provided at a position deviating from the central axis along the longitudinal direction of the lead terminal. In the following description, unless otherwise specified, the above-described generic names of the extraction terminal 5 and the extraction terminal 5A are referred to as “extraction terminal 5”.
[0032]
Here, a method for molding the case 1 using the lead terminal 5 having the above-described structure will be described. A plurality of lead terminals 5 are arranged at predetermined intervals along the second direction D2 and are connected at a portion where the protruding portion 51b is further extended (see a connecting portion 60 indicated by a broken line in FIG. 3). 10 (see FIG. 1). That is, in such a connected state, the plurality of lead terminals 5 are set in the molding die of the case 1 and the mold 10 is filled with the resin 10 and cured to integrally mold the both 5 and 10. . Then, the case 1 shown in FIG. 1 is completed by cutting and removing the connecting portion 60 protruding into the aforementioned through hole. At this time, the protruding portion 51b or the end surface 51S of the lead terminal 5 (see FIG. 2 or FIG. 3) is exposed as a cut surface. Note that the width W14 of the protruding portion 51b is set to be smaller than the width of other portions in order to suppress and prevent deformation of the lead terminal 5 and the resin 10 that may occur at the time of cutting.
[0033]
When the case 1 is molded, the stepped portion 53 of the first portion 51 is embedded in the resin 10 (continuous to the periphery of the lead terminal 5), so that the lead terminal 5 is closely fixed to the resin 10. . In particular, the lead-out terminal 5 has a receding surface 53 at the end (end 50A) side, that is, at a position farther from the corner (corner 59) than the conventional lead-out terminal 5P (see FIGS. 6 to 8). Therefore, it can be firmly and stably fixed and fixed as compared with the conventional lead terminal 5P. At this time, when the width of the stepped portion 53 is enlarged to be equal to, for example, the width W13 or the entire first portion 51 is pressed to a thickness t12 like the lead terminal 5B shown in FIG. Since the receding surface 53 as a portion embedded in the resin 10 in the first portion 51 can be made larger, the above-described effect can be further increased. If the receding surface 53 is provided on at least a part of the first portion 51 (for example, one of the two receding surfaces 53 shown in FIG. 3), the above-described effect of improving the fixing strength can be obtained. It can be obtained to a certain degree. In the following description, unless otherwise specified, the above-described generic names of the extraction terminal 5 and the extraction terminal 5B are referred to as “extraction terminal 5”.
[0034]
Further, according to the lead-out terminal 5, the receding surface 53 realizes strong adhesion and fixation to the resin 10, so that a step portion is provided in the second portion 52 having the wire bonding surface 52S as in the conventional lead-out terminal 5P. There is no need to bury it. For this reason, the entire width W0 of the second portion can be used as the wire bonding surface 52S. That is, when comparing the lead terminals 5 and 5P having the same width dimension, the wire bonding surface 52S in the lead terminal 5 according to the first embodiment is more conventional wire bonding surface 52SP (width W2 (<W0)). . (See FIG. 7 or FIG. 8). Therefore, according to the lead terminal 5 and the case 1 including the terminal 5, the yield of wire bonding to the wire bonding surface can be improved as compared with the case where the conventional lead terminal 5P is used. At this time, according to the lead terminal 5B shown in FIG. 5, the wire bonding surface is obtained by reducing the first portion 51 and increasing the second portion 52 while ensuring the necessary and sufficient fixing strength to the resin 10. 52S can be enlarged. As a result, the yield of wire bonding with respect to the wire bonding surface 52S can be further improved.
[0035]
As described above, the power semiconductor device 20 (see FIG. 1) including the case 1 having the lead-out terminals 5 suppresses and eliminates problems such as loosening and detachment of the lead-out terminals 5, and the wire bonding surface 52S has a wire. 6 is securely connected, and can operate reliably and stably with predetermined operating characteristics.
[0036]
Further, as described above, the entire width W0 of the second portion 52 can be used as the wire bonding surface 52S, and there is no need to provide a step portion (see the step portion 53P in FIG. 8) in the second portion 52. Therefore, when the lead terminals 5 and 5P having the wire bonding surfaces of the same width are compared, the lead terminal 5 according to the first embodiment is wider than the conventional lead terminal 5P. Can be narrowed. Therefore, according to the lead terminal 5, it is possible to reduce the size of the insert case and the power semiconductor device as compared with the case where the conventional lead terminal 5P is used. In addition, an insert case and a power semiconductor device can be provided at low cost by using the lead terminal 5 that can be manufactured at low cost as described above.
[0037]
【The invention's effect】
(1) According to the invention of claim 1, when forming the case for a power semiconductor device by integrally molding the lead terminal with the resin, the recessed portion of the first portion is embedded in the resin. The lead terminal can be tightly fixed to the resin. At this time, the lead-out terminal is provided with the receding surface on the end side of the terminal rather than the conventional lead-out terminal having the same receding surface in the portion corresponding to the second portion, so that the fixing strength with respect to the resin can be increased. It can be made stronger than the lead terminal. Therefore, it is possible to provide a power semiconductor device case in which the lead terminals and the resin are more firmly and firmly fixed.
[0038]
As a result, it is possible to eliminate the need to embed a similar receding surface in the second portion in order to fix the lead terminal to the resin. As a result, the entire width (length perpendicular to the longitudinal direction) of the second portion can be used as a wire bonding surface, so that the wire can be used more than when the conventional lead terminal is applied to a power semiconductor device case. A wide bonding surface can be taken. Therefore, it is possible to provide a power semiconductor device case capable of improving the yield of wire bonding with respect to the wire bonding surface of the lead terminal.
[0039]
Further, as described above, the entire width of the second portion can be used as a wire bonding surface, and since there is no need to provide a receding surface in the second portion, the terminal is more terminal than a conventional lead terminal having a wire bonding surface of the same width. The width of itself can be narrowed. Accordingly, it is possible to reduce the size of the power semiconductor device case using the conventional lead terminal.
[0040]
(2) According to the invention of claim 2, the power semiconductor device case in which the lead-out terminal is more firmly fixed to the resin is compared with the case where only a part of the first portion has the receding surface. Can be provided. At this time, it is possible to enlarge the wire bonding surface by reducing the first part and making the second part larger while securing the necessary and sufficient fixing strength of the lead terminal to the resin in the case for the power semiconductor device. it can. As a result, the yield of wire bonding with respect to the wire bonding surface can be further improved.
[0041]
(1) According to the invention of claim 1 Since the receding surface is formed by a simple method such as press working, an inexpensive lead terminal can be provided.
[0042]
(3) According to the invention of claim 3, the effect of (1) or (2) is exhibited, A power semiconductor device having the following effects can be provided. That is, the yield of wire bonding with respect to the wire bonding surface can be improved as compared with a case for a power semiconductor device having a conventional lead terminal. Furthermore, compared with the conventional case for a power semiconductor device, it is possible to obtain a case for a power semiconductor device in which the lead terminals are more firmly fixed to the resin. Therefore, a power semiconductor capable of reliably and stably realizing a predetermined operating characteristic by securely connecting a bonding wire to the wire bonding surface and suppressing and eliminating problems such as loosening and disconnection of the lead terminal. An apparatus can be provided. Furthermore, it is possible to provide a power semiconductor device case and a power semiconductor device that are smaller than conventional ones. Further, by using an inexpensive lead terminal, it is possible to provide a power semiconductor device case and a power semiconductor device at low cost.
[0043]
(4) According to the invention of claim 4, the effect of (3) is exhibited, The power semiconductor device can operate reliably and stably with predetermined operating characteristics as compared with a power semiconductor device including a conventional power semiconductor device case. Further, it is possible to reduce the size of the conventional power semiconductor device. In addition, a power semiconductor device can be provided at low cost.
[Brief description of the drawings]
FIG. 1 is a perspective view schematically showing a power semiconductor device according to a first embodiment.
FIG. 2 is an enlarged perspective view showing a main part in FIG.
FIG. 3 is a perspective view for explaining the structure of the lead terminal according to the first embodiment.
4 is a perspective view for explaining a second structure of the lead terminal according to Embodiment 1. FIG.
5 is a perspective view for explaining a third structure of the lead terminal according to Embodiment 1. FIG.
FIG. 6 is a perspective view schematically showing a conventional power semiconductor device.
7 is an enlarged perspective view showing a main part in FIG. 5. FIG.
FIG. 8 is a perspective view of a conventional lead terminal.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Insert case (case for power semiconductor devices), 2 Power semiconductor chip, 5, 5A, 5B Lead terminal, 10 Resin, 20 Power semiconductor device, 51 1st part, 51a Terminal fixing | fixed part, 51b Protrusion part, 50A , 50B end, 52 second portion, 52S wire bonding surface, 53 stepped portion (retracted surface), D1, D2, D3 direction, L1 first distance, L2 second distance, L0, L11, L12 length (distance) , W0, W11, W12, W13, W14 width, t0, t11, t12 thickness.

Claims (4)

長尺部材を基材とし、樹脂と一体成型されて電力用半導体装置のケースを構成する引き出し端子であって、
前記ケース内に配置される側の端部から前記長尺部材の長手方向に沿った第1距離の範囲内の部分である第1部分と、
前記第1部分から前記端部とは反対側に前記長手方向に沿って引き続く第2距離の範囲内の部分であり、ワイヤボンディング面を有する第2部分とを備え、
前記第1部分は、少なくとも一部に前記ワイヤボンディング面に対する後退面を有し、
前記後退面は、前記長尺部材を厚さの方向にプレス加工されて成ることを特徴とする、
引き出し端子。
A long terminal is used as a base material, and is a lead terminal that is integrally molded with a resin and constitutes a case of a power semiconductor device,
A first portion that is a portion within a range of a first distance along the longitudinal direction of the elongated member from an end portion on the side disposed in the case;
A portion within a range of a second distance continuing along the longitudinal direction from the first portion to the side opposite to the end portion, and a second portion having a wire bonding surface,
Wherein the first portion have a retraction plane with respect to the wire bonding surface on at least a portion,
The receding surface is formed by pressing the long member in a thickness direction .
Drawer terminal.
請求項1に記載の引き出し端子であって、
前記第1部分の全体が前記後退面を成すことを特徴とする、
引き出し端子。
The lead terminal according to claim 1,
The entire first portion forms the receding surface,
Drawer terminal.
請求項1又は2に記載の引き出し端子と、The lead terminal according to claim 1 or 2,
前記引き出し端子と一体成型された樹脂とを備えることを特徴とする、It comprises a resin molded integrally with the lead terminal,
電力用半導体装置用ケース。Case for power semiconductor devices.
請求項3に記載の電力用半導体装置用ケースと、A case for a power semiconductor device according to claim 3,
前記電力用半導体装置用ケース内に配置されて前記引き出し端子と電気的に接続された電力用半導体チップとを備えることを特徴とする、A power semiconductor chip disposed in the power semiconductor device case and electrically connected to the lead terminal;
電力用半導体装置。Power semiconductor device.
JP15618399A 1999-06-03 1999-06-03 Drawer terminal, power semiconductor device case, and power semiconductor device Expired - Fee Related JP3681922B2 (en)

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JP3696820B2 (en) * 2001-10-10 2005-09-21 新光電気工業株式会社 Lead frame and manufacturing method thereof
JP4141789B2 (en) * 2002-10-11 2008-08-27 三菱電機株式会社 Power semiconductor device
JP6413709B2 (en) * 2014-12-02 2018-10-31 富士電機株式会社 Semiconductor device and manufacturing method thereof
US10727189B2 (en) 2016-09-07 2020-07-28 Mitsubishi Electric Corporation Power semiconductor device
JP6841199B2 (en) * 2017-09-29 2021-03-10 三菱電機株式会社 Semiconductor device
JP7183551B2 (en) 2018-03-15 2022-12-06 富士電機株式会社 semiconductor equipment
JP7005469B2 (en) 2018-11-07 2022-02-04 三菱電機株式会社 Semiconductor device
CN111816632A (en) * 2020-09-02 2020-10-23 江苏宏微科技股份有限公司 Power module signal terminal

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0226270U (en) * 1988-08-05 1990-02-21
JPH05326788A (en) * 1992-05-25 1993-12-10 Nippon Steel Corp Lead frame material and semiconductor device provided therewith
JP3505908B2 (en) * 1996-03-15 2004-03-15 アイシン・エィ・ダブリュ株式会社 Conductive wire connection terminal

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