JP3667220B2 - Solid-state imaging device, imaging system, and driving method of solid-state imaging device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state imaging device, an imaging system, and a driving method of the solid-state imaging device, and in particular, a photoelectric conversion unit, a charge-voltage conversion unit that converts charge from the photoelectric conversion unit into a voltage signal, and signal amplification of the voltage signal A solid-state imaging device, an imaging system, and a signal amplifying unit, a charge transfer unit that transfers photocharge from the photoelectric conversion unit to the charge-voltage conversion unit, and a unit that inputs an arbitrary voltage to the charge-voltage conversion unit And a solid-state imaging device driving method.
[0002]
[Prior art]
Representative solid-state imaging devices include a photodiode and a CCD shift register, and an APS (Active Pixel Sensor) that includes a photodiode and a MOS transistor.
[0003]
APS includes a photodiode, a MOS switch, an amplifier circuit for amplifying the signal from the photodiode for each pixel, and has many advantages such as "XY addressing" and "single chip of sensor and signal processing circuit". have. In recent years, it has attracted attention because of improvements in MOS transistor miniaturization technology and increasing demands such as “single-chip sensor and signal processing circuit” and “low power consumption”.
[0004]
FIG. 14 shows an equivalent circuit diagram of a pixel portion of a conventional ASP and a solid-state imaging device using the pixel portion. These were reported at a 1995 IEEE workshop by Eric.R.Fossum et al. The configuration of the prior art will be briefly described below.
[0005]
The photoelectric conversion unit is an embedded photodiode (PPD) used in a CCD or the like. Embedded photodiodes have a thick p-layer on the surface, and SiO on top of it.₂In addition, a dark current generated at the interface between the storage region and the p layer on the surface can be provided between the n layer of the storage portion and the surface p layer, and the saturation charge amount of the photodiode can be increased.
[0006]
The optical signal charge accumulated in the photoelectric conversion unit is read out to the floating diffusion region (FD) through the charge transfer means (TX) made of a MOS transistor.
[0007]
The signal charge Qsig is converted to Qsig / CFD by the capacitance CFD of the floating diffusion region, and the signal is read through a source follower circuit (not shown).
[0008]
When a reverse bias is applied to the n-layer of the buried photodiode, the depletion layer extends from each junction of the p-layer having a high surface and the P-well of the substrate in accordance with the bias. At this time, the number of electrons in the photodiode is approximately equal to the number of electrons in the neutral region sandwiched between the two depletion layers, and decreases in proportion to the depletion layer width. The number of electrons in the neutral region described above when the reverse bias = 0 volt corresponds to the saturation charge amount. When both depletion layers are extended by reverse bias and the two depletion layers are connected, the photodiode is depleted and the neutral region disappears. The reverse bias at this time is hereinafter referred to as a depletion voltage (or a complete depletion voltage). When a reverse bias is further applied, the electron concentration in the photodiode decreases exponentially with respect to the reverse bias. In the above sensor, if the photodiode is completely depleted when reading, the charge generated by the light is almost completely transferred to the floating diffusion region, and the charge disappears in the photodiode and the electron reset is achieved. Is done. Hereinafter, such charge transfer is referred to as depletion transfer.
[0009]
FIG. 15 shows a saturation charge amount Qsat of the photodiode, a voltage value VFDsat (1) and (2) in FIG. 15) of the diffusion floating region when the saturation charge is read, and a depletion voltage (3) with respect to the saturation charge amount Qsat. It is the figure which showed (▼). A is a lower limit value of saturation charge required for a practical photodiode, B and E are VFDsat = saturation charge value at which the depletion voltage is reached, and F is an upper limit value of the saturation charge amount of a practical solid-state imaging device.
[0010]
VFDsat is given by the following equation.
[0011]
VFDsat = Vres−Qsat / CFD
Vres indicates the reset voltage of the diffusion floating region.
[0012]
In general, the saturation charge of the photodiode needs to be a certain value or more, and the lower limit value is a value indicated by A in FIG. In order to achieve the above depletion transfer,
VFdsat ≧ depletion voltage, preferably VFdsat> depletion voltage
Is required to be achieved.
[0013]
Therefore, in the case of (1) in FIG. 15, the upper limit value of the depletion voltage that satisfies this relationship is the value indicated by B in FIG.
[0014]
When VFDsat <depletion voltage, the reverse bias voltage of the photodiode is equal to VFD, and there is a neutral region in the photodiode, which is read out by dividing the capacitance of both depletion layers and the capacitance of the floating diffusion region as described above. Will be. At the same time, even after reading, there is an amount of residual electrons close to the saturation charge amount Qsat in the photodiode, and depletion transfer is not realized. Residual electrons at this time cause afterimages and noise.
[0015]
Therefore, the saturation charge amount Qsat of the photodiode is required to be designed so as to satisfy the section C of A <Qsat <B.
[0016]
[Problems to be solved by the invention]
However, there is a problem that the saturation charge amount Qsat or the depletion voltage is easily affected by the manufacturing process. For example, the depletion voltage may fluctuate as much as 0.4 volts just by a 10% fluctuation in the ion implantation dose when forming the n-layer of the photodiode.
[0017]
As a result, the manufacturing yield is lowered. One way to avoid these problems is to raise the value of the reset voltage Vres in the diffusion floating region and make it as shown by the straight line (2) in FIG. It can be extended to A-E. In this case, a higher reset voltage is required. This means that it is necessary to ensure a high power supply voltage in order to ensure the signal / noise ratio, and this is a major factor that hinders APS voltage reduction.
[0018]
As is well known, a high power supply voltage causes an increase in power consumption. Further, when integrating with a logic circuit, it is necessary to prepare another high power supply voltage for the sensor chip in addition to the low power supply voltage of the logic circuit. This degrades the performance of the APS chip.
[0019]
[Means for Solving the Problems]
An object of the present invention is to provide a solid-state imaging device, a driving method thereof, and an imaging system with lower power consumption and less noise than conventional ones.
[0020]
Another object of the present invention is to provide a solid-state imaging device capable of depletion transfer without increasing the power supply voltage and reset voltage, a driving method thereof, and an imaging system.
[0021]
  The present inventionA photoelectric conversion unit; a charge voltage conversion unit that converts charges from the photoelectric conversion unit into a voltage signal; signal amplification means that amplifies the voltage signal generated in the charge voltage conversion unit; and A solid-state imaging device driving method comprising: charge transfer means for transferring photocharge to a voltage conversion section; and reset means for resetting by applying a predetermined reset voltage to the charge voltage conversion section,
  A part of the photoelectric charge accumulated in the photoelectric conversion unit during the accumulation period is transferred from the photoelectric conversion unit to the charge voltage conversion unit, and the output signal amplified by the signal amplification means is read to the signal output line for the first time After performing the read operation,
  Resetting the charge-voltage converter, and then transferring the remainder of the photoelectric charge from the photoelectric converter to the charge-voltage converter, and reading the output signal amplified by the amplifying means to the signal output line. It is characterized by performing.
[0022]
  Another invention of the present inventionA photoelectric conversion unit; a charge voltage conversion unit that converts charges from the photoelectric conversion unit into a voltage signal; signal amplification means that amplifies the voltage signal generated in the charge voltage conversion unit; and A solid-state imaging device having charge transfer means for transferring photocharge to the voltage conversion section, and reset means for resetting by applying a predetermined reset voltage to the charge voltage conversion section,
  The first time that a part of the photoelectric charge accumulated in the photoelectric conversion unit during the accumulation period is transferred from the photoelectric conversion unit to the charge voltage conversion unit, and the output signal amplified by the signal amplification means is read to the signal output line After performing the read operation of
  Resetting the charge-voltage converter, and then transferring the remainder of the photoelectric charge from the photoelectric converter to the charge-voltage converter, and reading out the output signal amplified by the amplifying means to the signal output line It is characterized by comprising a control circuit for controlling to perform.
[0025]
According to the present invention, when the photoelectric charge accumulated during one unit accumulation period is read out, the photoelectric charge remaining in the photoelectric conversion unit can be reduced without increasing the reset voltage by performing the read operation twice or more. Can be read. Furthermore, a signal with a wide dynamic range can be obtained by adding the read output signals.
[0026]
Then, the present invention reads out the signal accumulated during the first accumulation period, then enters the second accumulation period, reads out the signal accumulated during the second accumulation period, and adds the signals. Note that this is different from known techniques for expanding the dynamic range.
[0027]
DETAILED DESCRIPTION OF THE INVENTION
The basic operation principle of the present invention will be described in detail with reference to FIGS.
[0028]
FIG. 1 is a diagram schematically showing the relationship between a partial cross section of a solid-state imaging device and its potential for explaining the principle of the present invention.
[0029]
FIG. 2 is a drive timing chart showing the method for driving the solid-state imaging device of the present invention.
[0030]
FIG. 3 is a circuit diagram of one pixel of the solid-state imaging device of the present invention.
[0031]
In FIG. 1, (a) shows a photodiode as a photoelectric conversion unit, a transfer gate as a charge transfer unit, a floating diffusion region as a charge-voltage conversion unit (semiconductor diffusion region), and a reset switch as a reset unit. The cross section of the containing part is shown.
[0032]
101 is a P well that also functions as an anode of a photodiode, 102 is a transfer gate, and 103 is a floating diffusion region made of an n-type semiconductor.
[0033]
Reference numeral 104 denotes a surface p region of a photodiode made of a P-type semiconductor, and reference numeral 105 denotes an n region that functions as a cathode of the photodiode made of an n-type semiconductor, and a buried photodiode is formed by the presence of this surface P region. Reference numeral 106 denotes an insulating film such as silicon oxide, and reference numeral 107 denotes a reset region made of an n-type semiconductor. A predetermined reset voltage is applied through a wiring or the like, and the reset region is maintained at a predetermined reset potential. Reference numeral 108 denotes a reset gate of a reset switch that resets the floating diffusion region 103 to a predetermined potential. Part of the n region 105 and the floating diffusion region 103 becomes the source and drain regions of the transfer switch. A part of the floating diffusion region 103 and the reset region 107 becomes a source / drain region of the reset switch. The floating diffusion region 103 is connected to the gate of an amplifying transistor which is not shown, and serves as an input portion of the signal amplifying means.
[0034]
An output means is constituted by the transfer gate, the floating diffusion region, the reset switch, and the amplifying transistor, and is used for reading out the photoelectric charges (here, electrons) accumulated in the photodiode.
[0035]
A circuit diagram of one pixel of the solid-state imaging device using this configuration is as shown in FIG. 3, where 505 is a photodiode, Q1 is a transfer switch, Q2 is a reset switch, and Q3 is an amplifying transistor. Q4 is a selection switch that selects a pixel and reads out an output signal that has been current amplified from an amplifying transistor.
[0036]
In FIG. 1, (b) shows a state when the transfer switch is turned on to transfer a part of the charge, (c) shows a state immediately after the transfer switch is turned off, and (d) shows a reset switch. FIG. 4E shows a state immediately after turning on and resetting the floating diffusion region, and immediately after turning off the reset switch, and FIG. 5E shows a state in which the transfer switch is turned on again and the residual charge is depleted.
[0037]
In time series, the operation proceeds in the order of (a), (b), (c), (d), (e).
[0038]
An outline of drive timing including the above-described operation will be described with reference to FIG.
[0039]
Note that “reset” in FIG. 2 is not limited to the drive pulse to the MOS transistor for resetting, but indicates the entire reset operation, and that the pulse is in the high (ON) state indicates that the reset operation It shows that you are doing. The same applies to “read”, and this “read” refers to the entire read operation, and the fact that the pulse is in a high (ON) state indicates that the read operation is being performed.
[0040]
First, accumulation of photocharge in the photodiode is started.
[0041]
If necessary, in the period T0, the selection switch Q4 is turned on to read a signal based on the reset voltage of the floating diffusion region 103. Since this signal is amplified by the amplifying transistor, it can be regarded as a noise signal of this pixel.
[0042]
Next, in period T1, as shown in FIG. 1B, a transfer switch is turned on to transfer part of the photocharge from the n region 105 of the photodiode 505 to the floating diffusion region 103 in the middle of the accumulation period. .
[0043]
After the transfer, in the photodiode exposed with intense light close to saturation, the remainder of the photocharge remains as shown in FIG. In a photodiode exposed with very weak light, all charges may be transferred.
[0044]
In a period T3, the selection switch Q4 is turned on, and an output signal amplified based on the charge transferred to the floating diffusion region 103 is read.
[0045]
In the period T4, the reset switch Q2 is turned on to reset the potential of the floating diffusion region. The state after reset is the state shown in FIG.
[0046]
Further, if necessary, in the period T5, the selection switch Q4 is turned on to read a signal based on the reset voltage of the floating diffusion region 103. Since this signal is amplified by the amplifying transistor, it can be regarded as a noise signal of this pixel.
[0047]
In period T 6, the transfer switch is turned on again to end the accumulation period, and the remaining photocharge is transferred from the n region 105 of the photodiode 505 to the floating diffusion region 103. The state at this time is shown in FIG.
[0048]
When the accumulation time is not controlled by a shutter outside the solid-state imaging device such as a mechanical shutter, strictly speaking, the accumulation time at the transfer in the period T6 is longer than the accumulation time at the transfer in the period T1. However, since the accumulation time (exposure time) before the period T1 is sufficiently long, the time from the end of the period T1 to the start of the period T6 can be ignored.
[0049]
After the end of the period T6, the n regions 105 of all the photodiodes 505 are depleted, so that all the photodiodes are reset to the initial state. If the photodiode is exposed at this time, the next accumulation period starts after the end of this period T6.
[0050]
Further, in the period T7, the selection switch Q4 is turned on to read a signal based on the transfer charge in the floating diffusion region 103. Then, in the circuit outside the pixel, the signal read in the period T3 and the signal read in the period T7 are added as necessary.
[0051]
After the period T7 ends, the reset rich Q2 is turned on again to reset the potential of the floating diffusion region 103.
[0052]
The effect | action by this embodiment is explained in full detail.
[0053]
Here, referring again to FIG. 15, a case is considered where the saturation charge amount Qsat of the photodiode is a value between BF.
[0054]
In this case, if the reset voltage applied to the floating diffusion region 103 is increased so that VFdsat> depletion voltage between BF, depletion transfer can be realized by one transfer operation.
[0055]
On the other hand, when the reset voltage is lowered as shown by the straight line (1), the transfer switch is opened in a state where charges corresponding to the saturation charge amount are accumulated in the photodiode due to the relations of the straight lines (1) and (3). When the transfer gate 102 is set to the high level and the transfer switch is turned on during the period T1 in FIG. 2, since VFDsat <depletion voltage, a large amount of charge remains in the photodiode even by the transfer operation. The situation is as shown in FIG.
[0056]
In one method of the prior art, the transfer switch is closed in this state (the transfer switch is turned off by setting the transfer gate 102 to the low level as in the period T2 in FIG. 2), and the next accumulation is started. . Therefore, in the photodiode, when the signal charge accumulated in the next accumulation period is read out, the signal becomes a signal in which the residual charges that could not be transferred last time are mixed, causing a residual image.
[0057]
If a method of further reducing the depletion voltage of the photodiode is employed to solve this problem, the amount of charge that can be handled by the solid-state imaging device is reduced, and the performance as a solid-state imaging device cannot be fully exhibited. Therefore, in order to secure a handling charge amount, the power supply voltage has been inevitably increased.
[0058]
For this reason, it is difficult to use a fine MOS transistor in the pixel portion, and miniaturization of the APS sensor has been difficult.
[0059]
In the present invention, after the first (first) signal readout period T3 ends, the reset gate 108 is set to the high level in the reset period T4 in FIG. Then, as shown in FIG. 1 (d), the floating diffusion region 103 that is the input of the signal amplification means is temporarily reset. Thereafter, in the period T6, the transfer gate 102 is set to the high level and the transfer switch is opened to perform signal transfer, and the residual charge is read out as shown in FIG. Read the signal. Thus, all of the photocharge stored in the photodiode is transferred, and the photodiode is completely depleted.
[0060]
Thereafter, if the floating diffusion region is reset, the afterimage based on the current accumulation period disappears.
[0061]
Further, if necessary, a third reading operation may be performed after resetting the floating diffusion region 103 as an input part of the signal amplification means once. Of course, four or more read operations may be performed.
[0062]
Further, if the above read operation is repeated as many times as the charge in the photodiode can be sufficiently read, it is possible to read the maximum charge that can be handled by the photodiode without an afterimage.
[0063]
In the present invention, the signals from the signal amplifying means are added, for example, the outputs from the signal amplifying means obtained by performing the read operation three times as described above are added. As a result, it is possible to read more information of the photocharge signal.
[0064]
Conventionally, there has been a concept of adding output signals from sensors, but such a technique adds outputs having substantially different accumulation times as represented by a photometric sensor of a camera.
[0065]
Further, as a technique for adding signals having the same accumulation time, a technique for adding signals from other pixels is used, as represented by color processing.
[0066]
On the other hand, in the embodiment of the present invention, a signal of an accumulation time of one unit of the same pixel is divided and read and added.
[0067]
There are several means for adding. For example, an AD converter and a digital adder circuit that digitally add after digitally converting the output from the signal amplifying means can be employed. Further, a weighted addition circuit that weights and adds each number of outputs may be employed, and by performing weighted addition, the sensitivity and gamma can be changed according to the light amount range. Further, an analog adder that performs analog addition before digital conversion may be used.
[0068]
In particular, when the photodiode is an embedded photodiode, noise such as reset noise is not superimposed for each transfer operation, so the added information is no different from the information read in one reading with a higher power supply voltage. There is nothing.
[0069]
This point will be described in more detail below.
[0070]
As described above, the above-described transfer / read operation is repeated as many times as the charge in the photodiode can be transferred, and the signals are added. What is important here is that even if the charges read at the time of reading vary, when the embedded photodiode is used, all charges are finally read out. Therefore, noise due to the division of reading is not picked up. As a specific example, when 100 charges are accumulated as a result of accumulation and 50 charges are read at each time and 40 charges are read at the second time, the charge is stored in the embedded photodiode. Since there are only 10 charges left, the third time becomes 10. Therefore, the result of addition is 100. In principle, the number of read charges fluctuates each time, and 48 charges may be read in the first time and 38 charges may be read in the second time. In this case, 14 charges are stored in the embedded photodiode. Since there are only remaining, the third time is 14 and the result of addition is 100.
[0071]
As a result, the photodiode only needs to satisfy the condition that the desired saturation charge amount Qsat can be transferred, that is, Vres> depletion voltage, so that the voltage can be further reduced as compared with the prior art.
[0072]
As described above, according to the present invention, the photoelectric charge remaining in the photoelectric conversion unit can be read out by performing the reading operation twice or more, and by adding the read signals, a wide dynamic range can be obtained. An optical signal can be obtained.
[0073]
As a matter of course, the present invention is effective for both linear sensors in which pixels are arranged one-dimensionally and area sensors in which pixels are arranged two-dimensionally. The present invention can be used more effectively because there are many restrictions on the types and numbers of the devices and the circuit cannot be handled.
[0074]
(Embodiment 1)
The equivalent circuit diagram of the pixel used in this embodiment is the same as that shown in FIG. 3, and in this embodiment, the pixel is two-dimensionally arranged to form an area sensor.
[0075]
In FIG. 3, reference numeral 505 denotes an embedded photodiode corresponding to the photoelectric conversion unit. In this embodiment, the buried type photodiode includes an n-type accumulation layer for accumulating photocharges in a well made of a p-type semiconductor formed on a substrate, an n layer and an insulating layer thereon. P made of a P-type semiconductor with a high impurity concentration to suppress the dark current on the surface during⁺A buried photodiode as shown in FIG. 1 was obtained. The depletion voltage of this photodiode is 1.0 volt.
[0076]
As the signal amplifying means Q3, an nMOS transistor is used as an input transistor of the source follower amplifier, and an nMOS transistor is used to select a row to be read as the selection switch Q4.
[0077]
Although not shown, a constant current load is connected to the signal output line 504 as a load of the source follower.
[0078]
An nMOS transistor was used as the reset switch Q2 for resetting the input terminal of the source follower.
[0079]
As a transfer switch Q1 for transferring the optical signal of the photodiode 505 to the input section, a transfer gate is provided on a region between the n-layer of the photodiode and the floating diffusion region. This transfer gate corresponds to charge transfer means to the input part of the source follower which is signal amplification means.
[0080]
501 is a power supply line for supplying a reference voltage for reset and amplification, 502 is a reset switch line for controlling the operation of the reset switch Q2, 503 is a selection switch line for controlling the operation of the selection switch Q4, and 506 is transfer. This is a transfer switch line for controlling the operation of the switch.
[0081]
FIG. 4 is a schematic circuit diagram of a readout circuit provided with addition means used in the present invention.
[0082]
In FIG. 4, reference numeral 601 denotes a pixel, which is a simplified representation of the pixel shown in FIG.
[0083]
The output of each pixel is read out by the output signal holding means 602 connected to the signal output line 604. Specifically, a plurality of capacitive elements can be used as the output signal holding means 602 for temporarily holding the output signal. In the present embodiment, at the first (first) reading, the switch S1 in FIG. 4 is opened and closed, and the output signal is held in the capacitor. At the time of the second reading, the switch S2 is opened and closed to hold the output signal in another capacitor, and at the last (third time) reading, the switch S3 is opened and closed to hold the output signal at another capacitor.
[0084]
The signals held in the capacitors are added by an analog adder as the signal adding means 603, converted into a time series signal by the horizontal scanning circuit 605, and output from the output amplifier 606.
[0085]
Although the circuit of FIG. 4 does not include a subtraction processing unit, the output signal holding unit 602 may be configured to include a subtraction processing unit. In this case, the signal from which the noise is removed by the subtraction process is added by the output signal adding means 603, output to the output line by the horizontal scanning circuit 605, and output via the output amplifier 606.
[0086]
As the adding means 603, a clamp type adding circuit as shown in FIG. 5 can be used.
[0087]
In FIG. 5, capacitive elements (clamp capacitors) are connected in series to three input terminals, and an amplifying transistor including a reset switch and a source follower is connected to the output side of the capacitive element. The read output signals are added by the three clamp capacitors and output from the amplifying transistor.
[0088]
The outline of the drive timing is as follows.
[0089]
Exposure to the phototransistor is started by turning off the transfer switch Q1 or opening the shutter.
[0090]
After a period corresponding to one field scanning period or one frame scanning period, the reset switch Q2 is turned from ON to OFF to reset the input part of the source follower, and then the floating state is set.
[0091]
Next, the transfer switch Q1 is opened and closed, and a part of the photoelectric charge accumulated in the photodiode 505 is transferred to the input part of the source follower.
[0092]
An output signal is held in the capacitor 602 by turning on the pixel selection switch Q4 and opening and closing the switch S1.
[0093]
Again, the reset switch Q2 is opened and closed to reset the input part of the source follower to a floating state. The transfer switch Q1 is opened and closed to transfer the remaining part of the photocharge accumulated in the photodiode 505 to the input part of the source follower.
[0094]
  As before, this time the pixel selection switch Q4 is turned on to obtain the second readout signal, and the switchS2The output signal is held in the capacitor 602 by opening and closing.
[0095]
  To obtain the third read signal, open and close the reset switch Q2, reset the input part of the source follower and put it in a floating stateShiAfter that, the transfer switch Q1 was opened and closed and accumulated in the photodiode 505.The rest of the photo chargeTo the input of the source follower. Then, the pixel selection switch Q4 is turned on and the switchS3The output signal is held in the capacitor 602 by opening and closing.
[0096]
According to this embodiment, even when a signal is transferred and read from a photodiode in a saturated state, the photodiode can be completely depleted by three transfer and read operations. In the photodiode with a small amount of accumulated charge, the charge is completely transferred by the second transfer operation, and the photodiode is completely depleted and reset. Further, in some photodiodes with a smaller amount of accumulated charge, depletion reset is achieved by the first transfer operation.
[0097]
Conventionally, in order to secure 2.5 volt of the output signal amplitude of the source follower, it was necessary to drive at a power supply voltage = 5.0 volt and a reset voltage = 3.5 volt.
[0098]
On the other hand, in this embodiment, a good optical signal equivalent to the conventional one can be obtained even though the power supply voltage is reduced to 3.3 volts and the reset voltage is set to 1.8 volts.
[0099]
Further, in order to achieve the above-described performance, the power supply voltage conventionally required 5.0 volts, and the MOS transistor process of the 0.8 μm rule had to be used. The power supply voltage can be 3.3 volts, and a 0.35 μm rule MOS transistor can be used.
[0100]
(Embodiment 2)
The physical configuration and circuit configuration of each pixel of the solid-state imaging device according to the present embodiment are the same as those of the first embodiment.
[0101]
The difference from the first embodiment is that the circuit shown in FIG. 6 is used as the readout circuit.
[0102]
FIG. 6 is a schematic circuit diagram of a readout circuit provided with addition means used in the present invention.
[0103]
The output of each pixel is read out by the output signal holding means 702 connected to the signal output line 704. Specifically, a plurality of capacitive elements can be used as the output signal holding means 702 for temporarily holding the output signal. In the present embodiment, at the first (first) reading, the switch S1 in FIG. 6 is opened and closed, and the noise signal and the output signal are held in the capacitor. At the time of the second reading, the switch S2 is opened and closed to hold the noise signal and the output signal in another capacitor, and at the last (third time) reading, the switch S3 is opened and closed to further open the noise signal and the other capacitor. Holds the output signal.
[0104]
The noise signal and the output signal held in each capacitor are converted into a time series signal by the horizontal scanning circuit 705 and output from the output amplifier 706.
[0105]
A drive timing chart is shown in FIG.
[0106]
The reset switch Q2 is turned from ON to OFF to reset the input part of the source follower, and then enter the floating state. The pixel selection switch Q4 is turned on, reset noise generated by the reset operation is read out to the output signal line 704, and one of the switches S1 is opened and closed and transferred to a capacitor for holding the noise signal. A high level pulse S1 (N) for reading in FIG. 7 is a signal for opening one of the switches S1.
[0107]
Next, the transfer switch Q1 is opened and closed, the optical signal is transferred from the photodiode 505 to the input part of the source follower, and the optical signal component is superimposed on the reset noise remaining in the input part. The selector switch Q4 is turned on to read this optical signal to the output line 704, and this signal is held in another capacitor by opening the other of the switches S1. A high-level pulse S1 (S) for reading in FIG. 7 is a signal for opening the other side of the switch S1.
[0108]
Thereafter, the reset switch Q2 is opened / closed again to reset the input part of the source follower to a floating state. As before, this time, in order to obtain the second read signal, the switch S2 is sequentially opened and closed by the high level pulses S2 (N) and S2 (S), and the output signal is set to the respective capacitors with the reset noise and the optical signal. Hold.
[0109]
Further, in order to obtain the third read signal, the switch S3 is sequentially opened and closed by high level pulses S3 (N) and S3 (S), and the noise and the output signal are held in the respective capacitors.
[0110]
In this embodiment, the photodiode and the reset voltage are designed so that all the charges in the embedded photodiode in the saturated state or the state where the maximum amount of charge accumulated in the system is accumulated can be transferred by the third reading. .
[0111]
Conventionally, in order to secure 2.5 volt of the output signal amplitude of the source follower, it was necessary to drive at a power supply voltage = 5.0 volt and a reset voltage = 3.5 volt.
[0112]
On the other hand, in this example, although the power supply voltage was reduced to 3.3 volts and the reset voltage was set to 1.8 volts, a good optical signal equivalent to the conventional one could be obtained.
[0113]
In order to achieve the above-mentioned performance, the power supply voltage of 5.0 volt is conventionally required and a MOS transistor process having a minimum line width of 0.8 μm rule has to be used. The power supply voltage can be 3.3 volts, and a MOS transistor having a minimum line width of 0.35 μm rule can be used.
[0114]
(Embodiment 3)
FIG. 8 is a circuit diagram of one pixel and a readout circuit according to the present embodiment.
[0115]
Reference numerals 901 and 901 ′ denote power supply lines for supplying reset voltages and power supply voltages for the amplifying transistors, 902 and 902 ′ are reset switch lines for controlling the operation of the reset switches Q2 and Q2 ′, 904 is a signal output line, 905 is a photodiode, Reference numerals 906 and 906 ′ denote transfer switch lines for controlling the operations of the transfer switches Q1 and Q1 ′.
[0116]
In the first and second embodiments, one source follower is arranged for one pixel, and the input section of the source follower is reset in time series every time the data is read.
[0117]
In the present embodiment, two source followers Q3 and Q3 'are arranged in one pixel. Here, the input parts of the source followers Q3 and Q3 'are simultaneously reset by turning on the reset switches Q2 and Q2'.
[0118]
Thereafter, the noise switch of the selection switch Q4 and the switch S1 and the noise switch of the selection switch Q4 'and the switch S2 are sequentially opened and closed, and the reset noise signal is held in the noise capacitance connected to the switches S1 and S2, respectively. To do.
[0119]
Subsequently, the transfer switches Q2 and Q2 ′ are opened or closed sequentially or simultaneously to transfer charges to the input parts of the source followers Q3 and Q3 ′, and the selection switches Q4 and Q4 ′ are sequentially opened and closed to include optical signal information. Signals are held in signal capacitors connected to the switches S1 and S2, respectively.
[0120]
  And using a horizontal scanning circuiteachsignalTo the common output line and add on the common output lineOutput, noise suppression processing is performed by the differential amplifier, and output.
[0121]
(Embodiment 4)
FIG. 9 is a circuit diagram of the solid-state imaging device according to the present embodiment.
[0122]
Here, a second signal output line 904 ′ is arranged in parallel with the first signal output line 904, and the output of the source follower Q3 ′ is read out to the second signal output line, thereby including a noise signal and an optical signal. The signal output can be read out in parallel. That is, the selection switches Q4 and Q4 'can be opened and closed simultaneously.
[0123]
According to the present embodiment, an optical signal having a low voltage and a wide dynamic range can be obtained as in the first embodiment, and at the same time, the readout time can be shortened compared with the first and second embodiments although the pixel size is increased. It was.
[0124]
(Embodiment 5)
For example, the readout circuit of the solid-state imaging device according to the first embodiment can be changed, and the signals sequentially read out can be converted into digital signals, and then the signals can be added by digital processing.
[0125]
In this digital processing, weighted addition with variable weight can be easily performed. As a result, as shown in FIG. 10, for example, signal addition can be set programmable. If this method is used, for example, the sensitivity can be changed in accordance with the light amount range.
[0126]
(Embodiment 6)
A circuit of the solid-state imaging device according to this embodiment is shown in FIG. The basic configuration and operation are the same as those in the second embodiment. The difference is that the capacitance CFD of the charge voltage conversion unit, which is the input unit of the source follower, is reduced to reduce the number of readout capacitances per signal output line from 3 to 2, and transfer and readout are performed in two operations. This is the point.
[0127]
Specifically, in order to improve sensitivity, the capacitance CFD of the charge-voltage conversion unit that is the input unit of the source follower is set to about 4 fF.
[0128]
At about CFD = 7 fF, the charge conversion coefficient per electron in the input unit is 23 μV / electron.
[0129]
In this embodiment, CFD = 4 fF is designed and the charge conversion coefficient is 40 μV / electron.
[0130]
In the prior art, if the capacitance value is reduced in order to increase sensitivity, the dynamic range is reduced accordingly. Specifically, the handling charge is reduced to 57%, and it is difficult to achieve both improvement in sensitivity and expansion of the dynamic range.
[0131]
In this embodiment, it is possible to completely transfer and read the maximum amount of charge that can be accumulated in the photodiode by reading the power source voltage = 5.0 volts twice, and the signal by the two times reading is shared. Added on the horizontal output line. As a result, it is possible to improve sensitivity about twice while ensuring a dynamic range.
[0132]
(Embodiment 7)
A circuit diagram of three pixels of the solid-state imaging device of the present embodiment is shown in FIG.
[0133]
In the present embodiment, a source follower amplifier, a selection switch, and a reset switch, which are amplifying means, are connected to a photoelectric conversion unit including three photodiodes and three transfer switches to form three pixels.
[0134]
1301 is a power supply line, 1302 is a reset switch line, 1303 is a selection switch line, 1305a to 1305c are photodiodes, and 1306 is a transfer switch line.
[0135]
The feature of this embodiment is that the signals of each photodiode section can be selectively read out by opening and closing each transfer switch, while three photodiodes on the source follower input terminal by simultaneously opening and closing three transfer switches. The signal can be added. When three photodiodes are added, the signal amount increases as compared to the case of one photodiode. Conventionally, even if the addition is limited by the signal amplitude on the input terminal of the source follower, the signal based on the charge accumulated in one unit accumulation period is read by repeating the transfer operation multiple times. In other words, all the added signals can be read by applying the present invention.
[0136]
Further, in the present invention, it is possible to select a mode using the second or subsequent signal without using the signal read out for the first time so that only a signal having a predetermined exposure amount or more can be extracted. is there.
[0137]
For example, when reading out three times or more, if only the second reading signal is selected and added without adding the first signal, a signal exceeding a certain amount of exposure light can be easily obtained without digital calculation. It becomes possible to extract.
[0138]
Further, since the power source used for driving the pixel portion can be 3.3 volt, it can be driven together with the analog-digital converter with a single power source. Furthermore, the pixel portion and the analog-digital converter can be easily manufactured on the same chip.
[0139]
FIG. 13 shows a system schematic diagram using the imaging apparatus according to the present invention.
[0140]
As shown in the figure, the image light incident through the optical system 71 forms an image on the solid-state imaging device 72. The solid-state imaging device 72 converts the optical information into an electrical signal. The electric signal is subjected to signal conversion processing by a signal processing circuit 73 by a predetermined method such as white balance correction, gamma correction, luminance signal formation, color signal formation, and contour correction processing, and is output. The signal processed signal is recorded or transferred by an information recording device by a recording system and communication system 74. The recorded or transferred signal is reproduced by the reproduction system 77. The solid-state imaging device 72 and signal processing circuit 73 are controlled by a timing control circuit 75, and the optical system 71, timing control circuit 75, recording / communication system 74, and reproduction system 77 are controlled by a system control circuit 76. The timing control circuit 75 can select independent reading or addition / decimation reading.
[0141]
Reference numeral 70 denotes a mechanical shutter that is provided as necessary and determines the exposure time of the solid-state imaging device 72.
[0142]
As described above, according to the embodiment of the present invention, the following effects can be obtained.
(1) A wide dynamic range sensor signal can be obtained even when the power supply voltage is lowered.
(2) Due to the effect (1), a finer MOS transistor can be used, and the pixels can be reduced.
(3) Since a fine MOS transistor can be used, a single power supply can be used with a high-performance digital IC.
(4) Since it is possible to use a fine MOS transistor, it is possible to make a single chip with a high-performance digital IC with a single power source.
(5) The sensitivity can be improved without degrading the dynamic range.
[0143]
【The invention's effect】
According to the present invention, it is possible to provide a solid-state imaging device, a driving method thereof, and an imaging system with lower power consumption and less noise than conventional ones.
[0144]
Alternatively, it is possible to provide a solid-state imaging device capable of depletion transfer without increasing the power supply voltage and the reset voltage, a driving method thereof, and an imaging system.
[Brief description of the drawings]
FIG. 1 is a schematic diagram for explaining a pixel unit configuration and operation of a solid-state imaging device according to the present invention.
FIG. 2 is a driving timing diagram of a pixel unit according to the present invention.
FIG. 3 is a typical circuit diagram of a pixel portion used in the present invention.
FIG. 4 is a schematic circuit diagram of a readout circuit having an addition circuit used in the present invention.
FIG. 5 is a diagram showing an example of an adder circuit used in the present invention.
FIG. 6 is a schematic circuit diagram of a readout circuit having another adding circuit used in the present invention.
FIG. 7 is a drive timing chart of a pixel portion used in the present invention.
FIG. 8 is a circuit diagram of another solid-state imaging device used in the present invention.
FIG. 9 is a circuit diagram of still another solid-state imaging device used in the present invention.
FIG. 10 is a diagram illustrating an example of a relationship between a light amount and an output signal after calculation.
FIG. 11 is a circuit diagram of another readout circuit used in the present invention.
FIG. 12 is a circuit diagram of a pixel portion of another solid-state imaging device used in the present invention.
FIG. 13 is a block diagram of an imaging system used in the present invention.
FIG. 14 is a schematic diagram for explaining the operation of a conventional solid-state imaging device.
FIG. 15 is a diagram showing the relationship between the saturation charge amount of the photodiode and the potential of the floating diffusion region.
[Explanation of symbols]
101 P-well
102 Transfer switch gate
103 Floating diffusion region
104 Surface p region of photodiode
105 n-region of photodiode
106 Oxide film
107 Reset area
108 Reset switch gate
501 Power line
502 Reset switch line
503 Selection switch line
504 signal output line
505 Embedded photodiode
506 Transfer switch line
Q1 transfer switch
Q2 Reset switch
Q3 Input MOS transistor (Signal amplification means)
Q4 selection switch

Claims (9)

A photoelectric conversion unit; a charge voltage conversion unit that converts charges from the photoelectric conversion unit into a voltage signal; signal amplification means that amplifies the voltage signal generated in the charge voltage conversion unit; and A solid-state imaging device driving method comprising: charge transfer means for transferring photocharge to a voltage conversion section; and reset means for resetting by applying a predetermined reset voltage to the charge voltage conversion section,
A part of the photoelectric charge accumulated in the photoelectric conversion unit during the accumulation period is transferred from the photoelectric conversion unit to the charge voltage conversion unit, and the output signal amplified by the signal amplification means is read to the signal output line for the first time After performing the read operation,
Resetting the charge-voltage converter, then transfer the remaining of the optical charges from the photoelectric conversion unit to the charge-voltage conversion unit, a reading operation for reading an output signal amplified by the amplifying means to said signal output line A method for driving a solid-state imaging device. 2. The driving method of the solid-state imaging device according to claim 1 , wherein the output signals read by the first read operation and the read operation after the first read operation are each subjected to noise suppression processing and then added. The output signal read by the reading operation after the read operation of the read operation and the first of the first holding respectively, after adding them, according to claim 1 for outputting to a common output line by the horizontal scanning circuit Driving method for a solid-state imaging device. The reset voltage having a value corresponding to the saturation charge amount Q _SAT of the photoelectric conversion unit, such that the voltage value VFD _SAT of the charge voltage conversion unit is lower than the depletion voltage V _DEP of the photoelectric conversion unit. 2. A method for driving a solid-state imaging device according to 1 . After the first read operation and before the read operation after the first read operation , the charge voltage conversion unit is reset, and a part of the photoelectric charge is converted from the photoelectric conversion unit to the charge voltage conversion. The solid-state imaging device driving method according to claim 1 , wherein an intermediate read operation is performed at least once to transfer the output signal to the signal output line to the signal output line. A photoelectric conversion unit; a charge voltage conversion unit that converts charges from the photoelectric conversion unit into a voltage signal; signal amplification means that amplifies the voltage signal generated in the charge voltage conversion unit; and A solid-state imaging device having charge transfer means for transferring photocharge to the voltage conversion section, and reset means for resetting by applying a predetermined reset voltage to the charge voltage conversion section,
The first time that a part of the photoelectric charge accumulated in the photoelectric conversion unit during the accumulation period is transferred from the photoelectric conversion unit to the charge voltage conversion unit , and the output signal amplified by the signal amplification means is read to the signal output line After performing the read operation of
Resetting the charge-voltage converter, and then transferring the remainder of the photoelectric charge from the photoelectric converter to the charge-voltage converter, and reading out the output signal amplified by the amplifying means to the signal output line A solid-state imaging device comprising a control circuit that controls to perform. The solid-state imaging device according to claim 6 , wherein the photoelectric conversion unit is an embedded photodiode. A solid-state imaging device according to claim 6 ;
An imaging system comprising: an optical system that focuses light onto the solid-state imaging device; and a signal processing circuit that processes an output signal from the solid-state imaging device. The solid-state imaging device according to claim 6 , an optical system for imaging light onto the solid-state imaging device, a mechanical shutter for determining an exposure time of the solid-state imaging device, and an output signal from the solid-state imaging device An imaging system comprising a signal processing circuit for processing.

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