JP3661482B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
JP3661482B2
JP3661482B2 JP09932099A JP9932099A JP3661482B2 JP 3661482 B2 JP3661482 B2 JP 3661482B2 JP 09932099 A JP09932099 A JP 09932099A JP 9932099 A JP9932099 A JP 9932099A JP 3661482 B2 JP3661482 B2 JP 3661482B2
Authority
JP
Japan
Prior art keywords
semiconductor element
resin substrate
connection terminal
semiconductor device
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP09932099A
Other languages
Japanese (ja)
Other versions
JP2000294577A (en
Inventor
和明 鈴木
尚 安藤
孝 ▲松▼村
俊之 周藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dexerials Corp
Original Assignee
Sony Chemicals Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Chemicals Corp filed Critical Sony Chemicals Corp
Priority to JP09932099A priority Critical patent/JP3661482B2/en
Publication of JP2000294577A publication Critical patent/JP2000294577A/en
Application granted granted Critical
Publication of JP3661482B2 publication Critical patent/JP3661482B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Description

【０００１】
【発明の属する技術分野】
本発明は、加圧又は加圧加熱により容易に変形しうる樹脂基板に、半導体素子が保持されている半導体装置に関する。
【０００２】
【従来の技術】
加圧又は加圧加熱により容易に変形しうる樹脂基板に半導体素子が保持されている半導体装置の代表的なものとして、ＩＣカードやＩＣタグ等のデータキャリアが挙げられる。
【０００３】
従来のデータキャリアの代表例であるＩＣカードは、図５に示すように、両面銅張ポリイミド基板の銅層からフォトリソグラフ法によりコンデンサ５１とアンテナコイル５２とを形成し、それらの接続ランド（図示せず）とＩＣチップ５３の外部接続バンプ端子（図示せず）とを異方性導電フィルム（図示せず）を介して接続した構造を有する。更に、ポリイミド基板から突出しているＩＣチップを埋め込むに足る厚さの接着剤層を介して保護フィルムを積層している。また両面銅張ポリイミド基板の裏面にも接着剤層を介して保護フィルムが積層されている。
【０００４】
【発明が解決しようとする課題】
しかしながら、従来のＩＣカード等のデータキャリアは、高価な両面銅張ポリイミド基板を利用しているために、製造コストを低減させることが困難であるという問題がある。また、ポリイミド基板の表面に、それから突出しているＩＣチップを埋め込むに足る厚さの接着剤層を介して保護フィルムを積層し、且つポリイミド基板の裏面にも接着剤層を介して保護フィルムが積層されているために、ＩＣカード等のデータキャリアの厚みが厚くなり、取り扱い性が低下するという問題がある。しかも、従来のＩＣカードの場合、図６に示すように、ポリイミド基板６０上の接続端子６１とＩＣチップ６２の外部接続バンプ端子６３とを異方性導電フィルム６４を介して加熱押圧して接続したときに、ＩＣチップ６２の露出しているダイシング面６２ａ（特に、ダイシングエッジ６２ｂ）がポリイミド基板６０上の接続端子６１に食い込み、場合によりショート（以下エッジショートと称する）が生じるという問題がある。
【０００５】
本発明は、以上の従来の技術の課題を解決しようとするものであり、データキャリア（例えば、ＩＣカード、ＩＣタグ）等の半導体装置の厚みを厚くすることなく、半導体素子（ＩＣチップ）のエッジショートを生じさせることなく、且つ低コストで製造できる半導体装置を提供することを目的とする。
【０００６】
【課題を解決するための手段】
本発明者は、ボンディングヘッド等の加熱押圧ツールで半導体素子を、加圧又は加圧加熱することにより、加圧又は加圧加熱により容易に変形しうる樹脂基板を変形させながらその中に埋設すると、半導体素子のダイシング面を露出させず且つ半導体素子の接続端子を外部回路と接続できることを見出し、本発明を完成させるに至った。
【０００９】
また、本発明は、加圧加熱により容易に変形しうるカード基材としての樹脂基板に保持された半導体素子を含む半導体装置の製造方法であって、カード基材としての樹脂基板表面の所定部位に、半導体素子をその接続端子面が上を向くように載置し、半導体素子のダイシング面が樹脂基板表面から露出せず且つ半導体素子の接続端子が印刷法により形成されてなる外部回路と接続可能となるように、半導体素子を加圧加熱することにより樹脂基板を変形させながら樹脂基板中に半導体素子をその接続端子側表面と樹脂基板との表面が略同一平面レベルとなるように埋設し、樹脂基板の半導体素子側の面上に接着剤層を介して保護フィルムを積層することを特徴とする製造方法を提供する。
【００１０】
【発明の実施の形態】
以下、本発明を詳細に説明する。
【００１１】
図１は、本発明の半導体装置の好ましい例の断面図である。図１の半導体装置は、ＩＣチップ等の半導体素子１が、加圧又は加圧加熱により容易に変形しうる樹脂基板２（例えば、熱可塑性樹脂基板、一部の熱硬化性樹脂基板、未延伸フィルム等）中に埋め込まれた構造を有する。ここで、半導体素子１は、そのダイシング面１ａが樹脂基板２から露出しないように埋め込まれる。特にダイシングエッジ１ｂが露出することを完全に防止するために、半導体素子１の周縁部１ｃも露出しないように埋め込むことが好ましい。このように半導体素子１を樹脂基板２中に埋め込むので、本発明の半導体装置においては、エッジショートの問題は生じない。
【００１２】
なお、樹脂基板２に埋め込まれた半導体素子１の接続端子１ｄ（例えばバンプやランド）は、外部回路３と接続可能となるようにする必要がある。
【００１３】
本発明の半導体装置の構造は、樹脂基板２上の半導体素子１をボンディングヘッド等の加熱押圧手段でそれ自体を加圧又は加圧加熱しながら樹脂基板２を変形させ、樹脂基板２中に埋設することにより実現できる。
【００１４】
本発明の半導体装置においては、図１に示すように、半導体素子１の接続端子１ｄ側表面と樹脂基板２の表面とを、略同一平面レベルにすることが好ましい。これにより、半導体装置をより薄くすることができる。また、略同一平面レベルにすると、半導体素子１の接続端子１ｄ上に、直接、公知の銀ペースト等を用いるスクリーン印刷等の印刷法で外部回路３として印刷回路を安価に形成することができる。しかも、異方性導電接着剤（フィルム）の使用を省略でき、製造コストの削減を実現できる。
【００１５】
また、必要に応じ、図１に示すように樹脂基板２の外部回路３面上に接着剤層４を介して保護フィルム５を積層することが好ましい。
【００１６】
以上説明した図１の半導体装置においては、外部回路３を印刷法により形成した例を示したが、図２（図中、２１は絶縁基板、２２は外部回路及び２３はバンプ等の接続端子を示している）に示すように、半導体素子１の接続端子１ｄと、任意の方法で作製された外部回路２２の接続端子２３とを異方性導電接着剤２４を介して接続してもよい。ここで、半導体素子１以外の領域は、絶縁性接着剤２５で接着すればよい。
【００１７】
本発明の半導体装置の具体的な適用例として、図３にデータキャリアとしてＩＣカードを示す。
【００１８】
このＩＣカードは、半導体素子３１及びコンデンサ３２が図１の半導体素子と同様に樹脂基板３３中に埋設され、アンテナコイル３４が印刷法で樹脂基板３３の表面に形成された構造を有する。ここで、半導体素子３１は、そのダイシング面（図示せず）が樹脂基板３３から露出しないように埋設されている。但し、半導体素子３１の接続端子（図示せず）は、コンデンサ３２及びアンテナコイル３４と接続できるように樹脂基板３３中に埋め込まれていない。また、半導体素子３１の接続端子側表面及びコンデンサ３２の接続端子側表面と樹脂基板３３の表面とが、略同一平面レベルであることが好ましい。更に、樹脂基板３３のアンテナコイル３４側面上に保護フィルム（図示せず）を積層することが好ましい。
【００１９】
なお、アンテナコイル３４として巻線を使用することもできる。この場合、巻線を樹脂基板３３中に埋め込むように配設することが好ましい。
【００２０】
以上のようなＩＣカード等のデータキャリアは、図１の半導体装置と同様に、半導体素子のエッジショートの問題がなく、厚みも薄くなり、安価に製造できる。
【００２１】
本発明の半導体装置は、以下に説明する工程を経て製造することができる。
【００２２】
まず、半導体素子４１を、加圧又は加圧加熱により容易に変形しうる樹脂基板４２の表面の所定部位に、その接続端子４１ａが上を向くように載置する（図４（ａ））。
【００２３】
次に、半導体素子４１のダイシング面４１ｂが樹脂基板４２表面に露出しないように、ボンディングヘッド４３で半導体素子４１を加圧又は加圧加熱し、樹脂基板４２を変形させながら樹脂基板４２中に半導体素子４１を埋設する（図４（ｂ））。このとき、半導体素子４１の接続端子４１ａが外部回路と接続可能となるように、樹脂基板４２の表面に露出させる。
【００２４】
更に、必要に応じて、種々の電子部品、例えばコンデンサ４４をボンディングヘッド４３で加圧又は加圧加熱し、樹脂基板４２を変形させながら樹脂基板４２中にコンデンサ４４を埋設する（図４（ｃ））。
【００２５】
続いて、半導体素子４１の接続端子４１ａ及びコンデンサ４４の接続端子４４ａとを接続するために、アンテナコイル（図示せず）を含む回路４５を印刷法により形成する（図４（ｄ））。
【００２６】
更に、必要に応じて、樹脂基板４２の半導体素子４１側表面に接着剤層４６を介して保護フィルム４７を積層する（図４（ｅ））。
【００２７】
本発明の半導体装置は、以上説明したＩＣカードやＩＣタグ等のデータキャリアに特に適したものであるが、それに限定されるものではない。
【００２８】
なお、本発明の半導体装置を構成する各要素、例えば半導体素子、樹脂基板、接続端子、コンデンサ等のサイズ、材質等については、公知のものを適宜選択して使用することができる。
【００２９】
【発明の効果】
本発明によれば、データキャリア（例えば、ＩＣカード、ＩＣタグ）等の半導体装置の厚みを厚くすることなく、半導体素子（ＩＣチップ）のエッジショートを生じさせることなく、且つ低コストで製造できる。
【図面の簡単な説明】
【図１】本発明の半導体装置の概略断面図である。
【図２】本発明の半導体装置の概略断面図である。
【図３】本発明のデータキャリアの概略斜視図である。
【図４】本発明の半導体装置の製造工程図である。
【図５】従来のＩＣカードの概略斜視図である。
【図６】従来のＩＣカードで生じるエッジショートの説明図である。
【符号の説明】
１ 半導体素子，２ 樹脂基板，３ 外部回路，４ 接着剤層，５ 保護フィルム[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device in which a semiconductor element is held on a resin substrate that can be easily deformed by pressure or pressure heating.
[0002]
[Prior art]
A typical example of a semiconductor device in which a semiconductor element is held on a resin substrate that can be easily deformed by pressure or pressure heating is a data carrier such as an IC card or an IC tag.
[0003]
As shown in FIG. 5, an IC card, which is a typical example of a conventional data carrier, forms a capacitor 51 and an antenna coil 52 from a copper layer of a double-sided copper-clad polyimide substrate by a photolithographic method, and connects their lands (see FIG. 5). (Not shown) and an external connection bump terminal (not shown) of the IC chip 53 are connected via an anisotropic conductive film (not shown). Further, a protective film is laminated through an adhesive layer having a thickness sufficient to embed an IC chip protruding from the polyimide substrate. Moreover, the protective film is laminated | stacked also on the back surface of the double-sided copper-clad polyimide board | substrate through the adhesive bond layer.
[0004]
[Problems to be solved by the invention]
However, since the conventional data carrier such as an IC card uses an expensive double-sided copper-clad polyimide substrate, there is a problem that it is difficult to reduce the manufacturing cost. In addition, a protective film is laminated on the surface of the polyimide substrate via an adhesive layer having a thickness sufficient to embed an IC chip protruding therefrom, and a protective film is laminated on the back surface of the polyimide substrate via an adhesive layer. For this reason, there is a problem that the thickness of a data carrier such as an IC card becomes thick and the handleability is lowered. Moreover, in the case of a conventional IC card, as shown in FIG. 6, the connection terminals 61 on the polyimide substrate 60 and the external connection bump terminals 63 of the IC chip 62 are heated and pressed through an anisotropic conductive film 64. In this case, the exposed dicing surface 62a (particularly, the dicing edge 62b) of the IC chip 62 bites into the connection terminal 61 on the polyimide substrate 60, which may cause a short circuit (hereinafter referred to as an edge short circuit). .
[0005]
The present invention is intended to solve the above-described problems of the prior art, and without increasing the thickness of a semiconductor device such as a data carrier (for example, an IC card, an IC tag), etc. An object of the present invention is to provide a semiconductor device that can be manufactured at low cost without causing an edge short circuit.
[0006]
[Means for Solving the Problems]
The inventor embeds a semiconductor element that is easily deformable by pressurization or pressure heating by embedding it in the semiconductor element by pressurizing or pressurizing and heating the semiconductor element with a heating and pressing tool such as a bonding head. The inventors have found that the dicing surface of the semiconductor element is not exposed and that the connection terminal of the semiconductor element can be connected to an external circuit, and the present invention has been completed.
[0009]
The present invention also relates to a method of manufacturing a semiconductor device including a semiconductor element held on a resin substrate as a card base that can be easily deformed by pressure heating , and a predetermined portion on the surface of the resin substrate as a card base In addition, the semiconductor element is placed so that its connection terminal surface faces upward, and the dicing surface of the semiconductor element is not exposed from the resin substrate surface and connected to an external circuit in which the connection terminal of the semiconductor element is formed by a printing method. As possible, the semiconductor element is embedded in the resin substrate so that the surface of the connection terminal side surface and the surface of the resin substrate are on substantially the same level while deforming the resin substrate by pressurizing and heating the semiconductor element. There is provided a manufacturing method characterized by laminating a protective film on a surface of a resin substrate on a semiconductor element side through an adhesive layer.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in detail.
[0011]
FIG. 1 is a cross-sectional view of a preferred example of a semiconductor device of the present invention. 1 includes a resin substrate 2 (for example, a thermoplastic resin substrate, a part of a thermosetting resin substrate, an unstretched substrate) in which a semiconductor element 1 such as an IC chip can be easily deformed by pressure or pressure heating. A structure embedded in a film or the like). Here, the semiconductor element 1 is embedded so that the dicing surface 1 a is not exposed from the resin substrate 2. In particular, in order to completely prevent the dicing edge 1b from being exposed, it is preferable that the peripheral edge portion 1c of the semiconductor element 1 is embedded so as not to be exposed. Thus, since the semiconductor element 1 is embedded in the resin substrate 2, the problem of edge short-circuit does not occur in the semiconductor device of the present invention.
[0012]
Note that the connection terminals 1 d (for example, bumps or lands) of the semiconductor element 1 embedded in the resin substrate 2 need to be connectable to the external circuit 3.
[0013]
The structure of the semiconductor device according to the present invention is such that the semiconductor element 1 on the resin substrate 2 is deformed while being pressurized or heated under pressure by a heating and pressing means such as a bonding head, and embedded in the resin substrate 2. This can be achieved.
[0014]
In the semiconductor device of the present invention, as shown in FIG. 1, it is preferable that the surface of the semiconductor element 1 on the connection terminal 1 d side and the surface of the resin substrate 2 are substantially on the same plane level. Thereby, the semiconductor device can be made thinner. Further, when the level is substantially the same plane, a printed circuit can be formed as the external circuit 3 at low cost directly on the connection terminal 1d of the semiconductor element 1 by a printing method such as screen printing using a known silver paste or the like. In addition, the use of an anisotropic conductive adhesive (film) can be omitted, and the manufacturing cost can be reduced.
[0015]
Moreover, it is preferable to laminate | stack the protective film 5 through the adhesive bond layer 4 on the external circuit 3 surface of the resin substrate 2, as shown in FIG.
[0016]
In the semiconductor device of FIG. 1 described above, an example in which the external circuit 3 is formed by a printing method is shown. However, in FIG. 2 (in the figure, 21 is an insulating substrate, 22 is an external circuit, and 23 is a connection terminal such as a bump. As shown in FIG. 2, the connection terminal 1 d of the semiconductor element 1 and the connection terminal 23 of the external circuit 22 manufactured by an arbitrary method may be connected via an anisotropic conductive adhesive 24. Here, the region other than the semiconductor element 1 may be bonded with the insulating adhesive 25.
[0017]
As a specific application example of the semiconductor device of the present invention, an IC card is shown as a data carrier in FIG.
[0018]
This IC card has a structure in which a semiconductor element 31 and a capacitor 32 are embedded in a resin substrate 33 as in the semiconductor element of FIG. 1, and an antenna coil 34 is formed on the surface of the resin substrate 33 by a printing method. Here, the semiconductor element 31 is embedded so that its dicing surface (not shown) is not exposed from the resin substrate 33. However, the connection terminal (not shown) of the semiconductor element 31 is not embedded in the resin substrate 33 so that it can be connected to the capacitor 32 and the antenna coil 34. Moreover, it is preferable that the connection terminal side surface of the semiconductor element 31, the connection terminal side surface of the capacitor 32, and the surface of the resin substrate 33 are substantially on the same plane level. Furthermore, it is preferable to laminate a protective film (not shown) on the side surface of the antenna coil 34 of the resin substrate 33.
[0019]
A winding may be used as the antenna coil 34. In this case, it is preferable to arrange the winding so as to be embedded in the resin substrate 33.
[0020]
The data carrier such as the IC card as described above is free from the problem of edge short-circuit of the semiconductor element as well as the semiconductor device of FIG.
[0021]
The semiconductor device of the present invention can be manufactured through the steps described below.
[0022]
First, the semiconductor element 41 is mounted on a predetermined portion of the surface of the resin substrate 42 that can be easily deformed by pressure or pressure heating so that the connection terminal 41a faces upward (FIG. 4A).
[0023]
Next, the semiconductor element 41 is pressurized or heated by the bonding head 43 so that the dicing surface 41 b of the semiconductor element 41 is not exposed on the surface of the resin substrate 42, and the semiconductor is placed in the resin substrate 42 while deforming the resin substrate 42. The element 41 is embedded (FIG. 4B). At this time, the connection terminal 41a of the semiconductor element 41 is exposed on the surface of the resin substrate 42 so that it can be connected to an external circuit.
[0024]
Further, if necessary, various electronic components such as a capacitor 44 are pressurized or heated by the bonding head 43, and the capacitor 44 is embedded in the resin substrate 42 while deforming the resin substrate 42 (FIG. 4C). )).
[0025]
Subsequently, in order to connect the connection terminal 41a of the semiconductor element 41 and the connection terminal 44a of the capacitor 44, a circuit 45 including an antenna coil (not shown) is formed by a printing method (FIG. 4D).
[0026]
Further, as necessary, a protective film 47 is laminated on the surface of the resin substrate 42 on the semiconductor element 41 side through an adhesive layer 46 (FIG. 4E).
[0027]
The semiconductor device of the present invention is particularly suitable for the data carrier such as the IC card and IC tag described above, but is not limited thereto.
[0028]
It should be noted that known elements can be appropriately selected and used for each element constituting the semiconductor device of the present invention, such as a semiconductor element, a resin substrate, a connection terminal, a capacitor, and the like.
[0029]
【The invention's effect】
According to the present invention, a semiconductor device such as a data carrier (for example, an IC card, an IC tag) or the like can be manufactured at a low cost without increasing the thickness of a semiconductor device (IC chip) without causing an edge short circuit of the semiconductor element. .
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of a semiconductor device of the present invention.
FIG. 2 is a schematic cross-sectional view of a semiconductor device of the present invention.
FIG. 3 is a schematic perspective view of a data carrier of the present invention.
FIG. 4 is a manufacturing process diagram of the semiconductor device of the invention.
FIG. 5 is a schematic perspective view of a conventional IC card.
FIG. 6 is an explanatory diagram of edge short-circuit that occurs in a conventional IC card.
[Explanation of symbols]
1 Semiconductor element, 2 Resin substrate, 3 External circuit, 4 Adhesive layer, 5 Protective film

Claims (2)

加圧加熱により容易に変形しうるカード基材としての樹脂基板に保持された半導体素子を含む半導体装置の製造方法であって、カード基材としての樹脂基板表面の所定部位に、半導体素子をその接続端子面が上を向くように載置し、半導体素子のダイシング面が樹脂基板表面から露出せず且つ半導体素子の接続端子が印刷法により形成されてなる外部回路と接続可能となるように、半導体素子を加圧加熱することにより樹脂基板を変形させながら樹脂基板中に半導体素子をその接続端子側表面と樹脂基板との表面が略同一平面レベルとなるように埋設し、樹脂基板の半導体素子側の面上に接着剤層を介して保護フィルムを積層することを特徴とする製造方法。 A method of manufacturing a semiconductor device including a semiconductor element held on a resin substrate as a card substrate that can be easily deformed by pressure heating , wherein the semiconductor element is placed on a predetermined portion of the surface of the resin substrate as a card substrate. Placed so that the connection terminal surface faces upward, the dicing surface of the semiconductor element is not exposed from the resin substrate surface, and the connection terminal of the semiconductor element can be connected to an external circuit formed by a printing method. The semiconductor element is embedded in the resin substrate by deforming the resin substrate by pressurizing and heating the semiconductor element so that the surface of the connection terminal side surface and the surface of the resin substrate are substantially on the same plane level. A production method comprising laminating a protective film on the side surface through an adhesive layer. 該樹脂基板として、未延伸フィルムを使用する請求項１記載の製造方法。The production method according to claim 1, wherein an unstretched film is used as the resin substrate.
JP09932099A 1999-04-06 1999-04-06 Semiconductor device Expired - Lifetime JP3661482B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP09932099A JP3661482B2 (en) 1999-04-06 1999-04-06 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP09932099A JP3661482B2 (en) 1999-04-06 1999-04-06 Semiconductor device

Publications (2)

Publication Number Publication Date
JP2000294577A JP2000294577A (en) 2000-10-20
JP3661482B2 true JP3661482B2 (en) 2005-06-15

Family

ID=14244356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP09932099A Expired - Lifetime JP3661482B2 (en) 1999-04-06 1999-04-06 Semiconductor device

Country Status (1)

Country Link
JP (1) JP3661482B2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002288612A (en) * 2001-03-27 2002-10-04 Toppan Forms Co Ltd Manufacturing method for tag for loading
JP4783997B2 (en) * 2001-05-11 2011-09-28 大日本印刷株式会社 Contact / non-contact IC module and manufacturing method thereof
JP4489411B2 (en) 2003-01-23 2010-06-23 新光電気工業株式会社 Manufacturing method of electronic component mounting structure
MY148205A (en) * 2003-05-13 2013-03-15 Nagraid Sa Process for assembling an electronic component on a substrate
JP2006039902A (en) * 2004-07-27 2006-02-09 Ntn Corp Uhf band radio ic tag
JP4839668B2 (en) * 2005-04-28 2011-12-21 凸版印刷株式会社 Non-contact IC tag manufacturing method
JP6128495B2 (en) * 2012-07-04 2017-05-17 パナソニックＩｐマネジメント株式会社 Electronic component mounting structure, IC card, COF package
JP6658607B2 (en) 2017-02-22 2020-03-04 オムロン株式会社 Product manufacturing method, exterior parts and antenna pattern selection device

Also Published As

Publication number Publication date
JP2000294577A (en) 2000-10-20

Similar Documents

Publication Publication Date Title
TWI337423B (en) Method for manufacturing a chip card antenna on a thermoplastic support and chip card obtained by said method
KR20000053511A (en) A semiconductor device
US7777317B2 (en) Card and manufacturing method
US8348171B2 (en) Smartcard interconnect
JP2001024145A (en) Semiconductor device and its manufacture
JP2004310619A (en) Method for manufacturing ic card
JP3951409B2 (en) IC card and its manufacturing method
JP3661482B2 (en) Semiconductor device
JP3916405B2 (en) Electronic component mounted component manufacturing method, electronic component mounted finished product manufacturing method, and semiconductor component mounted finished product
JP4285309B2 (en) Electronic circuit module manufacturing method, multilayer electronic circuit module and manufacturing method thereof
JP3916407B2 (en) Manufacturing method of multilayer electronic component mounted component, manufacturing method of electronic component mounted finished product, and electronic component mounted finished product
JP3891743B2 (en) Manufacturing method of semiconductor component mounted component, manufacturing method of semiconductor component mounted finished product, and finished semiconductor component mounted product
JP4306352B2 (en) Contact type non-contact type hybrid IC module and contact type non-contact type hybrid IC card using the same
JP4198245B2 (en) Electronic circuit board, electronic circuit and manufacturing method thereof
JP2000067200A (en) Ic card
JPH09148378A (en) Ic module for ic card, manufacture thereof, and ic card using the ic module
JPH11175676A (en) Non-contact ic card
JP4693295B2 (en) Circuit formation method
JP4702820B2 (en) IC tag label manufacturing method
JP2770485B2 (en) Circuit board
JP4281102B2 (en) IC card
JPH1159036A (en) Non-contact ic card and its manufacture
JP3979797B2 (en) Electronic component mounted component manufacturing method, electronic component mounted finished product manufacturing method, and semiconductor component mounted finished product
JPH11328355A (en) Ic module for ic card
CN102404936A (en) Circuit board capable of embedding discrete part and manufacturing method thereof

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040123

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20040728

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20040810

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20041012

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20041109

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050106

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20050106

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20050301

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20050314

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090401

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090401

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100401

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110401

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120401

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130401

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130401

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140401

Year of fee payment: 9

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term