JP3659222B2 - Current control type drive circuit for semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a drive circuit used in a current control type semiconductor device that is turned on / off by controlling a current flowing into a control terminal.
[0002]
[Prior art]
As a current control type switching transistor element for driving an inductive load, for example, one disclosed in JP-A-6-252408 is known. FIG. 7 shows a conventional driving circuit for driving an inductive load using such a current control type semiconductor element. The transistor Tr1 is turned on / off according to a current flowing from the drive circuit to the base terminal, and drives an inductive load (not shown) connected to the transistor Tr1.
[0003]
The drive circuit includes a pulse power supply, a control circuit 92, and N-type MOS transistors 93 and 94. The pulse power supply includes a pulse generation circuit 91, a DC power supply Vs, diodes Ds1 and Ds2, switches SW1 and SW2, and a transformer T. A primary winding P and a secondary winding S are wound around the transformer T.
[0004]
In the circuit on the primary winding P side of the transformer T, switches SW1 and SW2 are connected in series in order to apply the voltage of the DC power source Vs to the primary winding P in the positive direction (upward toward the dots in the figure). Yes. Further, diodes Ds1 and Ds2 are connected in series in a direction in which the current flowing through the primary winding P is circulated. The pulse generation circuit 91 outputs a pulsed control signal Vg91 so as to turn on / off the set of switches SW1 and SW2 at a predetermined cycle.
[0005]
N-type MOS transistors 93 and 94 are connected in series to the circuit on the secondary winding S side of the transformer T so that the polarities of the built-in body diodes are opposite to each other. The body diode D93 is built in the N-type MOS transistor 93. The body diode D94 is built in the N-type MOS transistor 94. Control circuit 92 outputs control signals Vg93 and Vg94 so that either one of N-type MOS transistors 93 and 94 is turned on and the other is turned off. Note that a parasitic inductance Ls exists in the current path on the secondary winding S side that supplies current to the base terminal of the transistor Tr1.
[0006]
The operation timing of the drive circuit described above will be described. FIG. 8 is a timing chart for explaining the operation timing of each part of the drive circuit of FIG. In FIG. 8, the control signal Vg 91 output from the pulse generation circuit 91, the voltage V 2 induced in the secondary winding S, the control signal Vg 94 applied to the gate terminal of the N-type MOS transistor 94, and the N-type MOS transistor 93 The waveforms of the control signal Vg93 applied to the gate terminal, the current I2 flowing into the base terminal of the transistor Tr1, the voltage Vbe between the base terminal and the emitter terminal of the transistor Tr1, and the voltage Vce between the collector terminal and the emitter terminal of the transistor Tr1 are shown. ing.
[0007]
As described above, the control signal Vg91 is repeatedly turned on / off at a predetermined cycle. When the control signal Vg91 becomes H level, the switches SW1 and SW2 are turned on. At this time, the current flowing through the primary winding P of the transformer T increases, and the voltage V2 induced in the secondary winding S becomes positive. When the control signal Vg91 becomes L level, the switches SW1 and SW2 are turned off. At this time, the current flowing through the primary winding P of the transformer T is reduced by circulating through the diodes Ds1 and Ds2, and the voltage V2 induced in the secondary winding S is in a negative direction.
[0008]
At timing t1, when the control circuit 92 sets the control signal Vg94 to the H level and the control signal Vg93 to the L level, the N-type MOS transistor 94 is turned on and the N-type MOS transistor 93 is turned off. In the circuit on the secondary winding S side, the current half-wave rectified by the body diode D93 of the N-type MOS transistor 93 flows into the base terminal of the transistor Tr1 via the N-type MOS transistor 94. As a result, the transistor Tr1 is turned on when carriers are injected into the transistor Tr1. Due to the presence of the parasitic inductance Ls described above, the current I2 flowing through the base terminal of the transistor Tr1 gradually increases, and the waveform thereof becomes a pulse-like waveform having an upward slope.
[0009]
At timing t2, when the control circuit 92 sets the control signal Vg94 to the L level and the control signal Vg93 to the H level, the N-type MOS transistor 94 is turned off and the N-type MOS transistor 93 is turned on. In the circuit on the secondary winding S side, the current half-wave rectified by the body diode D94 of the N-type MOS transistor 94 is passed through the N-type MOS transistor 93 to the dot side (FIG. 7) of the secondary winding S. Flowing. As a result, the transistor Tr1 is turned off by removing the carrier from the base terminal.
[0010]
[Problems to be solved by the invention]
When the transistor Tr1 is turned off, the base terminal-emitter terminal voltage Vbe may oscillate as shown in FIG. 8 for the following reason, and the transistor Tr1 may be turned on by mistake. In general, in addition to the parasitic inductance Ls, for example, the on-resistance and wiring resistance of the N-type MOS transistors 93 and 94 and the parasitic capacitance component exist in the current path through which the base current flows. When the transistor Tr1 is a current-driven element, it is necessary to rapidly release the energy accumulated in the parasitic inductance Ls in order to turn off in a very short time from a state where a large base current is flowing. When an RLC resonance phenomenon due to parasitic elements occurs during the energy release, the base voltage terminal-emitter terminal voltage Vbe vibrates violently. When the base voltage rises to the on-voltage (about 0.7 V) of the transistor Tr1, the transistor Tr1 is erroneously turned on and a collector current flows. As a result, the collector terminal-emitter terminal voltage Vce also vibrates greatly. In FIG. 8, a current I2 represents a waveform of the base current, the + side is a current flowing into the base terminal, and the − side is a current flowing when carriers are pulled out from the base terminal.
[0011]
Note that the base voltage oscillation can be suppressed by increasing the on-resistance of the N-type MOS transistor 93 so that carrier extraction from the base terminal is not performed suddenly. However, after the turn-off control of the transistor Tr1 is started at the timing t2. Actually, the time until the transistor Tr1 is turned off (storage time ts) becomes long.
[0012]
An object of the present invention is to provide a drive circuit for a current control type semiconductor device that suppresses the oscillation of a signal at a control terminal at the time of turn-off without increasing the storage time and prevents the turn-on by mistake. is there.
[0013]
[Means for Solving the Problems]
(1) A drive circuit for a current control type semiconductor device according to the first aspect of the invention comprises a pulse current generating means for alternately generating a positive pulse current and a negative pulse current, a pulse current generating means and a current control. A first switch means for supplying a positive pulsed current to the control terminal, and a pulse current generating means and a control terminal of the current control type transistor. A second switching means for supplying a negative pulsed current to the control terminal and extracting the charge in the current control type transistor from the control terminal; and a second switching means from the control terminal of the current control type transistor without passing through the second switching means. Charge extracting means for extracting charge in the current control type transistor, detection means for detecting an indication of turn-off of the current control type transistor, and (1) a current control type transistor. Instructing the first switch means to supply a positive pulsed current during the period when the switch is turned on, and (2) supplying the negative pulsed current to the second switch means during the period during which the current control type transistor is turned off. Instructing the charge extraction means to extract the charge, and when the detection means detects a sign, instructs the second switch means to supply a negative pulse current and stop the extraction of the charge. The above-described object is achieved by providing a control circuit that performs the above-described operation.
(2) A drive circuit for a current control type semiconductor device according to a second aspect of the invention comprises a pulse current generating means for alternately generating a positive pulse current and a negative pulse current, a pulse current generating means and a current control. A first switch means for supplying a positive pulsed current to the control terminal, and a pulse current generating means and a control terminal of the current control type transistor. , Supplying a negative pulsed current to the control terminal, and pulling out the charge in the current control type transistor from the control terminal, and controlling the current control type transistor having a higher impedance than the second switch means. A charge extracting means for extracting charge in the current control type transistor from the terminal without going through the second switch means, and a turn-off of the current control type transistor. Detecting means for detecting a symptom; (1) instructing the first switch means to supply a positive pulsed current during a period when the current control type transistor is turned on; and (2) during a period when the current control type transistor is turned off. Instructing the second switch means to supply a negative pulsed current and extracting the charge, and when the detecting means detects a sign, stops supplying the negative pulse current to the second switch means and removing the charge. And the control circuit for instructing the charge extraction means to extract the charge, the above-mentioned object is achieved.
(3) The invention according to claim 3 is the current control type semiconductor element drive circuit according to claim 1 or 2, wherein the detecting means is an indication according to the voltage or current of the main current terminal of the current control type transistor. Is detected.
(4) The invention according to claim 4 is the current control type semiconductor element drive circuit according to claim 1 or 2, wherein the detection means gives an indication according to the voltage or current of the control terminal of the current control type transistor. It is characterized by detecting.
[0014]
【The invention's effect】
(1) According to the first, third, and fourth aspects of the present invention, the pulsed current from the pulse current generating means for alternately generating positive and negative pulsed currents is applied to the first period during the period when the current control type transistor is turned on. Is rectified by the switching means, and a positive pulse current is supplied to the control terminal of the current control type transistor. Supply negative pulsed current. When the current control transistor is turned off, the second switch means and the charge extraction means perform charge extraction from the control terminal of the current control transistor, and when the turn-off of the current control transistor is detected, the second switch means The supply of the negative pulsed current by the means and the charge extraction by the second switch means are stopped. As a result, vibration at the control terminal of the current control type semiconductor element can be prevented.
(2) According to the invention described in claims 2 to 4, the pulse current from the pulse current generating means for alternately generating positive and negative pulse currents is supplied to the first switch during the period when the current control type transistor is turned on. Rectified by the means to supply a positive pulsed current to the control terminal of the current control type transistor, and rectified by the second switch means during the period in which the current control type transistor is turned off. Supply pulsed current. During the period in which the current control transistor is turned off, the second switch means performs charge extraction from the control terminal of the current control transistor, and when the turn-off of the current control transistor is detected, a negative pulse is generated by the second switch means. The supply of the current current and the charge extraction by the second switch means are stopped, and the charge extraction means is made to extract the charge from the control terminal of the current control type transistor. As a result, vibration at the control terminal of the current control type semiconductor element can be prevented.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
-First embodiment-
FIG. 1 is a diagram showing a drive circuit of a current control type semiconductor device according to the first embodiment of the present invention. The transistor Tr1 is turned on / off according to the pulse current IB flowing from the drive circuit to the base terminal, and drives an inductive load (not shown) connected to the transistor Tr1. The drive circuit includes a pulse power supply, a control circuit 12, N-type MOS transistors M21, M22, and M23, and a Vce detection circuit 13. The pulse power supply includes a pulse generation circuit 11, a DC power supply Vs, diodes Ds1 and Ds2, switches SW1 and SW2, and a transformer T. A primary winding P and a secondary winding S are wound around the transformer T.
[0016]
In the circuit on the primary winding P side of the transformer T, switches SW1 and SW2 are connected to the primary winding P in order to apply the voltage of the DC power source Vs to the primary winding P in the positive direction (upward toward the dots in the figure). Connected in series. Further, diodes Ds1 and Ds2 are connected in series with the primary winding P in a direction in which the current flowing through the primary winding P is circulated. The pulse generation circuit 11 outputs a pulsed control signal Vg11 so that the switches SW1 and SW2 are turned on / off at a predetermined cycle.
[0017]
In the circuit on the secondary winding S side of the transformer T, N-type MOS transistors M21 and M22 are connected in series so that the polarities of the built-in body diodes are opposite to each other. The body diode D21 is built in the N-type MOS transistor M21. The body diode D22 is built in the N-type MOS transistor M22. A resistor R and an N-type MOS transistor M23 are connected in series between the base terminal and the emitter terminal of the transistor Tr1. Control circuit 12 outputs control signals Vg21 and Vg22 so as to turn on one of N-type MOS transistors M21 and M22 and turn off the other. The control circuit 12 further outputs a control signal Vg23 for turning on / off the N-type MOS transistor M23. The Vce detection circuit 13 detects the voltage Vce between the collector terminal and the emitter terminal of the transistor Tr1. Note that a parasitic inductance Ls exists in the current path on the secondary winding S side that supplies current to the base terminal of the transistor Tr1.
[0018]
The operation timing of the drive circuit described above will be described. FIG. 2 is a timing chart for explaining the operation timing of each part of the drive circuit of FIG. In FIG. 2, the control signal Vg11 output from the pulse generation circuit 11, the voltage V2 induced in the secondary winding S, the control signal Vg22 applied to the gate terminal of the N-type MOS transistor M22, and the N-type MOS transistor M23 The control signal Vg23 applied to the gate terminal, the control signal Vg21 applied to the gate terminal of the N-type MOS transistor M21, the current IB flowing into the base terminal of the transistor Tr1, the base terminal-emitter terminal voltage Vbe of the transistor Tr1, and the transistor The waveform of the voltage Vce between the collector terminal and the emitter terminal of Tr1 is shown.
[0019]
As described above, the control signal Vg11 is repeatedly turned on / off at a predetermined cycle. When the control signal Vg11 becomes H level, the switches SW1 and SW2 are turned on. At this time, the current flowing through the primary winding P of the transformer T increases, and the voltage V2 induced in the secondary winding S becomes positive. When the control signal Vg11 becomes L level, the switches SW1 and SW2 are turned off. At this time, the current flowing through the primary winding P of the transformer T is reduced by circulating through the diodes Ds1 and Ds2, and the voltage V2 induced in the secondary winding S is in a negative direction.
[0020]
At timing t1, when the control circuit 12 sets the control signal Vg22 to the H level and the control signals Vg23 and Vg21 to the L level, the N-type MOS transistor M22 is turned on and the N-type MOS transistors M23 and M21 are turned off, respectively. In the circuit on the secondary winding S side, the current half-wave rectified by the body diode D21 of the N-type MOS transistor M21 flows into the base terminal of the transistor Tr1 via the N-type MOS transistor M22. As a result, the transistor Tr1 is turned on after carrier injection.
[0021]
When the transistor Tr1 is turned on and a driving current for a load (not shown) flows from the collector terminal to the emitter terminal of the transistor Tr1, the collector-emitter voltage Vce of the transistor Tr1 decreases.
[0022]
Note that, due to the presence of the parasitic inductance Ls described above, the current IB flowing through the base terminal of the transistor Tr1 gradually increases, and the waveform thereof becomes a pulse-like waveform having an upward slope. Since the pulse period of the control signal Vg11 by the pulse generation circuit 11 is made sufficiently smaller than the lifetime of the carrier in the transistor T1, the transistor IB can be used even if the current IB flowing through the base terminal of the transistor T1 is a pulsed drive current. T1 can be turned on.
[0023]
At timing t2, when control circuit 12 sets control signal Vg22 to L level and control signals Vg23 and Vg21 to H level, N-type MOS transistor M22 is turned off and N-type MOS transistors M23 and M21 are turned on. In the circuit on the secondary winding S side, the current half-wave rectified by the body diode D22 of the N-type MOS transistor M22 is passed to the dot side (FIG. 1) of the secondary winding S via the N-type MOS transistor M21. Flowing. Thereby, extraction of carriers in the transistor Tr1 is started from the base terminal of the transistor Tr1. At this time, carrier extraction by a path through the resistor R and the N-type MOS transistor M23 is also performed.
[0024]
When the carrier in the transistor Tr1 is depleted, the collector terminal-emitter terminal voltage Vce of the transistor Tr1 gradually increases. At timing t3 immediately before the transistor Tr1 is turned off, the Vce detection circuit 13 detects when the collector terminal-emitter terminal voltage Vce has increased to a predetermined value, and outputs a detection signal to the control circuit 12. When the control signal Vg21 is set to L level in response to the input detection signal, the N-type MOS transistor M21 is turned off. Thereby, the carrier extraction in the transistor Tr1 by the path through the body diode D22 and the N-type MOS transistor M21 is stopped, and the carrier extraction by the path through the resistor R and the N-type MOS transistor M23 is continued. Since the impedance of the carrier extraction path through the resistor R and the N-type MOS transistor M23 is made higher by the resistor R than the impedance of the carrier extraction path through the body diode D22 and the N-type MOS transistor M21, The flowing current IB is reduced smaller after the timing t3 than before the timing t3.
[0025]
Limiting the carrier extraction current IB flowing out from the base terminal of the transistor Tr1 after the timing t3 increases the R component of the damping factor of the RLC resonance phenomenon, thereby suppressing voltage oscillation at the base terminal. As a result, the transistor Tr1 is turned off when the voltage Vbe between the base terminal and the emitter terminal gradually decreases, and does not turn on again after turning off.
[0026]
According to the first embodiment described above, the following operational effects can be obtained.
(1) When the transistor Tr1 is turned on, carriers are injected into the transistor T1 using a pulse current in a positive direction (forward bias direction) flowing out from the dot side of the secondary winding S of the transformer T. When the transistor Tr1 is turned off, carriers accumulated in the transistor T1 are extracted using a negative-direction (reverse bias direction) pulse current that flows into the dot side of the secondary winding S of the transformer T. To output a positive pulse current from the secondary winding S, the N-type MOS switch M22 is turned on, the N-type MOS switch M21 is turned off, and half-wave rectification is performed by the body diode D21. In order to output a negative pulse current from the secondary winding S, the N-type MOS switch M21 is turned on, the N-type MOS switch M22 is turned off, and the body diode D22 is rectified. As a result, pulse currents in both positive and negative directions can be output in a time-sharing manner from a pair of transformers T and sub output circuits, so that there are effects of circuit miniaturization and cost reduction.
(2) The state immediately before the transistor Tr1 is turned off (timing t3) is detected by the Vce detection circuit 13 from the rise in the voltage Vce between the collector terminal and the emitter terminal. When the transistor Tr1 is turned off, the carrier in the transistor Tr1 is passed from the base terminal of the transistor Tr1 through a low impedance carrier extraction path (path through the body diode D22 and the N-type MOS transistor M21) from the timing t2 to the timing t3. After timing t3, carriers in the transistor Tr1 are extracted from the base terminal of the transistor Tr1 through a high-impedance carrier extraction path (path through the resistor R and the N-type MOS transistor M23). Therefore, carrier extraction can be quickly performed between timing t2 and timing t3, and after timing t3, the carrier extraction current IB can be suppressed to suppress voltage oscillation at the base terminal of the transistor Tr1. As a result, erroneous turn-on at the time of turn-off can be prevented without increasing the storage time Ts until the transistor Tr1 is turned off.
[0027]
In the carrier extraction path through the resistor R and the N-type MOS transistor M23, the impedance is increased by the resistor R. However, the resistor R may be omitted and the on-resistance of the N-type MOS transistor M23 may be increased. . The on-resistance of the N-type MOS transistor M23 is increased by lowering the voltage value at the H level of the applied control signal Vg23.
[0028]
Instead of detecting the collector terminal-emitter terminal voltage Vce by the Vce detection circuit 13, the collector current may be detected to detect the state immediately before the transistor Tr1 is turned off (timing t3). In this case, a detection signal may be output to the control circuit 12 when the value of the collector current flowing into the collector terminal of the transistor Tr1 becomes a predetermined value or less.
[0029]
Between timing t2 and timing t3, a low-impedance carrier extraction path (path through the body diode D22 and the N-type MOS transistor M21) and a high-impedance carrier extraction path (resistors R and N-type) from the base terminal of the transistor Tr1. The carrier in the transistor Tr1 is extracted through both of the above and the path through the MOS transistor M23. Instead, only a low-impedance carrier extraction path may be used. In this case, only the low-impedance carrier extraction path is turned on from timing t2 to timing t3, and after timing t3, the carrier extraction path is switched so as to turn on only the high-impedance carrier extraction path. Try to pull out the carrier.
[0030]
-Second embodiment-
FIG. 3 is a diagram showing a drive circuit for a current control type semiconductor device according to the second embodiment. In FIG. 3, the same reference numerals as those in FIG. In the second embodiment, the Vce detection circuit 13 is omitted and an IB detection circuit 13B is added as compared with the first embodiment. A control circuit 12B is provided instead of the control circuit 12. The IB detection circuit 13B detects a decrease in the negative current IB flowing out from the base terminal of the transistor Tr1, and outputs a detection signal to the control circuit 12B.
[0031]
FIG. 4 is a timing chart for explaining the operation timing of each part of the drive circuit of FIG. Control signal Vg11 output from the pulse generation circuit 11, voltage V2 induced in the secondary winding S, control signal Vg22 applied to the gate terminal of the N-type MOS transistor M22, applied to the gate terminal of the N-type MOS transistor M23 Control signal Vg23, control signal Vg21 applied to the gate terminal of N-type MOS transistor M21, current IB flowing into the base terminal of transistor Tr1, base terminal-emitter terminal voltage Vbe of transistor Tr1, and collector terminal of transistor Tr1 -Waveforms of the emitter terminal voltage Vce are shown.
[0032]
The timing t1 to the timing t2 are the same as in the case of FIG. At timing t2, when the extraction of carriers starts from the base terminal of the transistor Tr1 and the carriers in the transistor Tr1 are exhausted, the base current IB flowing out from the base terminal of the transistor Tr1 gradually decreases. At timing t3 immediately before the transistor Tr1 is turned off, the IB detection circuit 13B detects that the base current IB has decreased to a predetermined value, and outputs a detection signal to the control circuit 12B. When the control signal Vg21 is set to the L level according to the detection signal input by the control circuit 12B, the N-type MOS transistor M21 is turned off. As a result, the current IB flowing out from the base terminal of the transistor Tr1 is reduced to be smaller after the timing t3 than before the timing t3.
[0033]
As described above, according to the second embodiment, when the transistor Tr1 is turned off, the decrease in the current IB flowing out from the base terminal is detected by the IB detection circuit 13B, so that the state immediately before the transistor Tr1 is turned off (timing). t3) was detected. As a result, similarly to the first embodiment, erroneous turn-on at turn-off can be prevented without increasing the storage time Ts.
[0034]
-Third embodiment-
FIG. 5 is a diagram showing a drive circuit for a current control type semiconductor device according to the third embodiment. In FIG. 5, the same reference numerals as those in FIG. In the third embodiment, the Vce detection circuit 13 is omitted and a Vbe detection circuit 13C is added as compared with the first embodiment. A control circuit 12C is provided instead of the control circuit 12. The Vbe detection circuit 13C detects a decrease in the voltage Vbe between the base terminal and the emitter terminal of the transistor Tr1, and outputs a detection signal to the control circuit 12C.
[0035]
FIG. 6 is a timing chart for explaining the operation timing of each part of the drive circuit of FIG. Control signal Vg11 output from the pulse generation circuit 11, voltage V2 induced in the secondary winding S, control signal Vg22 applied to the gate terminal of the N-type MOS transistor M22, applied to the gate terminal of the N-type MOS transistor M23 Control signal Vg23, control signal Vg21 applied to the gate terminal of the N-type MOS transistor M21, base terminal-emitter terminal voltage Vbe of the transistor Tr1, current IB flowing into the base terminal of the transistor Tr1, and collector terminal of the transistor Tr1 -Waveforms of the emitter terminal voltage Vce are shown.
[0036]
The timing t1 to the timing t2 are the same as in the case of FIG. At timing t2, when the extraction of carriers starts from the base terminal of the transistor Tr1 and the carriers in the transistor Tr1 are exhausted, the base terminal-emitter terminal voltage Vbe of the transistor Tr1 gradually decreases. At timing t3 immediately before the transistor Tr1 is turned off, the Vbe detection circuit 13C detects that the base terminal-emitter terminal voltage Vbe has decreased to a predetermined value, and outputs a detection signal to the control circuit 12C. When the control signal Vg21 is set to L level according to the detection signal input by the control circuit 12C, the N-type MOS transistor M21 is turned off. As a result, the current IB flowing out from the base terminal of the transistor Tr1 is reduced to be smaller after the timing t3 than before the timing t3.
[0037]
As described above, according to the third embodiment, when the transistor Tr1 is turned off, the decrease in the base terminal-emitter terminal voltage Vbe is detected by the Vbe detection circuit 13C, whereby the state immediately before the transistor Tr1 is turned off. (Timing t3) is detected. As a result, similarly to the first embodiment and the second embodiment, erroneous turn-on at the time of turn-off can be prevented without increasing the storage time Ts.
[0038]
The drive circuit according to the present invention is not used only for a general bipolar transistor, but when the carrier is pulled out from the base terminal and turned off, the carrier signal is too fast and the base signal vibrates. It can be applied to semiconductor elements. In particular, the driving method according to the present invention is effective for a semiconductor element in which the operation of a transistor is fast and a surge is likely to occur due to a large temporal change in current.
[0039]
The correspondence between each component in the claims and each component in the embodiment of the invention will be described. The pulse current generating means includes, for example, a pulse generating circuit 11, a DC power source Vs, diodes Ds1 and Ds2, switches SW1 and SW2, and a transformer T. For example, the base terminal corresponds to the control terminal. The first switch means includes, for example, a body diode D21 and an N-type MOS transistor M22. The second switch means is constituted by, for example, a body diode D22 and an N-type MOS transistor M21. The charge corresponds to the carrier. The charge extracting means is constituted by, for example, a resistor R and an N-type MOS transistor M23. The detection means is constituted by, for example, a Vce detection circuit 13 (IB detection circuit 13B or Vbe detection circuit 13C). The main current terminal corresponds to, for example, a collector terminal. In addition, unless the characteristic function of this invention is impaired, each component is not limited to the said structure.
[Brief description of the drawings]
FIG. 1 is a diagram showing a drive circuit of a current control type semiconductor device according to a first embodiment.
FIG. 2 is a timing chart for explaining operation timing of each part of the drive circuit in FIG. 1;
FIG. 3 is a diagram showing a drive circuit of a current control type semiconductor device according to a second embodiment.
4 is a timing chart for explaining the operation timing of each part of the drive circuit of FIG. 3;
FIG. 5 is a diagram showing a drive circuit of a current control type semiconductor device according to a third embodiment.
6 is a timing chart for explaining the operation timing of each part of the drive circuit of FIG. 5;
FIG. 7 is a diagram showing a driving circuit for a current control type semiconductor device according to the prior art.
8 is a timing chart for explaining operation timing of each part of the drive circuit in FIG. 8;
[Explanation of symbols]
11 ... Pulse generation circuit, 12 ... Control circuit,
13 ... Vce detection circuit, 13B ... IB detection circuit,
13C ... Vbe detection circuit, L ... inductive load,
M21 to M23 ... N-type MOS transistor,
Tr1 ... transistor, Vs ... DC power supply

Claims (4)

Pulse current generating means for alternately generating a positive pulse current and a negative pulse current; and
First switch means interposed between the pulse current generating means and a control terminal of a current control type transistor to supply the positive pulsed current to the control terminal;
It is inserted between the pulse current generating means and the control terminal of the current control type transistor, supplies the negative pulsed current to the control terminal, and charges the current control type transistor from the control terminal. A second switch means for pulling out;
Charge extracting means for extracting charges in the current control type transistor from the control terminal of the current control type transistor without passing through the second switch means;
Detecting means for detecting a sign of turn-off of the current controlled transistor;
(1) Instructing the first switch means to supply the positive pulsed current during a period in which the current control type transistor is turned on,
(2) Instructing the second switch means to supply the negative pulse current and extracting the charge and instructing the charge extracting means to extract the charge during a period in which the current control transistor is turned off. And a control circuit for instructing the second switch means to stop supplying the negative pulse current and stopping the extraction of the charge when the sign is detected by the detecting means. Type semiconductor device drive circuit. Pulse current generating means for alternately generating a positive pulse current and a negative pulse current; and
First switch means interposed between the pulse current generating means and a control terminal of a current control type transistor to supply the positive pulsed current to the control terminal;
It is inserted between the pulse current generating means and the control terminal of the current control type transistor, supplies the negative pulsed current to the control terminal, and charges the current control type transistor from the control terminal. A second switch means for pulling out;
A charge extracting means that has a higher impedance than the second switch means and extracts charges in the current control type transistor from the control terminal of the current control type transistor without passing through the second switch means;
Detecting means for detecting a sign of turn-off of the current controlled transistor;
(1) Instructing the first switch means to supply the positive pulsed current during a period in which the current control type transistor is turned on,
(2) Instructing the second switch means to supply the negative pulse current and pulling out the charge during a period in which the current control type transistor is turned off, and when the sign is detected by the detection means, And a control circuit for instructing the second switch means to supply the negative pulse current and to stop the charge extraction, and to instruct the charge extraction means to extract the charge. Type semiconductor device drive circuit. In the current control type semiconductor element drive circuit according to claim 1 or 2,
The drive circuit for a current control type semiconductor element, wherein the detection means detects the sign according to a voltage or a current of a main current terminal of the current control type transistor. In the current control type semiconductor element drive circuit according to claim 1 or 2,
The drive circuit for a current control type semiconductor element, wherein the detection means detects the sign in accordance with a voltage or a current at a control terminal of the current control type transistor.

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