JP3619151B2 - Data processing method using error correction code and apparatus using the method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention is an error correction code generation process effective for recording video data, audio data, computer data, etc. on a medium (for example, an optical disk, a magnetic disk, etc.) or reproducing data recorded on the medium. Regarding the method.
[0002]
The present invention also relates to an error correction code generation processing method that is effective when the above-mentioned video data or the like is transmitted or received.
[0003]
Furthermore, the present invention relates to a recording apparatus, a reproducing apparatus, a transmission apparatus, and a receiving apparatus that employ the above error correction code processing method.
[0004]
In particular, the present invention is characterized by a method of performing error correction processing using a buffer memory when performing error correction code processing.
[0005]
[Prior art]
When video data, audio data, computer data, or the like is recorded on, for example, an optical disk or a magnetic disk, an error correction code is added to the data block. In the error correction code addition process, the data block is temporarily stored in the memory, and an error correction code for the row and column of the data block is generated.
[0006]
An error correction code added to a row is usually referred to as an inner parity, abbreviated as PI, and an error correction code added to a column is usually referred to as an outer parity, abbreviated as PO.
[0007]
[Problems to be solved by the invention]
In the error correction code addition process, when the data block is temporarily stored in the memory before the error correction code is generated, the data on the memory may be partially damaged (error occurs). This is considered to be caused by the data pattern and the memory mounting state. In addition, sudden noise from the outside may have an effect.
[0008]
The error that occurs at this time is called a memory error.
[0009]
In such a case, an error correction code for a data block in which a memory error has occurred (hereinafter referred to as a modified data block) is generated, and this error correction code is added to the modified data block and recorded on a recording medium. .
[0010]
When reproducing the recording medium, the error correction processing circuit executes error correction processing on the modified data block using the error correction code. That is, the modified data block is correctly reproduced. This means that the data block including the memory error has been accurately reproduced. However, the memory error is an error unnecessary for the original data.
[0011]
Therefore, when the above memory error occurs, it is impossible to restore original correct data.
[0012]
Therefore, the present invention provides a data processing method using an error correction code capable of restoring original correct data even when a data error (memory error) occurs in a memory, and a recording employing this method. An object of the present invention is to provide a system or reproduction system apparatus, a transmission system, and a reception system apparatus.
[0013]
[Means for Solving the Problems]
The basic concept of the error correction code processing method of the present invention is as follows.
[0014]
The present invention uses the first memory to generate and add P bytes of the error correction code PI to each row of a data block composed of (M × N) bytes of M rows × N columns,A capacity to store a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes.In the second memory, K pieces of information data blocks to which the error correction code PI is added, which is composed of (M × (N + P)) bytes in M rows × (N + P) columns, are collected, and (K × (M × (N + P))) an error correction product code block (ECC) in which an S byte of an error correction code PO is generated and added to each column of the set information data block using the second memory. ECC block after the error correction processing is performed using the error correction code PI added to each row before the ECC block is read from the second memory and transmitted. Are sequentially transmitted or recorded in a recording medium in the row order.
[0015]
In the present invention,The set information data block includes an error correction code PI in each row of the (K × (M × N)) byte set data block in which K data blocks composed of (M × N) bytes of M rows × N columns are set. The error correction code PO block is a block in which the S byte of the error correction code PO is generated in each column of the set information data block and the block of the error correction code PI. Yes,
The collective information data block of (K × M × (N + P)) bytes to which the error correction code PI is added and the error correction code PO block of (S × (N + P)) bytes are transmitted or read from the recording medium. If you are sent and sent,A capacity to store a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes.Using the second memory, the first error correction process of the error data byte of the aggregate data block is performed by the error correction codes PI and PO, and the data after the first error correction process is performed And moreFirstThen, the error correction processing of the row is performed again by the error correction code PI.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0020]
First, with reference to FIGS. 1 to 8, the configuration of an error correction code adding circuit and an error correction circuit in a data storage / reproducing apparatus will be described using an example of a DVD (digital versatile disk).
[0021]
First, the structure of recorded data on a DVD will be described with reference to FIGS.
[0022]
FIG. 1 is a diagram showing a data processing order for obtaining a physical sector in a DVD. Sectors are called “data sectors”, “recording sectors”, and “physical sectors” according to the stage of signal processing. In the data sector, as shown in FIG. 2, the main data is 2048 bytes, the identification data (ID) is 4 bytes, the ID error detection code (IED) (code for detecting an ID error) is 2 bytes, Rights management information (CPR MAI) includes 6 bytes, and an error detection signal (EDC) (signal for detecting an error in the data sector) includes 4 bytes. Such steps of adding ID, IDE, CPR_MAI, and EDC are steps A1 to A3 in FIG. In step A1, an ID is added to the main data. In step A2, IED is further added. Further, CPR_MAI is added at step A3.
[0023]
Next, the EDC for the main data is calculated, and this EDC is added to the main data. Next, scramble data is added to the main data (2048 bytes) of the data sector (steps A4, A5, A6). Thereafter, 16 scrambled data sectors are aggregated, and a cross-reed-Solomon error correction code is generated and added to the 16 data sectors (step A6). The recording sector is a sector after the ECC is added, and is a data sector to which the error correction code PI and the error correction code PO are added (step A7). The physical sector is a sector after 8/16 modulation in which a synchronization code (SYNC code) is added to the head of every 91 bytes of the recording sector (step A8).
[0024]
Next, the structure of the DVD data sector will be further described with reference to FIG.
[0025]
The data sector is composed of 2064 bytes containing 2048 bytes of main data, that is, 172 bytes × 12 rows. That is, the data sector includes 2048 bytes of main data, 4 bytes of identification data (ID), 2 bytes of ID error detection code (IED), copyright management information (CPR). MAI) includes 6 bytes, and error detection code (EDC) includes 4 bytes.
[0026]
FIG. 3 shows a feedback shift register that generates scrambled data Sk that scrambles the main data (2048 bytes) in step A4. As an initial value for generating the scrambled data Sk, for example, partial data of the data sector ID is used. The scrambled data Sk scrambles the main data (2048 bytes) Dk of the data sector. As a result, the scrambled main data Dk ′ is the result of the exclusive OR operation of Sk (k = 0 to 2047) with respect to Dk.
[0027]
The configuration of the ECC block will be described with reference to FIG.
[0028]
The data block is formed as 172 columns × 192 rows in which 16 data sectors of 172 bytes × 12 rows are collected. A Reed-Solomon error correction code is generated and added to the 172 columns × 192 rows. First, a 16-byte error correction code PO is generated and added to each of 172 columns. Each column of the PO series is composed of 192 bytes + 16 bytes, that is, 208 bytes. Next, a 10-byte error correction code PI is generated and added to all 208 lines including the line of the error correction code PO. One ECC block is 182 columns × 208 rows to which the error correction codes PI, PO are added. Even if the PO and PI generation order is reversed, the same code pattern can be obtained.
[0029]
One column of the ECC block in the vertical direction is called a PO series, and one row in the horizontal direction is called a PI series. One PO sequence is composed of 192 bytes + 16 bytes, that is, 208 bytes, and error correction of a maximum of 8 bytes is possible within one sequence. One PI series is composed of 172 bytes + 10 bytes, that is, 182 bytes, and error correction of a maximum of 5 bytes is possible within one series.
[0030]
Next, the structure of the recording sector will be described with reference to FIGS.
[0031]
For an ECC block having 208 rows × 182 columns, 16 rows constituting the error correction code PO are separated for each row. Each separated row is inserted one by one between every 12 rows of the data portion of 192 rows and rearranged as shown in FIG. This is called PO row interleaving. Therefore, the ECC block after row interleaving is configured by collecting 16 rows of 13 rows × 182 bytes (= data with PI (for 12 rows) + PO (for one row)).
[0032]
As shown in FIG. 5, one recording sector indicates a sector composed of data (12 rows) + PO (1 row) with PI added, that is, (13 rows × 182 bytes). As shown in FIG. 6, the ECC block means that it is composed of 16 recording sectors.
[0033]
The physical sector is a recording sector (2366 bytes) of 13 rows × 182 bytes, in which a synchronization (SYNC) code is added to the head of every 91 bytes of each row, and the modulation is sequentially performed from row 0 to row. A 91-byte data with a SYNC code added to the head is called a SYNC frame. Therefore, the physical sector is composed of 16 sets × 2 SYNC frames.
[0034]
Next, an error correction code adding circuit in the data recording apparatus will be described with reference to FIGS.
[0035]
In FIG. 7, user data transmitted from the host is sequentially stored in the buffer memory 2. The stored user data is processed by the sector information adding unit 202, the EDC generating / adding unit 203, and the scramble unit 204 when being retrieved from the buffer memory 201. This process is performed for each 2048-byte main data and converted into one data sector.
[0036]
The sector information adding means 202 adds identification data (ID) 4 bytes, ID error detection code (IED) 2 bytes, and copyright management information (CPR_MAI) 6 bytes to the main data. The EDC generation / addition unit 203 generates and adds 4 bytes of error detection code (EDC) to a total of 2060 bytes of data, and generates a data sector of 2064 bytes in total. The scramble means 204 scrambles the main data in the data sector.
[0037]
The scrambled data sector is sequentially stored in the ECC memory 205. In the ECC memory 205, a data block of 172 columns × 192 rows in which 16 data sectors of 172 bytes × 12 rows are collected is formed. An error correction code is generated and added by the PI generation / addition means 206 and the PO generation / addition means 207 to the data block of 172 columns × 192 rows. Thereby, one ECC block is formed.
[0038]
As described above, the ECC block is row-interleaved and then transmitted to the modulation / synchronization adding unit 208. Modulation / synchronization adding means 208 converts 8-bit input data into a 16-bit code word for the input row-interleaved ECC block. That is, 8/16 modulation is performed. Next, a SYNC code is added to the head of every 91 bytes of the input data to form a physical sector. The formed physical sector is transmitted as recording data and recorded on the medium.
[0039]
Here, the effect of the error correction code will be described.
[0040]
A data reproduction system including error detection and correction means reproduces recorded data. In the reproduction process, when an error occurs in the reproduced physical sector data, error correction is performed on the ECC block including the error using an error correction code. The error detection and correction means can restore an ECC block that does not contain an original error within the range of the correction capability.
[0041]
Next, an error correction code generation processing method on the data reproduction side will be described with reference to FIG. The reproduction data read from the recording medium is separated from the synchronization code by the synchronization separation / demodulation means 221 and further demodulated with respect to the 8/16 modulation data. As a result, the recording sector is taken out. However, when recording and reproducing recorded data, errors (reproduced signal errors) occur due to disk defects, noise, jitter, crosstalk, etc., and therefore the reproduced data contains errors.
[0042]
The extracted recording sectors are sequentially stored in the ECC memory 205, and an ECC block of 182 columns × 208 rows composed of 16 recording sectors is constructed. An error correction is performed on the ECC block of 182 columns × 208 rows by the PO correction unit 222 and the PI correction unit 223, and the error of the reproduction signal is repaired.
[0043]
The PI correction unit 223 calculates an error pattern detection value syndrome for each row of the ECC block, and performs error correction when an error is detected. The syndrome is 0 when the original data is reproduced without error. When a data error occurs during signal recording or transmission, the syndrome has a value determined by an error position indicating the position where the error has occurred and an error pattern indicating the error state.
[0044]
The PO correction unit 222 takes out the 208-byte data of the PO series from the memory 205 and performs a predetermined calculation. If the syndrome is not 0 by this calculation, error correction of the PO sequence is performed. In this error correction processing, error correction of up to 8 bytes in the sequence is possible with a 16-byte error correction code PO. When error correction is performed on the data to be corrected and the data at the time of error correction code generation is restored, the syndrome is zero. The above operation is performed for all 182 columns of the ECC block.
[0045]
If there is an error of 8 bytes or more for one PO sequence, it is impossible to correct the error by the PO correction means 222. However, even in this case, since the PI correction unit 223 can correct an error of up to 5 bytes for the PI sequence, an error included in one PI sequence is generated when PO correction is performed on the 182 columns. If it is within 5 bytes, the error can be corrected.
[0046]
Further, by repeating PO correction and PI correction, there is a possibility that an error that could not be corrected by one PO correction or PI correction can be corrected. When all the syndromes become 0, error correction of the ECC block ends.
[0047]
The error-corrected ECC block is transmitted to the descrambling means 224. The scramble release means 224 adds the scramble data to the main data 2048 bytes of the scrambled data sector (exclusive OR operation), releases the scramble of the main data, and stores it in the buffer memory 201.
[0048]
The EDC error detection means 225 detects an error in the data sector based on 4 bytes of error detection code (EDC) included in the data sector, and when an error is detected, the sector is reproduced again. Data sectors stored in the buffer memory 201 are sequentially transmitted to the host.
[0049]
By the way, as the buffer memories 205 and 201, DRAM (Dynamic-RAM) with low cost and large capacity is used. However, due to the structure of the DRAM, the data on the memory may rarely be damaged (memory error) depending on the data pattern and the memory mounting state. If part of the data on the memory is damaged (memory error) and the data block is altered, and the error correction codes PI and PO are generated and added, the error correction codes PI and PO are altered by the memory error. This is an error correction code that is correct for the data. If an ECC block having an error correction code generated for the modified data is recorded and reproduced as it is, the modified data is restored even if error correction processing is performed after the reproduction.
[0050]
Here, with reference to FIG. 9, a case where a memory error 32 occurs and a data block is modified with respect to a part of the data block 36 of 172 bytes × 192 rows will be described.
[0051]
First, the error correction code PO is generated and added to the 172 columns by the PO generation and addition means 9, but the error correction code PO33 (16 bytes) in the column 31 is data modified by the memory error 32. Generated based on
[0052]
Next, the PI generation and addition circuit 8 generates and adds a 10-byte error correction code PI to all 208 lines including the error correction code PO. The error correction code PI 36 (10 bytes) generated for the row 34 is generated based on the data modified by the memory error 32.
[0053]
Further, the error correction code PI 37 generated for the 16-line error correction code PO is generated based on data including the error correction code PO 33 generated based on the data modified by the memory error 32. .
[0054]
As a result, a normal error correction code is added to the data block modified by the memory error 32. At this time, the error pattern detection value syndrome of the PI sequence for 208 rows in which error 32 exists and the PO sequence for 182 columns are all 0, and it is considered that there is no error as an ECC block. Actually, the original data is altered by the memory error 32.
[0055]
Here, consider the reproduction data when the ECC block generated based on the modified data block is recorded on the recording medium and reproduced from the recording medium.
[0056]
The reproduced data is subjected to error correction processing using an error correction code. Here, an error occurring in the reproduced data is corrected within the range of the correction capability, and the reproduced data is restored. However, the memory error included before recording cannot be corrected. That is, even if error correction of the PO sequence 31 is performed using the error correction code PO33, the data including the memory error 32 is reproduced and the error correction ends normally, and the original user data cannot be restored. End up.
[0057]
On the playback side, when a memory error occurs in the data on the buffer memory, there is a possibility that the data including the memory error is transmitted to the host as user data.
[0058]
(Points focused on by the present invention)
As described above, when data on the memory is damaged (error occurs), an error correction code is generated based on the data modified due to the memory error and recorded on the recording medium. Even if the correction process is performed, the data modified due to the error is restored, but the original correct data cannot be restored.
[0059]
Further, when data on the memory after error correction is damaged (error occurs) during reproduction, there is a possibility that the incorrect data is transmitted to the host.
[0060]
In order to prevent data corruption (error occurrence) on the memory, it is necessary to realize a memory for storing data with a memory having a structure that does not cause data corruption, such as an S-RAM. It is not preferable.
[0061]
Therefore, in the present invention, even when an error occurs in the memory, an error correction code generation processing method, an apparatus, and a recording method using the error correction code generation processing can be performed without losing the original data. An apparatus, a reproduction apparatus, a transmission apparatus, and a reception apparatus are provided.
[0062]
(Basic concept of the present invention)
The error correction code generation processing method according to the present invention includes a sector memory (for example, composed of SRAM), PI generation and addition means for generating and adding PI, a buffer memory for storing data to which PI is added, PO PO generation and addition means for generating and adding data, a row memory (for example, composed of SRAM), PI correction means for performing PI correction, and PO correction means for performing PO correction,
An error correction code PI is added to the data using the sector memory, the PI additional data is stored in the buffer memory, and the PI additional data from the buffer memory is transmitted or recorded on the recording medium. Before, PI correction is performed using the row memory, thereby making it possible to repair a memory error.
[0063]
On the playback side with respect to the above processing, it is possible to repair the memory error by performing the PI correction again before transmitting the data to the host.
[0064]
The present invention also includes the sector memory, PI generation and addition means, buffer memory, PO generation and addition means, PI correction means, and PO correction means,
An error correction code PI is added to the data using the sector memory to generate an information data block (PI additional data), the PI additional data is stored in a buffer memory, and the PI additional data is transmitted or recorded on a recording medium. PI correction is previously performed using the buffer memory, thereby making it possible to repair a memory error.
[0065]
The present invention also includes the PI generation and addition means, buffer memory, PO generation and addition means, row memory, PI correction means, and PO correction means, and uses the data before storing in the buffer memory. Before generating a correction code PI, generating an information data block (PI additional data) obtained by adding an error correction code PI to the data, storing it in a buffer memory, and transmitting or recording the PI additional data from the buffer memory By performing the PI correction using the row memory, it is possible to repair the memory error.
[0066]
The present invention also comprises the sector memory, PI generation / addition means, buffer memory, PO generation / addition means, PI correction means, and PO correction means, and error correction is performed on data using the sector memory. An information data block (PI additional data) is generated by adding a code PI, the PI additional data is stored in a buffer memory, and the PI additional data from the buffer memory is transmitted or recorded, and then transmitted to the host computer on the playback side. A memory error can be repaired by performing a PI correction on the PI additional data before.
[0067]
Hereinafter, specific examples of features of the present invention will be described in detail with reference to the drawings.
[0068]
First, an error correction code adding circuit in the data recording apparatus according to the first embodiment of the present invention will be described with reference to FIG. User data (main data) transmitted from the host is sequentially stored in the sector memory 1. At this time, the sector information adding means 5 adds 4 bytes of identification data (ID), 2 bytes of ID error detection code (IED), and 6 bytes of copyright management information (CPR_MAI) to 2048 bytes of main data. The EDC generation / addition means 6 generates and adds 4 bytes of error detection code (EDC) to a total of 2060 bytes of data including ID, IED, and CPR_MAI. The scramble means 7 adds the scramble data to the main data 2048 bytes (exclusive OR operation) to generate a scrambled data sector.
[0069]
The PI generation / addition means 8 generates an error correction code PI (10 bytes) for each row (172 bytes) of the scrambled data sector (or data block) (172 bytes × 12 rows) stored in the sector memory 1. Is generated and added. As a result, a data sector (information data block) to which PI of 182 bytes × 12 rows is added is generated.
[0070]
The sector memory 1 has a capacity capable of storing the data sector (182 bytes × 12 rows) added by the PI, and is composed of, for example, an SRAM (Static-RAM). The SRAM has an extremely low structure error due to its structure, and the error correction code PI generated using the sector memory 1 is a correct code generated for error-free user data. Can be compensated.
[0071]
PI additional data (or may be referred to as an information data block of 182 bytes × 12 rows) from the sector memory 1 is sequentially stored in the buffer memory 2. In the buffer memory 2, 16 data sectors (PI additional data) of 182 bytes × 12 rows are aggregated, and aggregated PI additional data (or aggregate information data block) of 182 bytes × 192 rows is constructed.
[0072]
Here, the PO generation and addition means 9 generates an error correction code PO (16 bytes) for each column (192 bytes) of the set information data block (182 bytes × 192 rows) stored in the buffer memory 2. To add. As a result, an ECC block in which the error correction codes PI and PO are added to the set information data block stored in the buffer memory 2 is constructed.
[0073]
Since the buffer memory 2 has a function of accumulating data transmitted from the host computer until it is recorded on a recording medium, the buffer memory 2 has a sufficient capacity to store a plurality of ECC blocks, and is configured by, for example, a DRAM. In a DRAM, data on a memory may be rarely damaged depending on a data pattern or a memory mounting state. A so-called memory error may occur. However, this memory error is eliminated as described later according to the data processing method of the present invention.
[0074]
The ECC block in the buffer memory 2 is read out row by row (182 bytes) and stored in the row memory 3. The PI correction means 10 performs PI correction processing using the row memory 3. Here, the previous memory error is corrected and restored to the original data (normal ECC block). The row memory 3 is composed of, for example, SRAM, and has a capacity capable of storing one row (182 bytes) of the PI series.
[0075]
The row data output from the row memory 3 is sequentially sent to the modulation / synchronization adding means 4, 8/16 modulation and a synchronization code are added, and output as recording data to the recording medium.
[0076]
FIG. 11 shows a state in which an error (error 42 caused by the above-described memory error or external noise) has occurred in a part of the ECC block data output from the buffer memory 2.
[0077]
In the present invention, the error correction code PI is generated using the sector memory 1 before data is stored in the buffer memory. Accordingly, the error correction code PI is an error correction code based on the original data over the entire 192 lines including the line 42. That is, the error correction code PI in FIG. 11 is an error correction code created for data in which no error 42 exists.
[0078]
On the other hand, the PO generation and addition means 9 generates an error correction code PO based on the data of each column (192 bytes) in combination with the buffer memory 2. Therefore, the error correction code PO44 (16 bytes) for the column 41 is an error correction code created based on the data including the memory error 42.
[0079]
In the product code, even if the error correction code portion 48 for the error correction code first generates and adds the code PI and then generates and adds the code PO, the code PO is generated and added first, Even if the code PI is generated and added, the same code pattern can be obtained.
[0080]
Here, the error correction code PI is a correct error correction code added to the original data before the occurrence of the error. Therefore, the error correction code PO generated and added to the block of the error correction code PI can be said to be a correct error correction code based on the original data. Further, the error correction code PO added to the other columns (171) excluding the column 41 in the 172 columns shown in FIG. 11 can also be said to be a correct error correction code.
[0081]
When such an ECC block is read from the buffer memory 2 in the row order and subjected to the PI correction processing in the row memory 3, the error 42 in the row 45 is easily PI corrected. That is, the correct data row 45 is restored. In addition, each PO line created for data including the error 42 is also corrected to a correct PO system by performing PI correction. That is, 1 byte 43 is corrected by performing PI correction on the row 46. Similarly, other rows (the positions indicated by triangles in the figure) are also corrected, and a correct PO system is generated.
[0082]
The above processing has been described on the assumption that the PI correction processing is performed on all the rows of the ECC block in the row memory 3. However, the present invention is not limited to this, and the PI correction process may be performed only on each row at the position of the triangle mark in the drawing in order to shorten the processing time. This is because the memory error 42 can be easily corrected later if the PO system at the position of the triangle mark in the figure is correct and an error correction code.
[0083]
In the above description, the PO block is described using the ECC block in which the row is not distributed line by line in the aggregate data block. However, in the actual ECC block, as described with reference to FIGS. 1 and 6, the error correction code PO is distributed line by line in the aggregate data block.
[0084]
FIG. 12 shows reproducing means for reproducing an ECC block obtained by the above-described processing (processing by the circuit shown in FIG. 10) from a recording medium and performing error correction processing on the ECC block.
[0085]
The reproduction data read from the recording medium by the optical head is introduced into the synchronization separation / demodulation means 11. This synchronization detection / demodulation means 11 performs synchronization detection and demodulation of 8/16 modulation from reproduced data. Thereby, a recording sector is obtained. However, when data is recorded on and reproduced from the recording medium, an error occurs in the data due to a scratch or noise on the disk, and therefore the data in the recording sector may include an error.
[0086]
The extracted recording sectors are sequentially stored in the buffer memory 2, and 16 recording sectors are assembled, and an ECC block of 182 columns × 208 rows is formed in the buffer memory 2. The PO correction unit 14 and the PI correction unit 10 perform error correction on the ECC block of 182 columns × 208 rows.
[0087]
Here, it is effective to perform the PI correction process on the PO block prior to the PO correction process. This is because a correct error correction code PO can be restored by PI correction even if a memory error occurs in the PO block.
[0088]
The error-corrected ECC block is read from the buffer memory 2 in one row (182 bytes) in the order of data transmission and stored in the sector memory 1. Here, the PI correction means 10 performs PI correction on 172 bytes of each row using the sector memory 1. This is effective for correcting an error when a memory error occurs in the buffer memory 2 when PO correction is performed.
[0089]
Next, the descrambling means 13 converts the scrambled data (exclusive OR operation) with respect to the main data (2048 bytes) of the scrambled data sector, and generates a pre-scrambled data sector. Further, the EDC error detection means 12 detects an error in the data sector using an error detection code (EDC) 4 bytes included in the data sector. When it is detected that there is no error in the data sector, the data sector is transmitted to the host.
[0090]
In the above description, when data is stored in the sector memory 1 from the buffer memory 2, the PI correction means 10 performs the PI correction. However, this PI correction may be performed only when an error is detected by the EDC.
[0091]
Further, only a part of the detection value syndrome (10 bytes) of the error pattern of each row may be calculated to perform error detection, and PI correction may be executed only when it is determined that there is an error. In other words, error correction processing by the error correction code PI is performed by calculating only a part (R byte, R <P) of the error pattern detection value (P byte) obtained from the P byte of the error correction code PI. The correction process is executed only when it is determined that there is an error.
[0092]
FIG. 13 shows still another embodiment of the present invention.
[0093]
In this embodiment, the row memory 3 shown in the embodiment of FIG. 10 is omitted. In the embodiment of FIG. 13, the PI correction means 10 performs PI correction using the buffer memory 2. Other configurations are the same as those of the embodiment shown in FIG. When a memory error occurs, the error correction code PO generated by the PO generation and addition means 9 becomes an error correction code having data including the memory error as original data. However, PI correction is performed on all the rows of the error correction code PO, and the error correction code PO having the data including the memory error as the original data is the error correction code having the original data as the original data. Restored to PO.
[0094]
In this embodiment, since the ECC block after PI correction exists in the buffer memory 2, there is a possibility that a memory error is included. However, since the error correction code PO is once restored to an error correction code having original data as original data, even if a memory error is included, the error is corrected by PO correction at the time of reproduction. Become.
[0095]
FIG. 14 shows still another embodiment of the present invention.
[0096]
User data from the host computer is converted by the sector information adding means 15 into one data sector for each 2048-byte main data.
[0097]
The sector information adding means 15 adds identification data (ID) 4 bytes, ID error detection code (IED) 2 bytes, and copyright management information (CPR_MAI) 6 bytes to the main data. The EDC generation / addition means 16 generates and adds 4 bytes of error detection code (EDC) to a total of 2060 bytes of data to generate a data sector of 2064 bytes in total. The scramble means 17 scrambles the main data in the data sector.
[0098]
The scrambled data sector is sequentially stored in the buffer memory 2. In the buffer memory 2, a data block of 172 columns × 192 rows is formed, in which 16 data sectors of 172 bytes × 12 rows are collected.
[0099]
The PI generation and addition means 18 receives the data sector from the scramble means 17, and sequentially generates a 10-byte error correction code PI for each row (172 bytes) of data and supplies it to the buffer memory 2. As a result, a data block with PI of 182 bytes × 192 rows is constructed in the buffer memory 2. The error correction code PI at this time is an error correction code having original data as original data. Since other parts are the same as those of the embodiment described above, the description thereof is omitted.
[0100]
FIG. 15 shows an example of an error correction circuit corresponding to the above error correction code generation circuit.
[0101]
This embodiment is almost the same as the embodiment shown in FIG. 12 except that the output of the buffer memory 2 is given to the row memory 3. For the ECC block of the buffer memory 2, the PI correction unit 10 performs error correction on a row including at least PO using the buffer memory 2. As a result, the error correction code PO becomes a correct error correction code. Next, PO correction processing is performed by the PO correction means 14. The data after the PO correction processing is supplied to the row memory 3 for each row in the order of transmission. The PI correction means 10 performs PI correction using this row memory 3. As a result, even if a memory error occurs in the buffer memory 2 during PO correction, this is corrected in the row memory 3.
[0102]
The data output from the row memory 3 is descrambled by the descrambling means 13 to become a data sector, and the EDC error detecting means 12 performs error detection on this data sector.
[0103]
FIG. 16 shows still another embodiment of the present invention.
[0104]
Compared with the embodiment of FIG. 13, the PI correction means 10 using the buffer memory 2 is omitted. Other parts are the same as those of the embodiment of FIG. In this embodiment, when error correction of the ECC block constructed in the buffer memory 2 is performed in the reproduction system, PI correction is performed by the PI correction means 10 before PO correction.
[0105]
As described above, the present invention is effective for a signal transmission / recording and reproducing apparatus that can perform error correction code generation processing without losing original data even when an error occurs in a memory. In addition, according to the present invention, it is possible to record on a recording medium without losing the original data even if the occurrence rate of memory error is given instead of simplifying the defect inspection of the buffer memory and increasing the yield. The present invention is effective when employed in various signal transmission / recording and reproducing apparatuses. The transmission / reception system can be applied to various devices in the digital communication field. A wireless device such as a cellular phone, a transmission / reception terminal between computers, a television transmission / reception device, and the like. In the field of recording / reproducing systems, the present invention is effectively applied to DVD devices, CD devices, and memory devices that employ communication functions.
[0106]
【The invention's effect】
As described above, the present invention is a data processing method using an error correction code that can restore original correct data even when a data error (memory error) occurs in the memory. Recording system or reproducing system apparatus, transmission system and receiving system apparatus can be provided.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram showing a data processing procedure until a physical sector in a DVD is obtained.
FIG. 2 is an explanatory diagram showing the structure of a data sector in a DVD.
FIG. 3 is an explanatory diagram of a feedback shift register that generates scrambled data.
FIG. 4 is an explanatory diagram showing an ECC block.
FIG. 5 is an explanatory diagram showing a recording sector.
FIG. 6 is an explanatory diagram showing an ECC block in which an error correction code PO is interleaved.
FIG. 7 is a block diagram for explaining an error correction code generation method in a recording system of a conventional recording / reproducing apparatus.
FIG. 8 is a block diagram for explaining an error correction processing method in a reproducing system of a conventional recording / reproducing apparatus.
FIG. 9 is a diagram for explaining error correction codes when a DRAM memory error occurs in a conventional recording / reproducing apparatus.
FIG. 10 is a block diagram of a recording system shown to explain one embodiment of an error correction code generation method according to the present invention.
FIG. 11 is an explanatory diagram for explaining the data structure of an ECC block obtained by the error correction code generation method according to the present invention.
FIG. 12 is a block diagram of a reproduction system shown to explain one embodiment of a method for performing error correction on an ECC block obtained by the error correction code generation method according to the present invention.
FIG. 13 is a block diagram of a recording system shown to explain another embodiment of the error correction code generation method according to the present invention.
FIG. 14 is a block diagram of a recording system shown to explain another embodiment of the error correction code generation method according to the present invention.
FIG. 15 is a block diagram of a reproduction system shown to explain another embodiment of a method for performing error correction on an ECC block obtained by the error correction code generation method according to the present invention.
FIG. 16 is a block diagram of a recording and reproducing system shown to explain an embodiment adopting an error correction code generation method according to the present invention and an error correction method for performing error correction using an error correction code.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Sector memory, 2 ... Buffer memory, 3 ... Row memory, 4 ... Modulation / synchronization addition means, 5 ... Sector information addition means, 6 ... EDC production | generation and addition means, 7 ... Scramble means, 8 ... PI production | generation and addition means , 9 ... PO generation and addition means, 10 ... PI correction means, 11 ... Synchronization separation / demodulation means, 12 ... EDC error detection means, 13 ... Scramble release means, 14 ... PO correction means.

Claims (27)

Using the first memory, generating and adding P bytes of the error correction code PI to each row of a data block composed of (M × N) bytes of M rows × N columns,
In a second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes, M rows × (N + P) columns (M × (N + P)) bytes of information data blocks to which the error correction code PI is added are aggregated into K (K × (M × (N + P))) byte aggregate information data blocks,
Using the second memory, an error correction product code block (ECC block) in which an S byte of the error correction code PO is generated and added to each column of the set information data block,
Before the ECC block is read from the second memory and transmitted, error correction processing is performed using the error correction code PI added to each row,
A data processing method using an error correction code, wherein the ECC block after the error correction processing is sequentially transmitted in a row order or recorded on a recording medium. Using the first memory, generating and adding P bytes of the error correction code PI to each row of a data block composed of (M × N) bytes of M rows × N columns,
In a second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes, M rows × (N + P) columns A set of (M × (N + P)) bytes of information data blocks to which an error correction code PI has been added is assembled into a set information data block of (K × (M × (N + P))) bytes.
Using the second memory to generate and add (S = K × Q) bytes of the error correction code PO to each column of the set information data block;
Each information data block is composed of information data and an error correction code by distributing the error correction code PO to K information data blocks to which the error correction code PI is added every Q bytes. Configure an error correction product code block (ECC block) configured to be a constant value (M + Q) × (N + P) bytes,
Before the ECC block is read from the second memory and transmitted, error correction processing is performed using the error correction code PI added to each row,
A data processing method using an error correction code, wherein the ECC block after the error correction processing is sequentially transmitted in a row order or recorded on a recording medium. When generating and adding an error correction code PI to each row of a data block composed of M rows × N rows (N × N) bytes,
A first process of receiving data of each row (N bytes) from the host computer and sequentially storing the transmitted N bytes of data in the first memory, and the transmitted N in parallel with the first process A second process of generating P bytes of the error correction code PI of each row based on the byte data and sequentially storing the generated P byte error correction code PI in the first memory; An information data block to which a PI error correction code composed of (M × (N + P)) bytes in a row × (N + P) column is added is generated,
In a second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes, M rows × (N + P) columns The information data blocks to which the error correction code PI composed of (M × (N + P)) bytes is added are aggregated into a set information data block of (K × (M × (N + P))) bytes,
Using the second memory, an error correction product code block (ECC block) in which an S byte of the error correction code PO is generated and added to each column of the set information data block,
Before the ECC block is read from the second memory and transmitted, error correction processing is performed using the error correction code PI added to each row,
A data processing method using an error correction code, wherein the ECC block after the error correction processing is sequentially transmitted in a row order or recorded on a recording medium. In any of claims 1 or 2 or 3
A data processing method using an error correction code, wherein when an error correction process is performed on the ECC block using the error correction code PI, only the row of the error correction code PO is performed. In any of claims 1 or 2 or 3
Sequentially reading each row of the ECC block from the second memory and storing it in a third memory;
When error correction processing is performed on the unit block stored in the third memory using the error correction code PI, each row of the data block stored in the third memory or the row of the error correction code PO is stored. Only one of them is error-corrected,
A data processing method using an error correction code, wherein the unit blocks after the error correction processing are sequentially transmitted or recorded on a recording medium in a row order. The set information data block includes an error correction code PI in each row of the (K × (M × N)) byte set data block in which K data blocks composed of (M × N) bytes of M rows × N columns are set. The error correction code PO block is a block in which the S byte of the error correction code PO is generated in each column of the set information data block and the block of the error correction code PI. Yes,
The collective information data block of (K × M × (N + P)) bytes to which the error correction code PI is added and the error correction code PO block of (S × (N + P)) bytes are transmitted or read from the recording medium. If you are sent and sent,
Using a second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes, the error correction code PI And PO, the first error correction processing of the error data bytes of the aggregate data block,
An error, wherein the data after the first error correction processing is further subjected to error correction processing for a row by the error correction code PI again using a first memory. A data processing method using a correction code. The ECC block generates and adds P bytes of the error correction code PI to each row of a data block composed of (M × N) bytes of M rows × N columns, and (M × N) of M rows × (N + P) columns. (K) (N + P)) bytes of information data blocks to which the error correction code PI is added are assembled into a set information data block of (K × (M × (N + P))) bytes, and the set information data block (S = K × Q) bytes of the error correction code PO are generated and added to each column, and each of the K information data blocks is added with the error correction code PI added to the error correction code PO every Q bytes. Each information data block is an ECC block configured by information data and an error correction code, and configured to be a constant value (M + Q) × (N + P) bytes.
Using the second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes, the error correction code PI and After performing the first error correction processing of the error data byte of the data block by PO,
An error, wherein the data after the first error correction processing is further subjected to error correction processing for a row by the error correction code PI again using a first memory. A data processing method using a correction code. In claim 6 or 7,
In the error correction processing using the first memory, when data is read from the second memory, it is determined that an error exists in the data block by an error detection code (EDC) added to the data block. A data processing method using an error correction code, which is executed only when it is executed. Using the first memory, P bytes of the error correction code PI are generated and added to each row of a data block composed of (M × N) bytes of M rows × N columns to form an information data block,
A second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) obtained by adding an error correction code to a data block composed of (M × N) bytes has M rows × (N + P) columns. K pieces of the information data blocks to which the error correction code PI is added, which is composed of (M × (N + P)) bytes, are set as a set information data block of (K × (M × (N + P))) bytes, Using the second memory, an error correction product code block (ECC block) in which an S byte of the error correction code PO is generated and added to each column of the set information data block,
Before the ECC block is read from the second memory and transmitted, a first error correction process is performed using the error correction code PI added to each row,
The ECC block after the first error correction processing is sequentially transmitted or recorded on a recording medium in a row order,
If the ECC block after the first error correction came been sent is read out from the transmission or recording medium, using the third memory by the error correction code PI and PO, the data block Perform a second error correction process on the error data byte,
A third error correction process is performed again on the data after the second error correction process using the error correction code PI using a fourth memory. A data processing method using an error correction code. Using the first memory, P bytes of the error correction code PI are generated and added to each row of a data block composed of (M × N) bytes of M rows × N columns to form an aggregate data block,
A second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) obtained by adding an error correction code to a data block composed of (M × N) bytes has M rows × (N + P) columns. K pieces of the information data blocks to which the error correction code PI is added, which is composed of (M × (N + P)) bytes, are set as a set information data block of (K × (M × (N + P))) bytes, Using the second memory to generate and add (S = K × Q) bytes of the error correction code PO to each column of the set information data block;
Each information data block is composed of a data block and an error correction code by distributing the error correction code PO to each of K information data blocks to which the error correction code PI is added every Q bytes. Configure an error correction product code block (ECC block) configured to be a constant value (M + Q) × (N + P) bytes,
Before the ECC block is read from the second memory and transmitted, a first error correction process is performed using the error correction code PI added to each row,
The ECC block after the first error correction processing is sequentially transmitted or recorded on a recording medium in a row order,
When the ECC block after the error correction processing is transmitted or read from the recording medium and sent, an error data byte of the data block is transmitted by the error correction codes PI and PO using a third memory. The second error correction process of
An error characterized in that the third error correction process is performed again on the data after the second error correction process by the error correction code PI using a fourth memory. A data processing method using a correction code. 11. The data processing method using an error correction code according to claim 9, wherein the first and fourth memories are SRAMs (Static-RAM) . In any one of Claims 9 and 10,
In the first and second error correction processes using the error correction code PI, only a part (R byte, R <P) of the error pattern detection value (P byte) obtained from the P byte of the error correction code PI is used. A data processing method using an error correction code, characterized in that a correction process is executed only when an error is detected by calculation and it is determined that there is an error. When data with an error correction code added is transmitted or recorded on a recording medium, the data with the error correction code added is obtained using the data processing method according to any one of claims 1, 2, and 3. A data processing apparatus. When the data to which the error correction code is added is transmitted or read out from the recording medium and sent, the output data corrected by using the data processing method according to claim 6 or 7 is obtained. A data processing apparatus. When the data to which the error correction code is added is transmitted or recorded on the recording medium, and the data to which the error correction code is added is read from the transmission or the recording medium and sent, A data processing apparatus characterized by using the data processing method according to any one of 10 to obtain data to which the error correction code is added and to obtain error-corrected output data . Means for generating and adding P bytes of the error correction code PI to each row of a data block composed of (M × N) bytes of M rows × N columns using the first memory;
In a second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes, M rows × (N + P) columns A set of (M × (N + P)) bytes of information data blocks to which the error correction code PI is added is aggregated to obtain a set information data block of (K × (M × (N + P))) bytes. Means,
Means for using the second memory to obtain an error correction product code block (ECC block) in which an S byte of the error correction code PO is generated and added to each column of the set information data block;
Means for performing error correction processing using an error correction code PI added to each row before the ECC block is read from the second memory and transmitted;
Means for sequentially transmitting or recording the ECC blocks after the error correction processing in a row order or on a recording medium;
A data processing apparatus using an error correction code , comprising: Means for generating and adding P bytes of the error correction code PI to each row of a data block composed of (M × N) bytes of M rows × N columns using the first memory;
In a second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes, M rows × (N + P) columns Means for obtaining a set information data block of (K × (M × (N + P))) by collecting K pieces of information data blocks to which an error correction code PI is added, composed of (M × (N + P)) bytes When,
Means for generating and adding (S = K × Q) bytes of the error correction code PO to each column of the set information data block using the second memory;
Each information data block is composed of information data and an error correction code by distributing the error correction code PO to K information data blocks to which the error correction code PI is added every Q bytes. Means for configuring an error correction product code block (ECC block) configured to be a constant value (M + Q) × (N + P) bytes ;
Means for performing an error correction process using the error correction code PI added to each row before the ECC block is read from the second memory and transmitted;
Means for sequentially transmitting or recording the ECC blocks after the error correction processing in a row order or on a recording medium;
A data processing apparatus using an error correction code , comprising: When generating and adding an error correction code PI to each row of a data block composed of (M × N) bytes of M rows × N rows,
It receives data of each line from the host computer (N bytes), a first process of storing the data of N bytes transmitted in the order as soon as the first memory, in parallel with the first process, the transmitted N A P-byte of the error correction code PI for each row is generated based on the byte data, and a second process of sequentially storing the generated P-byte error correction code PI in the first memory is performed. Means for generating an information data block to which a PI error correction code composed of (M × (N + P)) bytes in a × (N × P) sequence is added;
In a second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes, M rows × (N + P) columns Means for obtaining a set information data block of (K × (M × (N + P)) bytes by assembling K information data blocks to which an error correction code PI composed of (M × (N + P)) bytes is added When,
Means for using the second memory to obtain an error correction product code block (ECC block) in which an S byte of the error correction code PO is generated and added to each column of the set information data block;
Means for performing error correction processing using an error correction code PI added to each row before the ECC block is read from the second memory and transmitted;
Means for sequentially transmitting or recording the ECC blocks after the error correction processing in a row order or on a recording medium;
A data processing apparatus using an error correction code , comprising: In any of claims 16 or 17 or 18
A data processing apparatus using an error correction code , wherein when an error correction process is performed on the ECC block using the error correction code PI, only the row of the error correction code PO is performed . In any of claims 16 or 17 or 18
Means for sequentially reading out each row of the ECC block from the second memory and storing it in a third memory;
When error correction processing is performed on the unit block stored in the third memory using the error correction code PI, each row of the data block stored in the third memory or the row of the error correction code PO is stored. Means for performing error correction on only one of them,
Means for sequentially transmitting the unit blocks after the error correction processing or recording them on a recording medium in a row order;
A data processing apparatus using an error correction code , comprising: The set information data block includes an error correction code PI in each row of the (K × (M × N)) byte set data block in which K data blocks composed of (M × N) bytes of M rows × N columns are set. The error correction code PO block is a block in which the S byte of the error correction code PO is generated in each column of the set information data block and the block of the error correction code PI. Yes,
The error correction code PI is added (K × M × (N + P)) and) the set information data blocks of bytes, (S × (N + P )) bytes error-correcting code PO block and the transmission walked recording medium When it is read and sent from
Using a second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes, the error correction code PI And a means for performing a first error correction process of error data bytes of the aggregate data block by means of PO and PO ;
Means for performing error correction processing on the data after performing the first error correction processing by using the first memory and again by the error correction code PI using the first memory;
A data processing apparatus using an error correction code , comprising: The ECC block generates and adds P bytes of the error correction code PI to each row of a data block composed of (M × N) bytes of M rows × N columns, and (M × N) of M rows × (N + P) columns. (K) (N + P)) bytes of information data blocks to which the error correction code PI is added are assembled into a set information data block of (K × (M × (N + P))) bytes, and the set information data block (S = K × Q) bytes of the error correction code PO are generated and added to each column, and each of the K information data blocks is added with the error correction code PI added to the error correction code PO every Q bytes. Each information data block is an ECC block configured by information data and an error correction code, and configured to be a constant value (M + Q) × (N + P) bytes.
The set information data block includes an error correction code PI in each row of the (K × (M × N)) byte set data block in which K data blocks composed of (M × N) bytes of M rows × N columns are set. The error correction code PO block is a block in which the S byte of the error correction code PO is generated in each column of the set information data block and the block of the error correction code PI. Yes,
When the error correction product code block (ECC block) is transmitted or read out from a recording medium,
Using the second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) in which an error correction code is added to the data block composed of (M × N) bytes, the error correction code PI and Means for performing a first error correction process of error data bytes of said data block by PO;
Wherein the first error correction processing data after using further a first memory, again by the error correction code PI, means for performing error correction processing of the line
A data processing apparatus using an error correction code , comprising: In claim 21 or 22,
In the error correction processing using the first memory, when data is read from the second memory, it is determined that an error exists in the data block by an error detection code (EDC) added to the data block. A data processing apparatus using an error correction code, which is executed only when it is executed . Using a first memory means for obtaining the M rows × N columns of (M × N) bytes in a data block composed, each row generates and adds the P-byte error-correcting code PI data block,
A second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) obtained by adding an error correction code to a data block composed of (M × N) bytes has M rows × (N + P) columns. The information data blocks to which the error correction code PI is added and composed of (M × (N + P)) bytes are aggregated to obtain a set information data block of (K × (M × (N + P))) bytes. Means,
Means for using the second memory to obtain an error correction product code block (ECC block) in which an S byte of the error correction code PO is generated and added to each column of the set information data block;
Means for performing a first error correction process using an error correction code PI added to each row before the ECC block is read from the second memory and transmitted ;
Means for sequentially transmitting or recording the ECC block after the first error correction processing in a row order or on a recording medium;
When the ECC block after the error correction processing is transmitted or read from the recording medium and sent, the error data of the data block is transmitted by the error correction codes PI and PO using the third memory. Means for performing a second error correction process of the bytes;
Means for performing a third error correction process again on the data after the second error correction process using the error correction code PI again using a fourth memory;
A data processing apparatus using an error correction code , comprising: Using a first memory means for obtaining the M rows × N columns of (M × N) data block composed in byte, the aggregate data block by generating and attaching a P-byte error-correcting code PI in each row ,
A second memory having a capacity for storing a plurality of error correction product code blocks (ECC blocks) obtained by adding an error correction code to a data block composed of (M × N) bytes has M rows × (N + P) columns. The information data blocks to which the error correction code PI is added and composed of (M × (N + P)) bytes are aggregated to obtain a set information data block of (K × (M × (N + P))) bytes. Means,
Means for generating and adding (S = K × Q) bytes of the error correction code PO to each column of the set information data block using the second memory;
Each information data block is composed of a data block and an error correction code by distributing the error correction code PO to each of K information data blocks to which the error correction code PI is added every Q bytes. Means for configuring an error correction product code block (ECC block) configured to be a constant value (M + Q) × (N + P) bytes;
Means for performing a first error correction process using the error correction code PI added to each row before the ECC block is read from the second memory and transmitted;
Means for sequentially transmitting or recording the ECC block after the first error correction processing in a row order or on a recording medium;
When the ECC block after the first error correction processing is transmitted or read from a recording medium and sent, the data block is transmitted by the error correction codes PI and PO using the third memory. Means for performing a second error correction process on the error data bytes of
Means for performing a third error correction process on the data after the second error correction process using the error correction code PI again using a fourth memory;
A data processing apparatus using an error correction code , comprising: 24. The data processing apparatus using an error correction code according to any one of 24 and 25, wherein the first and fourth memories are SRAMs (Static-RAM) . In either 24 or 25
The means for performing error correction processing using the error correction code PI calculates only a part (R byte, R <P) of the error pattern detection value (P byte) obtained from the P byte of the error correction code PI. A data processing method using an error correction code, wherein error correction is performed and correction processing is executed only when it is determined that there is an error.

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