JP3618105B2 - Manufacturing method of semiconductor substrate - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to semiconductor substrate defect reduction, and more particularly to gettering processing of a composite semiconductor substrate in which a plurality of substrates are bonded.
[0002]
[Prior art]
In order to improve the characteristics of the semiconductor element, so-called gettering is important, in which contaminant impurities generated in the manufacturing process are collected outside the element operation region and the adverse effects thereof are eliminated.
[0003]
Conventionally, as a gettering method for a semiconductor substrate, for example, an extrinsic gettering (EG) method in which a strained layer is formed on the back surface of the semiconductor substrate by sandblasting, high-concentration phosphorous diffusion, or polysilicon deposition to obtain a getter sink, silicon There is an intrinsic gettering (IG) method in which oxygen contained in a crystal is precipitated by heat treatment to form a high-density defect layer inside a substrate to obtain a getter sink. When this EG method and the IG method are compared, the IG method is superior in the sustainability of the gettering ability.
[0004]
On the other hand, as a technique for forming a gettering region in a composite semiconductor substrate in which a plurality of substrates are bonded, for example, a method disclosed in Japanese Patent Application Laid-Open No. 63-29937 is known. In this method, a high-density defect region is formed in advance on a semiconductor substrate to be a support substrate, and then directly bonded to another semiconductor substrate on which an element is formed, thereby obtaining a composite semiconductor having a gettering function.
[0005]
[Problems to be solved by the invention]
However, since the interstitial oxygen concentration is reduced in the semiconductor substrate in which the high-density defect region is formed, the mechanical strength of the semiconductor substrate is lowered and the semiconductor substrate is easily warped. For this reason, in the method disclosed in Japanese Patent Laid-Open No. 63-29937, voids or the like may occur due to the warpage of the substrates when the semiconductor substrates are joined. In particular, when the diameter of the semiconductor substrate is increased, the influence is large, and there is a problem that uniform bonding of the semiconductor substrates becomes difficult.
[0006]
In recent years, the occurrence of leakage current or the like in a composite semiconductor substrate bonded via an insulating film layer, that is, a semiconductor substrate having an SOI structure has become a problem, and improvement in characteristics due to gettering is expected. In this case, in order to get contaminated impurities into the high-density defect region inside the substrate through the insulating film layer, it is necessary to have a high gettering capability in the high-density defect region, and establishment of a method for realizing this is desired. Yes.
[0007]
The present invention has been made in view of the above-described circumstances, and when a composite semiconductor substrate obtained by bonding a plurality of substrates is provided with a reliable gettering capability against contaminating impurities and the like, and the semiconductor substrate has a large diameter. Another object of the present invention is to provide a method of manufacturing a semiconductor substrate that enables the uniform bonding.
[0008]
[Means for Solving the Problems]
The method of manufacturing a semiconductor substrate of the present invention according to claim 1, using a first semiconductor substrate, the initial oxygen concentration is as high as the second semiconductor substrate 10 times more than the first semiconductor substrate, insulation these Enmakuso Forming a composite semiconductor substrate by bonding through the entire surface, a step of thinning the first semiconductor substrate side of the composite semiconductor substrate by polishing or etching, and an intrinsic getter for the composite semiconductor substrate. Performing a ring heat treatment to form a defect-free region in the first semiconductor substrate and forming a high-density defect region serving as a getter sink of a contaminating impurity in the second semiconductor substrate.
According to a second aspect of the present invention, there is provided a method for manufacturing a semiconductor substrate according to the first aspect, wherein the first semiconductor substrate has an initial oxygen concentration lower than an oxygen solid solution limit at a processing temperature of the intrinsic gettering heat treatment. Is used.
According to a third aspect of the present invention, there is provided a method for manufacturing a semiconductor substrate according to the first or second aspect of the present invention, wherein the second semiconductor substrate has an initial oxygen concentration from an oxygen solid solution limit at a processing temperature of the intrinsic gettering heat treatment. Use expensive ones .
[0009]
[Action]
According to the first aspect of the present invention, since the gettering heat treatment is performed after the first semiconductor substrate and the second semiconductor substrate are bonded, a sufficient interstitial oxygen concentration is ensured during the bonding of the semiconductor substrate, and voids are generated. Can be prevented. Therefore, even when the semiconductor substrate has a large diameter, uniform bonding is possible.
[0010]
In addition, since the oxygen concentration contained in the second semiconductor substrate is set higher than that of the first semiconductor substrate, by performing intrinsic gettering heat treatment on the bonded composite semiconductor substrate, The defect-free region is easily formed in the second semiconductor substrate with a high-density defect region for gettering contaminant impurities and the like. At this time, if the oxygen concentration contained in the second semiconductor substrate is set sufficiently higher than that of the first semiconductor substrate, the gettering ability of the high-density defect region formed in the second semiconductor substrate is greatly improved. When applied to the semiconductor substrate, it is sufficiently possible to get the contaminating impurities and the like present in the first semiconductor substrate through the insulating film layer .
[0011]
[First embodiment]
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view showing the manufacturing process of the semiconductor substrate of this embodiment.
[0012]
First, as shown in FIG. 1A, an oxide film 11 is formed on a mirror-polished surface 1a of a first semiconductor substrate 1 having at least one surface mirror-polished by thermal oxidation, chemical vapor deposition, sputtering, vapor deposition, or the like. Form. FIG. 1B shows a second semiconductor substrate 2 bonded thereto, and has a mirror polished surface 2a on at least one surface. Here, the 1st semiconductor substrate 1 makes the interstitial oxygen concentration contained become lower than the oxygen solid solution limit at the heat treatment temperature in the oxygen precipitation step in a series of IG heat treatments to be described later. On the other hand, as the second semiconductor substrate 2, one having an interstitial oxygen concentration higher than that of the first semiconductor substrate 1, that is, higher than the oxygen solid solution limit is used.
[0013]
Next, the first semiconductor substrate 1 and the second semiconductor substrate 2 are removed from the organic substances by, for example, boiling a trichrene, ultrasonic cleaning with acetone, and a mixed solution of NH ₃ : H ₂ O ₂ : H ₂ O = 1: 1: 4. , HCI: H ₂ O ₂ : H ₂ O = 1: 1: 4 removes metal contamination with a mixed solution and performs pure cleaning in order to sufficiently wash. Then, after removing the natural oxide film on the surface with a mixed solution of HF: H ₂ O = 1: 50, an oxide layer of about 10 to 30 mm is formed on the substrate surface by chemicals such as carros, thermal oxidation, oxygen plasma irradiation, or the like. To give hydrophilicity and washed with pure water.
[0014]
Subsequently, after drying with dry nitrogen or the like to control the amount of moisture adsorbed on the substrate surface, the surface 11a of the oxide film 11 on the first semiconductor substrate 1 and the second semiconductor substrate 2 as shown in FIG. The surface 2a is closely attached. As a result, the two substrates 1 and 2 are bonded to each other by hydrogen bonds between silanol groups formed on the surface and water molecules adsorbed on the surface. Further, the bonded substrates 1 and 2 are dried in a vacuum of 10 Torr or less. At this time, a load of 30 g weight / cm ² or less may be applied to compensate for the warpage of the substrates 1 and 2.
[0015]
Thereafter, by subjecting the substrates 1 and 2 to a heat treatment for 1 hour or more at a temperature of 900 ° C. or higher in an inert gas atmosphere such as nitrogen or argon, a dehydration condensation reaction occurs on the bonding surface, and silicon (Si) And oxygen (O) bond (Si—O—Si) is formed, and a bonded substrate 3 is formed as a composite semiconductor substrate in which the two substrates 1 and 2 are firmly bonded via the insulating oxide film 11.
[0016]
Thereafter, in the step of FIG. 1D, the first semiconductor substrate 1 is thinned by performing mechanical polishing or etching from the surface 1b side opposite to the bonding surface with the second semiconductor substrate 2 to obtain a predetermined thickness. Thickness. Further, by performing the above-described cleaning process on the bonding substrate 3, organic substances and metal contaminants are removed.
[0017]
Thereafter, a series of intrinsic gettering heat treatment (IG heat treatment) is performed on the bonding substrate 3. First, the bonding substrate 3 is subjected to heat treatment at 1000 ° C. or higher in, for example, a nitrogen or oxygen atmosphere, so that oxygen in the semiconductor substrate is externally diffused, and the interstitial oxygen concentration in the first semiconductor substrate 1 is set to oxygen precipitation described later. It is sufficiently lower than the oxygen solid solution limit at the heat treatment temperature of the process. This heat treatment step may be omitted if a semiconductor substrate whose initial oxygen concentration is sufficiently lower than the oxygen solid solution limit is selected as the first semiconductor substrate 1 in advance.
[0018]
Next, oxygen precipitation nuclei are generated in the semiconductor substrate by subjecting the bonding substrate 3 to a two-step heat treatment at about 450 ° C. and 600 to 850 ° C. or a heat treatment at about 600 to 850 ° C. in a nitrogen or oxygen atmosphere, for example. Let This heat treatment step may be omitted when oxygen precipitation nuclei are present in the second semiconductor substrate 2 in advance. Thereafter, the bonding substrate 3 is subjected to a heat treatment at 900 ° C. or higher in a nitrogen or oxygen atmosphere, thereby causing oxygen precipitation in the second semiconductor substrate 2.
[0019]
As a result of the series of IG heat treatments, a defect-free region (DZ layer) 10 is formed in the first semiconductor substrate 1 and the second semiconductor substrate 2 becomes a getter sink in the bonding substrate 3 as shown in FIG. A density defect region 20 is formed. The gettering ability of the high-density defect region 20 can be adjusted by changing the initial oxygen concentration of the second semiconductor substrate 2 and a series of IG heat treatment conditions. Preferably, the initial oxygen concentration of the second semiconductor substrate 2 is preferably at least 10 times higher than the initial oxygen concentration of the first semiconductor substrate 1, and a sufficiently high gettering capability can be realized.
[0020]
In order to configure various semiconductor devices using the bonding substrate 3 formed as described above, an operation region of a desired semiconductor element may be formed in the defect-free region 10 of the first semiconductor substrate 1. At this time, the high-density defect region 20 of the second semiconductor substrate 2 acts as a getter sink, and contaminates impurities and the like of the first semiconductor substrate 1 are gettered through the oxide film 11 to improve element characteristics.
[0021]
[ Reference Example 1 ]
In the first embodiment, the configuration in which the first semiconductor substrate 1 and the second semiconductor substrate 2 are joined via the oxide film 11 has been described . However, as shown in FIG. 2 , the oxide film is formed on the surface of the first semiconductor substrate 1. 11 may be applied to the second semiconductor substrate 2 without being formed. The manufacturing process will be described below as Reference Example 1 .
[0022]
First, the mirror surface of the second semiconductor substrate 2 is bonded to the mirror-polished surface of the first semiconductor substrate 1 having at least one surface mirror-polished. At this time, the same method as in the first embodiment is used except that the step of forming the oxide film 11 is omitted.
[0023]
Next, the bonded substrate 3 is subjected to a heat treatment for 1 hour or more at a temperature of 1100 ° C. or higher in an inert gas atmosphere such as nitrogen or argon, so that a part of silanol groups at the bonding interface is obtained. Is diffused into the substrate to form a Si—Si direct junction.
[0024]
Thereafter, as in the first embodiment, the first semiconductor substrate 1 is subjected to a thinning process, a bonding substrate 3 cleaning process, and a series of IG heat treatment processes. As a result, as shown in FIG. 2, the defect-free region 10 can be formed in the first semiconductor substrate, and the high-density defect region 20 serving as a getter sink can be formed in the second semiconductor substrate 2.
[0025]
[ Reference Example 2 ]
FIG. 3 shows the manufacturing process of Reference Example 2 . This reference example is an example applied to a semiconductor substrate in which a dielectric buried layer for element isolation is formed inside the substrate. As with again the first real施例, as the first semiconductor substrate, the oxygen concentration contained is, those less than the oxygen solid solubility limit in the oxygen precipitation process of the IG process, the second semiconductor substrate 2, containing The oxygen concentration used is higher than the oxygen solid solution limit.
[0026]
First, as shown in FIGS. 3A and 3A, a part of the mirror surface 2a of the second semiconductor substrate 2 having at least one surface mirror-polished is subjected to chemical etching or reactive ion etching (hereinafter referred to as RIE) or the like. Etching is selectively performed to form a recess 21 having a depth of 0.2 to 2 μm.
[0027]
Next, as shown in FIGS. 3B and 3B ′, an oxygen introduction groove 4 extending along the periphery of the recess 21 or crossing the recess 21 is formed by RIE or plasma etching. Here, the shape of the oxygen introduction groove 4 is appropriately determined in consideration of the shape of the recess 21, the substrate size, and the like. The width and depth of the oxygen introduction groove 4 are set to values larger than the depth of the recess 21. Note that the recess 21 and the oxygen introduction groove 4 may not be formed so as to open to the edge of the substrate due to the limitations of the apparatus described above.
[0028]
Next, as shown in FIG. 3C, a mask 12 for selective etching is formed on the mirror surface 1a of the first semiconductor substrate 1 having at least one surface mirror-polished using a masking tape, resist, or the like. As shown in FIG. 3 (c ′), the mask 12 has a diameter slightly smaller than the diameter of the substrate 1, and has such a size and shape that the oxygen introduction groove 4 of the second semiconductor substrate 2 can be opened to the outside after bonding. I just need it.
[0029]
Subsequently, in FIGS. 4D and 4D ′, the peripheral portion of the substrate 1 is selectively etched by chemical etching or RIE, and a step 13 is formed in the peripheral portion to form a terrace structure. It is desirable that the step 13 has a depth equal to or greater than the depth of the oxygen introduction groove 4.
[0030]
Thereafter, the substrates 1 and 2 are cleaned and bonded by the method shown in the first embodiment. Next, the bonded integrated substrate is subjected to a heat treatment for 1 hour or more at a temperature of 1100 ° C. or higher in an inert gas atmosphere such as nitrogen or argon, so that a part of the silanol groups at the bonding interface is formed. Some oxygen is diffused into the substrate to form Si-Si direct bonds. In this manner, as shown in FIG. 4E, a bonded substrate 3 is formed in which the two substrates 1 and 2 are directly bonded. FIG. 4E is an AA ′ cross section and a BB ′ cross section in FIG. 4E ′, respectively.
[0031]
However, at this time, the recess 21 is not joined, and the cavity 5 is formed by the recess 21 and the mirror surface 1a of the first semiconductor substrate 1 (cross section AA ′). Even if the oxygen introduction groove 4 does not reach the edge of the substrate 2, the oxygen introduction groove 4 opens to the outside air by the step 13 formed at the peripheral edge of the first semiconductor substrate 1 (cross section BB ′).
[0032]
Next, as shown in FIG. 5 (f), the integrated bonded substrate 3 is 900 ° C. or more and 1 hour or more in an oxidizing atmosphere such as dry O ₂ , wet O ₂ , H ₂ , or O ₂ mixed combustion gas. Heat treatment. As a result, the oxidizing gas is introduced into the cavity 5 inside the bonding substrate through the oxygen introduction groove 4 opened to the outside, and the surface of the cavity is oxidized to grow the thermal silicon oxide 6. However, this oxidation process needs to be performed for a minimum time until the cavity 5 formed by the recess 21 and the surface of the first semiconductor substrate 1 is completely buried and filled by the growth of the thermal silicon oxide 6 from both surfaces. . Through the above steps, the thermal silicon oxide 6 can be completely embedded and filled in the bonding substrate 3 as a dielectric embedded layer.
[0033]
Next, in the step of FIG. 5G, lapping and polishing are performed from the unbonded surface of the first semiconductor substrate 1 until a desired insulating separation layer thickness is obtained. (1) A mask 14 for selectively etching the peripheral portion of the semiconductor substrate 1 is formed using a masking tape, a resist or the like (FIG. 5H). As shown in FIG. 5 (h ′), the mask 14 is equal to or equal to the mask 12 (see FIG. 3 (c)) used to form the step 22 on the mirror surface 1a of the first semiconductor substrate 1. Use the following size. Thereafter, in the steps of FIGS. 5 (i) and (i ′), the peripheral portion 15 of the first semiconductor substrate 1 is selectively removed by chemical etching or RIE. Thereby, chipping and peeling of the peripheral edge portion 15 of the substrate 1 can be prevented.
[0034]
In this selective etching step, the thickness of the first semiconductor substrate 1 after the lapping step (g) is smaller than the etching depth of the peripheral portion selective etching in the terrace structure forming step of FIG. In other words, when the peripheral edge 15 of the substrate 1 is removed by lapping, it may not be performed.
[0035]
Next, in FIG. 5J, in order to form an element isolation region, an element isolation groove 16 having a depth reaching the thermal silicon oxide 6 with a width of 0.3 μm or more is chemically etched in the first semiconductor substrate 1. , RIE or dicing. Here, since the end of the oxygen introduction groove 4 formed in the second semiconductor substrate 2 is open to the outside air (FIG. 5 (i ′)), the alignment when forming the groove 16 is based on this. Can be performed accurately.
[0036]
Thereafter, in order to form an insulating layer on the side surface of the groove 16, heat treatment is performed at 900 ° C. or higher for 1 hour or longer in an oxidizing atmosphere such as dry O ₂ , wet O ₂ , H ₂ , or O ₂ mixed combustion gas. Then, a thermal silicon oxide layer 17 having a thickness of 0.3 μm or more is formed. Further, as shown in FIG. 6 (k), polycrystalline silicon 18 is deposited by, for example, a CVD method to fill the groove 16. However, the filling material in this case may be an insulator such as oxide or silicon nitride instead of polycrystalline silicon, and the filling method may be sputtering, vapor deposition, SOG, or the like. The groove 16 may not necessarily be completely filled with the polycrystalline silicon 18 as long as the opening on the surface is closed, and the cavity may remain. Thereafter, the polycrystalline silicon 18 on the surface and the surface layer 17a of the thermally oxidized silicon layer 17 are removed by, for example, lapping or etching back, and planarized (FIGS. 6 (l) and (l ')).
[0037]
Next, cleaning and a series of IG heat treatments are performed on the bonding substrate 3 in the same manner as in the first embodiment. Thereby, as shown in FIG. 6M, the defect-free region 10 can be formed in the first semiconductor substrate 1, and the high-density defect region 20 serving as a getter sink can be formed in the second semiconductor substrate 2.
[0038]
Further, according to this reference example , the provision of the oxygen introduction groove 4 can ensure communication with the outside air, and as shown in FIG. 6 (l), the thermal silicon oxide 6 embedded in the substrate and the heat of the side surface. With the silicon oxide layer 17 and the polycrystalline silicon 18, a semiconductor substrate having the region 7 that is completely insulated and separated from other regions can be obtained.
[0039]
【The invention's effect】
According to the method of the present invention, by setting the oxygen concentration of the second semiconductor substrate sufficiently higher than that of the first semiconductor substrate, it is possible to form a high-density defect region having a high gettering capability in the second semiconductor substrate. Therefore, it can be sufficiently applied to a composite semiconductor substrate having an SOI structure, and the device characteristics can be greatly improved. Further, since the high-density defect region is formed after the bonding of the semiconductor substrates, voids or the like are not generated in the bonding process of the substrates, uniform bonding is possible, and the semiconductor substrate can have a large diameter.
[Brief description of the drawings]
FIG. 1 is a sectional view showing a manufacturing process of a first embodiment of the present invention.
2 is a cross-sectional view of a semiconductor substrate showing Reference Example 1. FIG.
3 is a cross-sectional view and a plan view showing a manufacturing process of Reference Example 2. FIG.
4 is a cross-sectional view and a plan view showing a manufacturing process of Reference Example 2. FIG.
5 is a cross-sectional view and a plan view showing the manufacturing process of Reference Example 2. FIG.
6 is a cross-sectional view and a plan view showing the manufacturing process of Reference Example 2. FIG.
[Explanation of symbols]
1 First semiconductor substrate 10 Defect-free region 11 Oxide film (insulating film layer)
2 Second semiconductor substrate 20 High-density defect region 3 Bonded substrate (composite semiconductor substrate)

Claims (3)

A first semiconductor substrate, the initial oxygen concentration using a high second semiconductor substrate than 10 times than the first semiconductor substrate to form a composite semiconductor substrate by bonding through these on the entire surface of the insulation layer Process,
A step of thinning the first semiconductor substrate side of the composite semiconductor substrate by polishing or etching;
Performing intrinsic gettering heat treatment on the composite semiconductor substrate to form a defect-free region in the first semiconductor substrate and forming a high-density defect region serving as a getter sink for contaminating impurities in the second semiconductor substrate; A method for manufacturing a semiconductor substrate, comprising: 2. The method of manufacturing a semiconductor substrate according to claim 1, wherein the first semiconductor substrate has an initial oxygen concentration lower than an oxygen solid solution limit at a processing temperature of the intrinsic gettering heat treatment. 3. The method of manufacturing a semiconductor substrate according to claim 1, wherein the second semiconductor substrate is one having an initial oxygen concentration higher than an oxygen solid solution limit at a processing temperature of the intrinsic gettering heat treatment.

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