JP3606959B2 - Pulse signal generation circuit with variable duty ratio - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a pulse signal generation circuit, and more particularly to a circuit in a pulse signal generation circuit having a variable duty ratio which is simplified.
[0002]
[Prior art]
In the pulse signal generation circuit, as a technique for changing the so-called duty ratio, for example, an oscillation circuit is configured using a PLL (Phase-Locked Loop) circuit, and an output signal of the PLL oscillation circuit is divided. Various proposals have been made to obtain a pulse signal having a desired duty ratio.
[0003]
[Problems to be solved by the invention]
Such a circuit has an advantage that the duty ratio can be changed with high accuracy, but has a problem that the circuit configuration becomes complicated and the device becomes expensive.
The present invention has been made in view of the above circumstances, and provides a variable duty ratio pulse signal generation circuit capable of easily changing the duty ratio with a simple circuit configuration.
[0004]
[Means for Solving the Problems]
A pulse signal generation circuit having a variable duty ratio according to the present invention includes a sawtooth wave signal generation means for repeatedly generating a sawtooth voltage signal in synchronization with a pulse signal inputted from the outside at regular intervals, and the sawtooth wave signal generation means. A detection signal voltage divider that detects and holds the substantially maximum value of the sawtooth wave voltage signal output from the signal through a switch that opens and closes in synchronization with the pulse signal, and divides and outputs the held voltage. comprising means, an output voltage of the sawtooth wave signal generating means compares the output voltage of the detection signal voltage divider, a comparing means for outputting a signal corresponding to the comparison result, wherein the detection signal component The duty ratio of the signal output from the comparison means changes according to the voltage division ratio in the pressure means .
[0005]
In such a configuration, when an external pulse signal is input to the sawtooth wave signal generating means, a sawtooth voltage signal having the same period as that of the pulse signal is output, and the substantially maximum value of the voltage signal is detected signal. A so-called sample hold is performed by the voltage dividing means, and the voltage is divided to a predetermined voltage dividing ratio, and the divided voltage is input to the comparing means.
[0006]
The comparison means is supplied with the output voltage of the sawtooth signal generation means together with the output voltage of the detection signal voltage dividing means, and a comparison between the two is performed. For example, while the output voltage of the sawtooth wave signal generating means is equal to or lower than the output voltage of the detection signal voltage dividing means, the predetermined voltage signal is output, while the output voltage of the sawtooth wave signal generating means is When the output voltage of the pressure means is exceeded, the output voltage of the comparison means becomes zero.
[0007]
Therefore, the width of the pulse signal output from the comparison means can be changed to a desired magnitude by changing the voltage dividing ratio in the detection signal voltage dividing means.
Particularly, since the substantially maximum value of the sawtooth voltage signal is divided, the voltage division ratio and the duty ratio can be made to correspond to each other, so that the operation of setting the voltage division ratio substantially corresponding to the setting of the duty ratio is performed. It can be done simply.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of a pulse signal generation circuit with variable duty ratio according to the present invention will be described below with reference to FIGS.
The members and arrangements described below do not limit the present invention and can be variously modified within the scope of the gist of the present invention.
[0009]
First, the variable duty ratio pulse signal generation circuit according to the embodiment of the present invention is roughly divided into a sawtooth wave generation unit 1 and a sample hold unit 2 (see FIG. 1).
The sawtooth wave generation unit 1 includes a timing circuit 3 and a sawtooth wave generation circuit 5 configured around a first buffer amplifier (indicated as “Buff1” in FIG. 1) 4.
[0010]
The timing circuit 3 has a first switch (denoted as “S1” in FIG. 1) 8 and a second switch (denoted as “S2” in FIG. 1), which will be described later, in accordance with a pulse signal input from the outside at a constant cycle. ) 13 is opened and closed.
The sawtooth wave generating circuit 5 includes a constant current source 6 and a first capacitor (indicated as “C1” in FIG. 1) 7 connected in series between a power source (not shown) and ground, and a constant current source 6 While the connection point with the first capacitor 7 is connected to the input terminal of the first buffer amplifier 4, the first connection point between the constant current source 6 and the first capacitor 7 and the ground is the first. A switch 8 is connected.
[0011]
The first switch 8 is opened and closed according to a signal from the timing circuit 3, and specifically, a so-called electronic switch using, for example, a semiconductor is suitable.
[0012]
The sample and hold unit 2 includes a sample and hold circuit 10 mainly composed of a second buffer amplifier (indicated as “Buff2” in FIG. 1) 9 and a comparator (indicated as “Comp” in FIG. 1) 11. It has.
In the sample and hold circuit 10, a second capacitor for holding (denoted as "C2" in FIG. 1) 12 is connected between the input stage of the second buffer amplifier 9 and the ground. A second switch 13 is connected in series between the input stage of the amplifier 9 and the output terminal of the first buffer amplifier 4.
[0013]
The second switch 13 is opened and closed according to a signal from the timing circuit 3 (details will be described later) in the same manner as the first switch 8 described above. The substantially maximum value of the signal output from the first buffer amplifier 4 is stored and held in the second capacitor 12.
[0014]
The inverting input terminal of the comparator 11 is connected to the output terminal of the first buffer amplifier 4 so that a so-called sawtooth wave is input.
On the other hand, a voltage obtained by dividing the output voltage of the second buffer amplifier 9 is input to the non-inverting input terminal of the comparator 11.
[0015]
That is, first and second voltage dividing resistors (indicated as “R1” and “R2” in FIG. 1) 14 and 15 are connected in series between the output terminal of the second buffer amplifier 9 and the ground. The mutual connection point (denoted as “B point” in FIG. 1) is connected to the non-inverting input terminal of the comparator 11 and is divided by the first and second voltage dividing resistors 14 and 15. The output voltage of the second buffer amplifier 9 is used as a reference voltage in the comparison operation of the comparator 11.
[0016]
Next, the operation in the above configuration will be described with reference to FIG.
First, a signal input from the outside to the timing circuit 3 is a pulse signal having a predetermined cycle as shown in FIG.
When this pulse signal is input, the rising edge is detected in the timing circuit 3, and in synchronization with this rising edge, the second switch 13 is first closed for a short period of time and then opened again. Next, the first switch 8 is closed by the timing circuit 3 for a short time and is opened again.
[0017]
FIGS. 2E and 2F show that the timings of opening and closing the second switch 13 and the first switch 8 are substantially the same, respectively. Is not exactly the same. Further, since the time for the closed state is extremely short as compared with the pulse width of the input pulse signal, etc., it is shown in a substantially linear form in both FIGS. 2 (e) and 2 (f). However, it actually has a time width.
[0018]
When the second switch 13 is closed, the output voltage of the first buffer amplifier 4 (the voltage at the point indicated as “point A” in FIG. 1) passes through the second switch 13 to the second voltage. 2 is applied to and held by the capacitor 12, but a start switch (not shown) is turned on in a state where no charge is accumulated in any of the first and second capacitors 7 and 12, and the circuit is powered on. voltage is applied, immediately after the circuit operation is started (the circuit operation after the start, until the second Pulse signal is input) at, when the second switch 13 becomes closed state, the Since almost no voltage is output from the first buffer amplifier 4, the output voltage of the second buffer amplifier 9 is also substantially zero, and the output voltage from the comparator 11 is also zero (FIG. 2 (c), ( d)).
[0019]
On the other hand, when the first switch 8 is closed, the first capacitor 7 is short-circuited, and the accumulated charge is discharged.
As soon as the first switch 8 returns to the open state, the current from the constant current source 6 flows into the first capacitor 7 and the potential increases for a while. As a result, the first buffer amplifier 4 At point A on the output side, a so-called sawtooth wave as shown in FIG. 2B is output.
[0020]
When the pulse signal is input again to the timing circuit 3 and the second switch 13 is closed for a predetermined time, the sawtooth wave output from the first buffer amplifier 4 as described above is abbreviated. The upper limit voltage is sampled and accumulated and held in the second capacitor 12.
The second capacitor 12 is selected to be capable of sufficiently holding the charge with respect to the period in which the second switch 13 is closed, and every time the second switch 13 is closed. Since the voltage applied to the second capacitor 12 is substantially the same, the second buffer 12 is buffered and amplified by the second buffer amplifier 9 and is a connection point between the first and second voltage dividing resistors 14 and 15. The divided voltage output to is substantially constant (see FIG. 2C).
[0021]
On the other hand, the second switch 13 is closed for a short time and returns to the open state again. At the same time, the first switch 8 is closed for a short time and then opened again. Thus, as described above, the first buffer amplifier 4 outputs a sawtooth voltage.
[0022]
As described above, with the operation of the first switch 8, the output voltage of the first buffer amplifier 4 once becomes zero, so that in the comparator 11, the point B applied to the non-inverting input terminal. Therefore, the comparator 11 outputs a predetermined voltage corresponding to the logical value “High” (FIGS. 2B and 2C). (See (d)).
[0023]
As the output voltage of the first buffer amplifier 4 increases, the output voltage, that is, the voltage applied to the inverting input terminal of the comparator 11 exceeds the divided voltage at the previous point B. Will output a logical value “Low”, that is, zero (v) (see FIGS. 2B, 2C, and 2D).
[0024]
Therefore, the comparator 11 outputs a pulse signal having a time width from the time when the first switch 8 is closed and returns to the open state again until the voltage at the point A exceeds the voltage at the point B. By repeating the operations of the first and second switches 8 and 13 as described above in synchronization with the cycle of the input pulse signal, the signals are repeatedly output at a predetermined interval (see FIG. 2).
[0025]
As described above, the pulse width of the pulse signal output from the comparator 11 is determined by the voltage dividing ratio by the first and second voltage dividing resistors 14 and 15, and this change in pulse width, that is, the duty ratio. This change can be arbitrarily changed by changing the ratio of the resistance values of the two voltage dividing resistors 14 and 15. Further, the voltage compared with the reference voltage in the comparator 11 is a sawtooth wave whose voltage value rises with time, and one reference voltage is a voltage obtained by dividing the substantially upper limit value of the sawtooth wave. Thus, the voltage division ratio corresponds to the duty ratio, and the duty ratio can be easily changed.
[0026]
Incidentally, when it is desired to further increase the pulse width output from the comparator 11, the divided voltage may be set larger. For this purpose, the value of the second voltage dividing resistor 15 is changed to the first divided voltage. It may be larger than the value of the resistor 14.
For example, when the voltage division ratio (voltage at point B: output voltage of the second buffer amplifier 9) is 3: 5, the duty ratio (pulse width of the pulse signal output from the comparator 11: 1 of this pulse signal) The period) is also 3: 5.
[0027]
Therefore, compared with the case where the reference voltage is obtained by dividing a separate voltage that is completely independent of the output voltage of the first buffer amplifier 4, for example, the power supply voltage, in the embodiment of the present invention, As described above, since the duty ratio can be immediately grasped by the voltage division ratio, the duty ratio can be easily and simply changed.
[0028]
In the above-described embodiment of the invention, the first and second voltage dividing resistors 14 and 15 are so-called fixed resistors, but a variable resistor is used in this portion to slide the resistors. You may make it take out the applied voltage to the non-inverting input terminal of the comparator 11 from a contact.
[0029]
In the embodiment of the present invention described above, the first and second switches 8 and 13 are operated after the rising edge of the pulse signal input to the timing circuit 3 is detected. The operation may be performed after detecting the falling edge of the pulse signal.
[0030]
In the embodiment of the present invention described above, the sawtooth wave signal generating means includes the timing circuit 3 and the sawtooth wave generating circuit 5, and the detection signal voltage dividing means includes the timing circuit 3, the sample hold circuit 10, the first and second circuits. The voltage dividing resistors 14 and 15 and the comparator are realized by the comparator 11, respectively.
[0031]
【The invention's effect】
As described above, according to the present invention, it is possible to generate a pulse signal by comparing a sawtooth wave voltage with a voltage obtained by dividing the substantially maximum value of the sawtooth voltage. Since the voltage division ratio corresponds to the duty ratio, the duty ratio can be changed by changing the voltage division ratio, and the duty ratio can be easily and simply changed.
Further, since it is constituted by a relatively simple circuit, it is possible to provide an inexpensive and variable duty ratio pulse signal generation circuit that can be reliably operated.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a circuit configuration in an embodiment of a pulse signal generation circuit having a variable duty ratio according to the present invention;
FIG. 2 is a timing chart showing timings in main parts of the circuit shown in FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Sawtooth wave generation part 2 ... Sample hold part 3 ... Timing circuit 4 ... Sawtooth wave generation circuit 7 ... 1st capacitor 8 ... 1st switch 10 ... Sample hold circuit 11 ... Comparator 12 ... 2nd capacitor 13 ... Second switch 14 ... first voltage dividing resistor 15 ... second voltage dividing resistor

Claims (1)

A sawtooth wave signal generating means for repeatedly generating a sawtooth voltage signal in synchronization with a pulse signal inputted at regular intervals from the outside;
The substantially maximum value of the sawtooth wave signal output from the sawtooth signal generator is detected and held via a switch that opens and closes in synchronization with the pulse signal, and the held voltage is divided. Detection signal voltage dividing means for outputting;
Comparing the output voltage of the sawtooth signal generating means with the output voltage of the detection signal voltage dividing means, and comparing means for outputting a signal according to the comparison result ,
A duty ratio variable pulse signal generation circuit characterized in that a duty ratio of a signal output from the comparison means changes corresponding to a voltage division ratio in the detection signal voltage dividing means .

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