JP3557143B2 - Switching element bare chip mounting structure - Google Patents

Switching element bare chip mounting structure Download PDF

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Publication number
JP3557143B2
JP3557143B2 JP2000010982A JP2000010982A JP3557143B2 JP 3557143 B2 JP3557143 B2 JP 3557143B2 JP 2000010982 A JP2000010982 A JP 2000010982A JP 2000010982 A JP2000010982 A JP 2000010982A JP 3557143 B2 JP3557143 B2 JP 3557143B2
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Japan
Prior art keywords
electrode
switching element
mounting structure
bare chip
plate
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Expired - Fee Related
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JP2000010982A
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Japanese (ja)
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JP2001203243A (en
Inventor
隆仁 柳田
広明 小林
浩和 福田
弘樹 江藤
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Publication of JP3557143B2 publication Critical patent/JP3557143B2/en
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Description

【０００１】
【発明の属する技術分野】
本発明はスイッチング素子のベアチップの実装構造、特に二次電池に内蔵できるバッテリーマネージメントを行うスイッチング素子のベアチップを搭載した実装構造に関する。
【０００２】
【従来の技術】
携帯端末の普及に伴い小型で大容量のリチュウムイオン電池が求められるようになってきた。このリチュウムイオン電池の充放電のバッテリーマネージメントを行う保護回路基板は携帯端末の軽量化のニーズにより、より小型で負荷ショートにも十分に耐えうるものでなくてはならない。かかる保護回路基板はリチュウムイオン電池の容器内に内蔵されるために小型化が求められ、チップ部品を多用したＣＯＢ（Ｃｈｉｐ ｏｎ Ｂｏａｒｄ）技術が駆使され、小型化の要求に応えてきた。しかし一方ではリチュウムイオン電池に直列にスイッチング素子を接続するのでこのスイッチング素子のオン抵抗も極めて小さくするニーズがあり、これが携帯電話では通話時間や待機時間を長くするために不可欠の要素である。
【０００３】
図７に具体的なバッテリーマネージメントを行う保護回路を示す。リチュウムイオン電池ＬｉＢに直列に２個のパワーＭＯＳＦＥＴ Ｑ１、Ｑ２を接続し、リチュウムイオン電池ＬｉＢの電圧をコントロールＩＣで検知しながら２個のパワーＭＯＳＦＥＴ Ｑ１、Ｑ２ のオンオフ制御を行って過充電、過放電あるいは負荷ショートからリチュウムイオン電池ＬｉＢを保護している。２個のパワーＭＯＳＦＥＴ Ｑ１、Ｑ２はドレイン電極Ｄを共通接続し、両端にそれぞれのソース電極Ｓが配置され、各々のゲート電極ＧはコントロールＩＣに接続されている。
【０００４】
充電時には両端に電源が接続され、リチュウムイオン電池ＬｉＢに充電電流が矢印の方向に供給され充電を行う。リチュウムイオン電池ＬｉＢが過充電になるとコントロールＩＣで電圧の検出をして、パワーＭＯＳＦＥＴ Ｑ２のゲート電圧がＨ（ハイレベル）からＬ（ローレベル）になり、パワーＭＯＳＦＥＴ Ｑ２がオフして回路を遮断してリチュウムイオン電池ＬｉＢの保護をする。
【０００５】
放電時には両端は負荷に接続され、所定の電圧までは携帯端末の動作を行う。しかしリチュウムイオン電池ＬｉＢが過放電となるとコントロールＩＣで電圧を検知して、パワーＭＯＳＦＥＴ Ｑ１のゲート電圧をＨからＬにしてパワーＭＯＳＦＥＴ Ｑ１をオフして回路を遮断してリチュウムイオン電池ＬｉＢの保護を行う。
【０００６】
更に負荷ショート時あるいは過電流が流れた時はパワーＭＯＳＦＥＴ Ｑ１、Ｑ２に大電流が流れ、パワーＭＯＳＦＥＴ Ｑ１、Ｑ２の両端電圧が急激に上昇するので、この電圧をコントロールＩＣで検出して放電時と同様にパワーＭＯＳＦＥＴ Ｑ１をオフして回路を遮断してリチュウムイオン電池ＬｉＢの保護を行う。しかし保護回路が動作するまでの短期間に大電流が流れるため、パワーＭＯＳＦＥＴ Ｑ１、Ｑ２に対してせん頭ドレイン電流の大電流化が要求される。
【０００７】
またかかる保護回路ではリチュウムイオン電池ＬｉＢに直列に２個のＮチャンネル型のパワーＭＯＳＦＥＴ Ｑ１、Ｑ２が接続されるので、この２個のパワーＭＯＳＦＥＴ Ｑ１、Ｑ２の低オン抵抗（ＲＤＳ（ｏｎ））が最も要求される項目である。このためにチップを製造する上で微細加工によりセル密度を上げる開発が進められてきた。
【０００８】
具体的には、チャンネルが半導体基板表面に形成されるプレーナー構造ではセル密度は７４０万個／平方インチで、オン抵抗が２７ｍΩであったが、チャンネルをトレンチの側面に形成するトレンチ構造の第１世代ではセル密度は２５００万個／平方インチと大幅に向上し、オン抵抗が１７ｍΩに低減できた。さらにトレンチ構造の第２世代ではセル密度は７２００万個／平方インチで、オン抵抗が１２ｍΩまで低減できた。しかし微細化にも限度があり、オン抵抗をさらに飛躍的に低減するには限界が見えてきた。
【０００９】
図８はかかるセル密度を改良したパワーＭＯＳＦＥＴを実装した保護回路基板を説明する平面図である。実際には図７に示した回路部品が搭載されているが、図面上は全てを示していない。絶縁基板１には両面に銅箔よりなる導電路２が形成され、所望の個所でスルーホール（図示せず）を介して上面と下面の導電路２は接続された多層配線となっている。パワーＭＯＳＦＥＴ３、４は表面実装用のＳＯＰ８の外形に樹脂モールドされ、一方の側にドレイン電極と接続された２本の端子５、５を出し、対向する側にはゲート電極と接続されたゲート端子７とソース電極に接続されたソース端子８が出ている。９はコントロールＩＣであり、１０は図７のＣ１からＣ３に対応するチップコンデンサであり、１１は図７のＲ１からＲ２に対応するチップ抵抗である。１２、１３は外部端子であり、図７のＬＰ２、ＬＰ３と対応する。この外部端子は導電路２の一部で形成されたパッド１４に半田で固着される。この保護回路基板はリチュウムイオン電池のケース内に収納されるために、その形状に応じた形に形成されるが、基本的なニーズとして小型であることが最大の課題である。
【００１０】
図９はパワーＭＯＳＦＥＴ３、４の断面構造を示す。ＮＫ−２０２（銅 ９７．６％ 錫 ２％）を素材とした打ち抜きフレームであり、このフレームのヘッダー２１上に半田あるいは銀ペーストよりなるプリフォーム材２２でパワーＭＯＳＦＥＴのベアチップ２３が固着される。パワーＭＯＳＦＥＴのベアチップ２３の下面は金の裏張り電極（図示せず）によりドレイン電極が形成され、上面にはアルミニウムの蒸着によりゲート電極とソース電極が形成される。フレームのドレイン端子はヘッダー２１と連結されているので、ドレイン電極と直結され、ゲート電極およびソース電極は金のボンディング細線２４を用いたボールボンディングによりゲート端子７およびソース端子８と電気的に接続される。従って、オン抵抗を減少させるためにはフレーム材料、プリフォーム材、ボンディング細線２４の材料、チップ上面のソース電極の電極材料の持つ抵抗もパワーＭＯＳＦＥＴのオン抵抗に影響を及ぼしている。
【００１１】
図１０および図１１はボンデイング細線に工夫をしてオン抵抗を引き下げた従来の技術を説明する平面図である。図１０はソース電極とソース端子８を接続するボンディング細線２４を４本に増やし、電流容量を改善したものである。また図１１はソース電極とソース端子８を接続するボンディング細線２４を短い２本と長い２本の４本に増やし、電流容量を改善し、さらにソース電極へのボンディング個所を広げることによりソース電極の持つ抵抗を減少させたものである。
【００１２】
図６に従来のパワーＭＯＳＦＥＴの実装構造によるオン抵抗の違いを表にまとめた。サンプルＡからサンプルＤが従来のＳＯＰ８外形のモールド構造のものであり、サンプルＡが図１０の構造と対応し、サンプルＢが図１１と対応する。サンプルＣはサンプルＡでプリフォーム材を半田から銀ペーストにしたもので、サンプルＤはサンプルＡでゲート電極およびソース電極をアルミニウムから金にしたものである。これからボンディング細線を短かい４本から短い２本と長い２本と組み合わせた場合はオン抵抗は１３．４３ｍΩから１２．１０ｍΩと１．３３ｍΩの減少が実現されるが、プリフォーム材の半田と銀ペーストとの変更やチップの表面電極材料をアルミニウムから金への変更では大きなオン抵抗の減少は図れないことが示されている。
【００１３】
【発明が解決しようとする課題】
しかしながら、携帯端末の小型化、軽量化および内蔵電池の使用時間の長寿命化という要求はさらに強く求められているのが現状である。この中でパワーＭＯＳＦＥＴの実装構造を打破して、低オン抵抗を実現し且つ保護回路基板の小型化を実現できる有効な解決手段が見出せていない問題点がある。
【００１４】
【課題を解決するための手段】
本発明はかかる問題点を正面より見つめてなされ、絶縁基板と、前記絶縁基板上に形成される所望のパターンの導電路と、前記導電路の一部で構成される固着電極と、前記固着電極にダイボンドされ、その上面に制御電極と、該制御電極よりも大きい面積の電流通過電極とを備えたスイッチング素子のベアチップと、前記固着電極の近くに配置され且つ前記制御電極および前記電流通過電極とそれぞれ接続される接続電極と、前記制御電極と一方の前記接続電極とを電気的に接続する細線と、一方の端部を前記電流通過電極の大部分と重畳して電気的に接続され且つ他方の端部を他方の前記接続電極まで延在して電気的に接続される板状接続板とを備え、前記板状接続板を前記スイッチング素子のベアチップの前記制御電極に接続された前記細線が超える１辺を除く３辺に延在させて前記他方の接続電極に接続することを特徴とする。
【００１５】
【発明の実施の形態】
本発明の実施の形態を図１から図７を参照して詳細に説明する。
図１は本発明を採用した保護回路基板の平面図を示す。この保護回路基板には図７に示した回路が実現されるように回路部品が搭載されているが、図面上は全てを示していない。絶縁基板３１には両面に銅箔よりなる導電路３２が形成され、所望の個所でスルーホール（図示せず）を介して上面と下面の導電路３２は接続された多層配線となっている。
【００１６】
本発明の特徴はスイッチング素子であるパワーＭＯＳＦＥＴ３３、３４をベアチップのまま実装することにある。すなわち、導電路３２の一部で形成された表面に金メッキ層を有する固着電極３５に半田あるいは銀ペーストのプリフォーム材４１（図３参照）によりダイボンドされている。パワーＭＯＳＦＥＴ３３、３４のベアチップの下面は金の裏張り電極が形成されておりドレイン電極（電流通過電極）を構成している。また図２から明らかなように、上面にはコーナー部分に小さい面積のゲート電極３６と上面の大部分を占める大きい面積のソース電極３７（電流通過電極）が形成されている。両電極３６、３７はアルミニウム層、チタン層、ニッケル層と積層して付着され、最上面に金層あるいは銀層が設けられており、半田あるいは銀ペーストのプリフォーム材で接続可能な電極構造となっている。固着電極３５の近くには接続電極３８、３９が導電路３２の一部を利用して設けられる。
【００１７】
一方の接続電極３８は固着電極３５にダイボンドされたパワーＭＯＳＦＥＴ３３、３４のゲート電極３６（制御電極）に近接して設けられ、他方の接続電極３９は一方の接続電極３８とパワーＭＯＳＦＥＴ３３、３４を挟んで対向する位置に設けられる。換言すれば、一方の接続電極３８はゲート電極３６にもっとも近い固着電極３５の１辺に隣接して形成され、他方の接続電極３９は固着電極３５の対辺に隣接して形成されている。ゲート電極３６と一方の接続電極３８は金のボンディング細線４０でボールボンディング法（アルミニウムのボンディング細線の場合はウエッジボンディング法を用いる）で接続される。
【００１８】
またソース電極３７は、一端をソース電極３７のほぼ全面と重畳してプリフォーム材４２で固着され且つ他端は延在されて他方の接続電極３９と半田のプリフォーム材４３で固着された板状接続板４４で接続される。この板状接続板４４は本発明の最も特徴とする点であり、固着工程でボンディング細線４０が邪魔をしないようにボンディング細線４０の引き出し方向には引き出さない。この板状接続板４４はＥＦＴＥＣ−６(銅９９．９％)で構成された材質である。パワーＭＯＳＦＥＴ３３、３４のベアチップは図３に示すようにエポキシ樹脂４５で封止して外気より保護する。
【００１９】
他の回路部品は図８と共通するものであり、符号も共通とした。すなわち、９はコントロールＩＣであり、１０は図７のＣ１からＣ３に対応するチップコンデンサであり、１１は図７のＲ１及びＲ２に対応するチップ抵抗である。１２、１３は外部端子であり、図７のＬＰ２、ＬＰ３と対応する。この外部端子は導電路２の一部で形成されたパッド１４に半田で固着される。
【００２０】
図４はパワーＭＯＳＦＥＴ３３、３４をモノリシック化したものであり、１つのベアチップに２つのＭＯＳＦＥＴを集積化したものである。図７に示すパワーＭＯＳＦＥＴ Ｑ１、Ｑ２はドレイン電極が共通となっているので、モノリシック化することで、小型化が図れる。またゲート電極３６を２つのコーナーに線対称に配置することで、板状接続板４４の固着に邪魔になることを防止している。
【００２１】
図５は板状接続板４４をパワーＭＯＳＦＥＴのベアチップの４辺から各々の辺に隣接して設けた他方の接続電極３９に引き出し、ソース電極３７の取り出し抵抗分を最小限に抑える構造である。このときゲート電極３６からのボンディング細線４０は板状接続板４４の引き出しに邪魔にならないようにベアチップのコーナーから取り出しているが、組立上の簡便さからはゲート電極３６からのボンディング細線４０が超えるベアチップの１辺は接続電極３９を設けない方がよい。
【００２２】
図６に本発明を適用したサンプルＥ、Ｆのオン抵抗の実測値を示す。
これから板状接続板４４の採用による効果は、従来のサンプルＢと本発明のサンプルＥを比較すると３．４３ｍΩの改善がされている。金のボンディング細線から板状接続板４４への変更により、金のボンディング細線抵抗が２．３ｍΩに対して板状接続板４４の抵抗０．２ｍΩに減少するので、金のボンディング細線抵抗の低減効果が２．１ｍΩある。チップ表面電極をアルミニウムの持つ抵抗分をその上に設けた板状接続板４４に変更する低減効果が１．３３ｍΩと概算される。板状接続板４４を接続するプリフォーム材４２の半田と銀ペーストとの差はサンプルＥとサンプルＦとを比較して、０．０７ｍΩと材質の特性ほどの差は出ない。プリフォーム材４２が面積に対して極めて薄いためである。なお以上の説明ではスイッチング素子としてパワーＭＯＳＦＥＴで説明したが、大電流複合素子としてＩＧＢＴを用いても同様の効果が得られる。
【００２３】
【発明の効果】
本発明によれば、第１に固着電極３５にスイッチング素子のベアチップ３３、３４を固着するので、ドレイン電極は固着電極より絶縁基板３１の下面の導電路に多層配線でき、固着電極３５の４辺全てに接続電極３８、３９を配置できる自由度が持てる。そのためにゲート電極３６の引き出し方向とソース電極３７の引き出し方向を反対側にでき、ソース電極３７の引き出し手段として板状接続板４４を採用できる。この結果、オン抵抗は従来のサンプルＢの１２．１０ｍΩから本発明のサンプルＥの８．６７ｍΩまで約３０％と飛躍的な低減を実現できる。
【００２４】
第２に、スイッチング素子のベアチップ３３、３４は下面を銅箔で形成された固着電極３５と接し、上面はほとんどの部分を板状接続板４４で接することになり、極めて放熱性が良好な構造を実現される。このために負荷ショートや過電流が流れても従来の金線のボンデイング細線と異なり板状接続板４４はすぐに溶断することが無く、また発熱に対してもすぐに放熱できるので、極めて破壊に強いスイッチング素子のベアチップの実装構造を実現できる。
【００２５】
第３に、本発明ではオン抵抗も放熱も良好な実装構造を提案できるので、従来と同様のスペックで良い場合はスイッチング素子のベアチップのサイズを更に小さく形成しても良く、保護回路基板の小型化に答えられる。
【００２６】
第４に、本発明ではスイッチング素子のベアチップ３３、３４を実装するので、ＳＯＰ８の外形（５．０×６．０×１．６ｍｍ）に比較してもモールド樹脂分の厚を省けるので、大幅に小形で且つ薄く実装できる。このために保護回路基板の小型化に大いに寄与できるする。
【００２７】
第５に、スイッチング素子のベアチップのモノリシック化により更にチップサイズ小さくでき、小型化に寄与できる。
【００２８】
第６に、板状接続板４４を３辺以上に延在させて接続電極３９と接続することによりソース電極３７の取り出し抵抗を大幅に低減できさらなるオン抵抗の低減が図れ、またチップの放熱性を最大限まで高めることにより大電流を小さいチップサイズで実現できる。
【図面の簡単な説明】
【図１】本発明のスイッチング素子のベアチップの実装構造を説明する図である。
【図２】本発明のスイッチング素子のベアチップの実装構造を説明する図である。
【図３】本発明のスイッチング素子のベアチップの実装構造を説明する図である。
【図４】本発明の他の実施の形態のスイッチング素子のベアチップの実装構造を説明する図である。
【図５】本発明の他の実施の形態のスイッチング素子のベアチップの実装構造を説明する図である。
【図６】本発明のスイッチング素子のベアチップの実装構造の特性を説明する図である。
【図７】本発明を適用するバッテリーマネージメントを行う保護回路を説明する図である。
【図８】従来のスイッチング素子を用いた保護回路基板の実装構造を説明する図である。
【図９】従来のスイッチング素子の実装構造を説明する図である。
【図１０】従来のスイッチング素子の実装構造を説明する図である。
【図１１】従来のスイッチング素子の実装構造を説明する図である。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a mounting structure of a bare chip of a switching element, and more particularly to a mounting structure of a bare chip of a switching element for performing battery management that can be built in a secondary battery.
[0002]
[Prior art]
With the spread of mobile terminals, small-sized and large-capacity lithium-ion batteries have been required. The protection circuit board that performs the battery management of the charge and discharge of the lithium ion battery must be smaller and capable of sufficiently withstanding a load short due to the need for reducing the weight of the portable terminal. Such a protective circuit board is required to be miniaturized because it is built in a container of a lithium ion battery, and a COB (Chip on Board) technology that makes extensive use of chip components has been used to meet the demand for miniaturization. However, on the other hand, since the switching element is connected in series to the lithium ion battery, there is a need to make the on-resistance of the switching element extremely small, which is an essential element for a mobile phone to increase the talk time and the standby time.
[0003]
FIG. 7 shows a specific protection circuit for performing battery management. Two power MOSFETs Q1 and Q2 are connected in series to the lithium ion battery LiB, and overcharging and overcharging are performed by performing on / off control of the two power MOSFETs Q1 and Q2 while detecting the voltage of the lithium ion battery LiB with the control IC. Lithium ion battery LiB is protected from discharge or load short circuit. The two power MOSFETs Q1 and Q2 connect the drain electrode D in common, the respective source electrodes S are arranged at both ends, and the respective gate electrodes G are connected to the control IC.
[0004]
During charging, power is connected to both ends, and charging current is supplied to the lithium ion battery LiB in the direction of the arrow to perform charging. When the lithium ion battery LiB is overcharged, the voltage is detected by the control IC, the gate voltage of the power MOSFET Q2 changes from H (high level) to L (low level), and the power MOSFET Q2 is turned off to shut off the circuit. To protect the lithium ion battery LiB.
[0005]
At the time of discharging, both ends are connected to a load, and the mobile terminal operates up to a predetermined voltage. However, when the lithium ion battery LiB is overdischarged, the voltage is detected by the control IC, the gate voltage of the power MOSFET Q1 is changed from H to L, the power MOSFET Q1 is turned off, and the circuit is cut off to protect the lithium ion battery LiB. Do.
[0006]
Further, when the load is short-circuited or when an overcurrent flows, a large current flows through the power MOSFETs Q1 and Q2, and the voltage across the power MOSFETs Q1 and Q2 rises sharply. Similarly, the power MOSFET Q1 is turned off to shut off the circuit to protect the lithium ion battery LiB. However, since a large current flows in a short period until the protection circuit operates, a large drain current is required for the power MOSFETs Q1 and Q2.
[0007]
Further, in this protection circuit, since two N-channel type power MOSFETs Q1 and Q2 are connected in series to the lithium ion battery LiB, the low on-resistance (R DS (on) ) of these two power MOSFETs Q1 and Q2. Is the most requested item. For this reason, development for increasing the cell density by fine processing in manufacturing chips has been promoted.
[0008]
Specifically, in the planar structure in which the channel is formed on the surface of the semiconductor substrate, the cell density is 7.4 million cells / square inch and the on-resistance is 27 mΩ, but the first in the trench structure in which the channel is formed on the side surface of the trench. In the generation, the cell density was greatly improved to 25 million cells / square inch, and the on-resistance was reduced to 17 mΩ. Furthermore, in the second generation of the trench structure, the cell density was 72 million cells / in 2, and the on-resistance was reduced to 12 mΩ. However, there is a limit to miniaturization, and a limit has been seen to further reduce the on-resistance dramatically.
[0009]
FIG. 8 is a plan view illustrating a protection circuit board on which a power MOSFET with improved cell density is mounted. Actually, the circuit components shown in FIG. 7 are mounted, but not all are shown in the drawing. Conductive paths 2 made of copper foil are formed on both sides of the insulating substrate 1, and the conductive paths 2 on the upper surface and the lower surface are connected to each other via a through hole (not shown) at a desired location to form a multilayer wiring. The power MOSFETs 3 and 4 are resin-molded on the outer surface of the SOP 8 for surface mounting, and have two terminals 5 and 5 connected to the drain electrode on one side, and a gate terminal connected to the gate electrode on the opposite side. 7 and a source terminal 8 connected to the source electrode. 9 is a control IC, 10 is a corresponding chip capacitor C 3 from C1 in FIG. 7, 11 is a chip resistance corresponding to R 2 from R1 in FIG. Reference numerals 12 and 13 denote external terminals, which correspond to LP2 and LP3 in FIG. The external terminal is fixed to a pad 14 formed by a part of the conductive path 2 by soldering. Since this protection circuit board is housed in the case of a lithium ion battery, it is formed in a shape corresponding to its shape. However, the most important issue is that it is small in size as a basic need.
[0010]
FIG. 9 shows a cross-sectional structure of the power MOSFETs 3 and 4. This is a punched frame made of NK-202 (copper 97.6% tin 2%). A bare chip 23 of a power MOSFET is fixed on a header 21 of this frame with a preform material 22 made of solder or silver paste. A drain electrode is formed on the lower surface of the bare chip 23 of the power MOSFET by a gold backing electrode (not shown), and a gate electrode and a source electrode are formed on the upper surface by vapor deposition of aluminum. Since the drain terminal of the frame is connected to the header 21, it is directly connected to the drain electrode, and the gate electrode and the source electrode are electrically connected to the gate terminal 7 and the source terminal 8 by ball bonding using a gold bonding wire 24. You. Therefore, in order to reduce the on-resistance, the resistance of the frame material, the preform material, the material of the bonding thin wires 24, and the electrode material of the source electrode on the upper surface of the chip also affect the on-resistance of the power MOSFET.
[0011]
FIGS. 10 and 11 are plan views for explaining a conventional technique in which the on-resistance is reduced by devising a fine bonding wire. FIG. 10 shows that the number of bonding thin wires 24 connecting the source electrode and the source terminal 8 is increased to four to improve the current capacity. FIG. 11 shows that the number of bonding thin wires 24 connecting the source electrode and the source terminal 8 is increased to four, two short and two long, to improve the current capacity, and to further increase the number of bonding points to the source electrode. It has reduced resistance.
[0012]
FIG. 6 is a table summarizing the difference in on-resistance according to the mounting structure of the conventional power MOSFET. Samples A to D have a conventional SOP8 outer mold structure. Sample A corresponds to the structure of FIG. 10, and sample B corresponds to FIG. Sample C is the sample A in which the preform material is changed from solder to silver paste, and sample D is the sample A in which the gate electrode and the source electrode are changed from aluminum to gold. From now on, when the bonding thin wires are combined from the short four wires to the short two wires and the long two wires, the ON resistance is reduced from 13.43 mΩ to 12.10 mΩ, which is 1.33 mΩ. It is shown that a large decrease in on-resistance cannot be achieved by changing the paste or changing the surface electrode material of the chip from aluminum to gold.
[0013]
[Problems to be solved by the invention]
However, at present, there is a strong demand for smaller and lighter portable terminals and longer service life of built-in batteries. Among them, there is a problem that an effective solution for breaking down the mounting structure of the power MOSFET, realizing low on-resistance and realizing downsizing of the protection circuit board has not been found.
[0014]
[Means for Solving the Problems]
The present invention has been made in view of such a problem from the front, and has an insulating substrate, a conductive path having a desired pattern formed on the insulating substrate, a fixed electrode formed by a part of the conductive path, and the fixed electrode. Die-bonded, a control electrode on its upper surface, a bare chip of a switching element including a current passing electrode having an area larger than the control electrode, and the control electrode and the current passing electrode which are arranged near the fixed electrode and A connection electrode to be connected to each other, a thin wire for electrically connecting the control electrode and one of the connection electrodes, and one end overlapped with most of the current passing electrodes to be electrically connected to each other, and And a plate-shaped connection plate extending to the other connection electrode and electrically connected to the other connection electrode, wherein the plate-shaped connection plate is connected to the control electrode of a bare chip of the switching element. Line extended to the three sides excluding the one side of exceeding characterized by connecting to said other connection electrode.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
An embodiment of the present invention will be described in detail with reference to FIGS.
FIG. 1 shows a plan view of a protection circuit board employing the present invention. Circuit components are mounted on the protection circuit board so as to realize the circuit shown in FIG. 7, but not all are shown in the drawing. Conductive paths 32 made of copper foil are formed on both sides of the insulating substrate 31, and the conductive paths 32 on the upper surface and the lower surface are connected at desired locations via through holes (not shown) to form a multilayer wiring.
[0016]
The feature of the present invention resides in that the power MOSFETs 33 and 34 as switching elements are mounted as bare chips. That is, the fixed electrode 35 having a gold plating layer on the surface formed by a part of the conductive path 32 is die-bonded by a preform material 41 of solder or silver paste (see FIG. 3). A lower surface of the bare chip of each of the power MOSFETs 33 and 34 is provided with a gold-backed electrode, and constitutes a drain electrode (current passing electrode). As is apparent from FIG. 2, a gate electrode 36 having a small area at a corner portion and a source electrode 37 (current passing electrode) having a large area occupying most of the upper surface are formed on the upper surface. The two electrodes 36 and 37 are laminated and adhered to an aluminum layer, a titanium layer, and a nickel layer. A gold layer or a silver layer is provided on the uppermost surface, and the electrode structure can be connected with a preform material of solder or silver paste. Has become. Connection electrodes 38 and 39 are provided near the fixed electrode 35 by utilizing a part of the conductive path 32.
[0017]
One connection electrode 38 is provided near the gate electrodes 36 (control electrodes) of the power MOSFETs 33 and 34 die-bonded to the fixed electrode 35, and the other connection electrode 39 sandwiches the one connection electrode 38 and the power MOSFETs 33 and 34. At a position facing each other. In other words, one connection electrode 38 is formed adjacent to one side of the fixed electrode 35 closest to the gate electrode 36, and the other connection electrode 39 is formed adjacent to the opposite side of the fixed electrode 35. The gate electrode 36 and one of the connection electrodes 38 are connected by a gold bonding thin wire 40 by a ball bonding method (a wedge bonding method is used in the case of an aluminum bonding thin wire).
[0018]
In addition, the source electrode 37 is a plate in which one end is fixed to a substantially entire surface of the source electrode 37 by a preform material 42 and the other end is extended and fixed to the other connection electrode 39 by a solder preform material 43. The connection is made by a connection plate 44. This plate-shaped connection plate 44 is the most characteristic feature of the present invention, and is not pulled out in the pulling-out direction of the bonding thin wire 40 so that the bonding thin wire 40 does not interfere in the fixing step . The plate-like connection plate 44 is made of EFTEC-6 (copper 99.9%). As shown in FIG. 3, the bare chips of the power MOSFETs 33 and 34 are sealed with an epoxy resin 45 to protect them from outside air.
[0019]
Other circuit components are the same as those in FIG. That is, 9 is a control IC, 10 is a chip capacitor corresponding to C1 to C3 in FIG. 7, and 11 is a chip resistor corresponding to R1 and R2 in FIG. Reference numerals 12 and 13 denote external terminals, which correspond to LP2 and LP3 in FIG. The external terminal is fixed to a pad 14 formed by a part of the conductive path 2 by soldering.
[0020]
FIG. 4 shows the power MOSFETs 33 and 34 monolithically integrated, in which two MOSFETs are integrated on one bare chip. Since the power MOSFETs Q1 and Q2 shown in FIG. 7 have a common drain electrode, they can be miniaturized by making them monolithic. In addition, by disposing the gate electrodes 36 at the two corners in line symmetry, it does not hinder the fixing of the plate-like connection plate 44.
[0021]
FIG. 5 shows a structure in which the plate-like connection plate 44 is drawn from the four sides of the bare chip of the power MOSFET to the other connection electrodes 39 provided adjacent to each side, thereby minimizing the extraction resistance of the source electrode 37. In this case bonding thin line 40 from the gate electrode 36 has been removed from the corners of the bare chip so as not to interfere in the drawer of the plate-shaped connecting plate 44, than the bonding thin line 40 from the gate electrode 36 is the simplicity of the assembly It is better not to provide the connection electrode 39 on one side of the bare chip.
[0022]
FIG. 6 shows actual measured values of the on-resistance of the samples E and F to which the present invention is applied.
From this, the effect of adopting the plate-like connection plate 44 is improved by 3.43 mΩ when the conventional sample B and the sample E of the present invention are compared. By changing from the gold bonding wire to the plate-shaped connection plate 44, the gold bonding wire resistance is reduced to 2.3 mΩ from the resistance of the plate-shaped connection plate 44 to 0.2 mΩ, so that the gold bonding wire resistance is reduced. Is 2.1 mΩ. The reduction effect of changing the resistance of aluminum on the chip surface electrode to the plate-like connection plate 44 provided thereon is estimated to be 1.33 mΩ. The difference between the solder of the preform material 42 for connecting the plate-shaped connecting plate 44 and the silver paste is 0.07 mΩ as compared with the sample E and the sample F, and there is no difference as much as the characteristic of the material. This is because the preform material 42 is extremely thin with respect to the area. In the above description, the power MOSFET is used as the switching element. However, the same effect can be obtained by using an IGBT as the large current composite element.
[0023]
【The invention's effect】
According to the present invention, first, since the bare chips 33 and 34 of the switching element are fixed to the fixed electrode 35, the drain electrode can be multilayer-wired to the conductive path on the lower surface of the insulating substrate 31 from the fixed electrode, and the four sides of the fixed electrode 35 All have the flexibility to arrange the connection electrodes 38 and 39. Therefore, the direction in which the gate electrode 36 is drawn out and the direction in which the source electrode 37 is drawn out can be made opposite, and the plate-like connecting plate 44 can be employed as a means for drawing out the source electrode 37. As a result, the on-resistance can be remarkably reduced by about 30% from 12.10 mΩ of the conventional sample B to 8.67 mΩ of the sample E of the present invention.
[0024]
Secondly, the bare chips 33 and 34 of the switching elements have lower surfaces in contact with the fixed electrodes 35 formed of copper foil, and most of the upper surfaces thereof are in contact with the plate-like connection plate 44, so that a structure with extremely good heat dissipation is provided. Is realized. For this reason, even if a load short-circuit or an overcurrent flows, unlike the conventional fine bonding wire made of gold wire, the plate-like connection plate 44 does not melt immediately, and can also radiate heat immediately upon generation of heat. A bare chip mounting structure of a strong switching element can be realized.
[0025]
Third, since the present invention can propose a mounting structure having good on-resistance and good heat radiation, the bare chip size of the switching element may be further reduced if the same specifications as in the past are sufficient, and the protection circuit board may be reduced in size. Can be answered.
[0026]
Fourth, in the present invention, since the bare chips 33 and 34 of the switching elements are mounted, the thickness of the molding resin can be omitted compared to the outer shape of the SOP 8 (5.0 × 6.0 × 1.6 mm). Compact and thin. This greatly contributes to downsizing of the protection circuit board.
[0027]
Fifth, by making the bare chip of the switching element monolithic, the chip size can be further reduced, which can contribute to downsizing.
[0028]
Sixth, by extending the plate-like connection plate 44 to three or more sides and connecting it to the connection electrode 39, the take-out resistance of the source electrode 37 can be significantly reduced, and the on-resistance can be further reduced. The maximum current can be realized with a small chip size by maximizing.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a mounting structure of a bare chip of a switching element of the present invention.
FIG. 2 is a diagram illustrating a mounting structure of a bare chip of a switching element of the present invention.
FIG. 3 is a diagram illustrating a mounting structure of a bare chip of the switching element of the present invention.
FIG. 4 is a diagram illustrating a mounting structure of a bare chip of a switching element according to another embodiment of the present invention.
FIG. 5 is a diagram illustrating a mounting structure of a bare chip of a switching element according to another embodiment of the present invention.
FIG. 6 is a diagram illustrating characteristics of a mounting structure of a bare chip of a switching element according to the present invention.
FIG. 7 is a diagram illustrating a protection circuit that performs battery management to which the present invention is applied.
FIG. 8 is a diagram illustrating a mounting structure of a protection circuit board using a conventional switching element.
FIG. 9 is a diagram illustrating a mounting structure of a conventional switching element.
FIG. 10 is a diagram illustrating a mounting structure of a conventional switching element.
FIG. 11 is a diagram illustrating a mounting structure of a conventional switching element.

Claims (5)

絶縁基板と、
前記絶縁基板上に形成される所望のパターンの導電路と、
前記導電路の一部で構成される固着電極と、
前記固着電極にダイボンドされ、その上面に制御電極と、該制御電極よりも大きい面積の電流通過電極とを備えたスイッチング素子のベアチップと、
前記固着電極の近くに配置され且つ前記制御電極および前記電流通過電極とそれぞれ接続される接続電極と、
前記制御電極と一方の前記接続電極とを電気的に接続する細線と、
一方の端部を前記電流通過電極の大部分と重畳して電気的に接続され且つ他方の端部を他方の前記接続電極まで延在して電気的に接続される板状接続板とを備え、
前記板状接続板を前記スイッチング素子のベアチップの前記制御電極に接続された前記細線が超える１辺を除く３辺に延在させて前記他方の接続電極に接続することを特徴とするスイッチング素子のベアチップの実装構造。An insulating substrate;
A conductive path of a desired pattern formed on the insulating substrate,
A fixed electrode formed by a part of the conductive path;
A bare chip of a switching element, which is die-bonded to the fixed electrode and has a control electrode on its upper surface and a current passing electrode having an area larger than the control electrode,
A connection electrode disposed near the fixed electrode and connected to the control electrode and the current passing electrode, respectively;
A thin wire for electrically connecting the control electrode and one of the connection electrodes,
A plate-like connection plate, one end of which overlaps and is electrically connected to most of the current passing electrode, and the other end of which extends to the other connection electrode and is electrically connected. ,
The switching element, wherein the plate-like connection plate is extended to three sides excluding one side exceeding the thin line connected to the control electrode of the bare chip of the switching element and connected to the other connection electrode . Bare chip mounting structure. ２つの前記スイッチング素子のベアチップが前記固着電極にダイボンドされることを特徴とする請求項１記載のスイッチング素子のベアチップの実装構造。2. The mounting structure according to claim 1, wherein two bare chips of the switching element are die-bonded to the fixed electrode. 前記２個のスイッチング素子のベアチップをモノリシック構造に形成したことを特徴とする請求項２記載のスイッチング素子のベアチップの実装構造。3. The mounting structure according to claim 2, wherein the bare chips of the two switching elements are formed in a monolithic structure. 前記板状接続板を前記電流通過電極に固着するプリフォーム材を半田あるいは銀ペーストとすることを特徴とする請求項１記載のスイッチング素子のベアチップの実装構造。The mounting structure of a bare chip for a switching element according to claim 1, wherein a preform material for fixing the plate-like connection plate to the current passing electrode is made of solder or silver paste. 前記制御電極および電流通過電極を金あるいは銀で形成することを特徴とする請求項１に記載のスイッチング素子のベアチップの実装構造。The mounting structure for a bare chip of a switching element according to claim 1, wherein the control electrode and the current passing electrode are formed of gold or silver.
JP2000010982A 2000-01-19 2000-01-19 Switching element bare chip mounting structure Expired - Fee Related JP3557143B2 (en)

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US8966749B2 (en) 2008-10-28 2015-03-03 Samsung Sdi Co., Ltd. Manufacturing method for protection circuit module of secondary battery
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