JP3545255B2 - Digital modulator - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a digital modulation device.
[0002]
[Prior art]
When a signal is recorded on a high-density magneto-optical disk or the like, a plurality of fixed patterns are inserted into the signal, or an XOR (exclusive or) operation is performed to generate a plurality of converted signals. A converted signal exhibiting desired characteristics may be selected. Here, as the above characteristics, the fact that the DC component is suppressed most is cited.
[0003]
[Problems to be solved by the invention]
Here, when the code used for the XOR operation is calculated as all possible codes in the N-bit code and the XOR operation is performed using the most appropriate code, a unit for performing the XOR operation is used. There is a problem that 2 @ N powers are required and the circuit scale becomes large. For example, when using a 4-bit code, 16 units are required.
[0004]
Accordingly, an object of the present invention is to provide a digital modulation device with a reduced circuit scale.
[0005]
[Means for Solving the Problems]
SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and firstly, an arithmetic processing unit for performing an XOR operation on input data and a scramble pattern for every N bits, and a calculation result by the arithmetic processing unit And a peak detector for detecting the peak value of the DSV, and a first peak value detected by the peak detector and an offset value are compared, and the first peak is compared with the offset value according to the comparison result. An offset processing unit for calculating a second peak value by adding the value as it is or by inverting the sign, and a digital modulation device comprising a plurality of modulation units arranged for different data patterns, further comprising: A predetermined modulation unit is selected based on a second peak value from the modulation unit, and the first peak is selected in the offset processing unit of the modulation unit. When the sign of is inverted, the result of the operation by the operation processing unit of the modulation unit is inverted and output, and when the sign of the first peak value is left as it is in the offset processing unit of the modulation unit, And a selector for directly outputting the calculation result of the modulation unit by the calculation processing unit.
[0006]
In the digital modulation device having the first configuration, first, each arithmetic processing unit in each of the plurality of modulation units performs an XOR operation on the input data and the scramble pattern for every N bits. Then, the peak detection unit detects a DSV peak value with respect to a calculation result by the calculation processing unit. Then, the offset processing unit compares the first peak value detected by the peak detection unit with the offset value, and, based on the comparison result, uses the first peak value with respect to the offset value as it is or changes the sign. Invert and add to calculate the second peak value. The processing of this modulation unit is performed for each different data pattern in each modulation unit.
[0007]
Then, the selection unit selects a predetermined modulation unit based on the second peak value from each of the modulation units, and inverts the sign of the first peak value in the offset processing unit of the modulation unit. In the case where the result of the operation by the arithmetic processing unit of the modulation unit is inverted and output, and the sign of the first peak value is left as it is in the offset processing unit of the modulation unit, the operation of the modulation unit The calculation result by the processing unit is output as it is.
[0008]
As described above, the sign of the first peak value and the sign of the offset value are compared to invert the sign of the first peak value in a predetermined case. In this case, the smaller absolute value can be calculated. That is, other data patterns having a symmetric DSV can be considered, and as a result, the number of modulation units can be halved and the circuit scale can be reduced.
[0009]
Secondly, in the first configuration, when the sign of the first peak value is different from the sign of the offset value, the offset processing unit may invert the sign of the first peak value. Is added to the offset value.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiments of the present invention will be described with reference to the drawings. A digital modulation circuit A as a digital modulation device according to the present invention is a circuit that performs NRZI-Plus modulation, and this NRZI-Plus modulation is a modulation method based on NRZI modulation. As shown in FIG. 1, the digital modulation circuit A includes modulation units U-1 to U-8, a determination unit 40, a selection unit 50, and an NRZI encoder 60.
[0013]
Here, each modulation unit in the modulation units U-1 to U-8 has a scramble 10 and a DSV calculation unit 20, as shown in FIG. Further, the scramble 10 as the arithmetic processing unit includes an XOR operation unit 12, a D latch 14, and a selector 16, as shown in FIG. Further, the DSV calculation unit 20 includes a CDS conversion unit 22, an addition / subtraction unit 24, a peak hold unit 26, and an offset setting unit 28.
[0014]
Here, the XOR operation unit 12 performs an XOR operation on the input data and the output of the selector 16. The D latch 14 holds the output result of the XOR operation unit 12 in a predetermined clock cycle unit. At the start of the DSV calculation period, the selector 16 outputs the scramble pattern as the data pattern, and otherwise selects and outputs the output of the D latch 14.
[0015]
The CDS conversion unit 22 has a CDS conversion table as shown in FIG. 7 and converts code data for each 4 bits output from the D latch 14 into a CDS (Cord word Digital Sum) according to the CDS conversion table. I do. In the CDS conversion table shown in FIG. 7, when each bit in the data is “0”, +1 is assigned, and when each bit is “1”, −1 is assigned. That is, when the data is “0000”, the value is +4. The addition / subtraction unit 24 performs cumulative addition of the output from the CDS conversion unit 22 during the DSV operation period.
[0016]
The peak hold unit 26 serving as the peak detection unit monitors the output of the addition / subtraction unit 24, and sets the DSV value at which the absolute value of the DSV becomes maximum during the DSV calculation period (this is referred to as “first peak DSV”). Ask for. This first peak DSV corresponds to the first peak value.
[0017]
The offset setting unit 28 as the offset processing unit performs a process of adding a reference peak DSV to the first peak DSV output by the peak hold unit 26 in units of a DSV calculation period, and outputs the result to the second peak DSV. Is output to the determination unit 40. This second peak DSV corresponds to the second peak value. Regarding this reference peak DSV, in the period immediately before the target DSV calculation period, the second peak DSV output from each modulation unit having the smallest absolute value is selected, and the determination unit 40 sets the offset setting unit 28. , And that value is used as the reference peak DSV. When adding the reference peak DSV to the first peak DSV, the offset setting unit 28 determines whether the sign of the reference peak DSV is the same as the sign of the first peak DSV, If they are the same, the addition is performed by inverting the sign of the first peak DSV, and if they are different, the addition is performed as it is.
[0018]
That is, as shown in FIG. 3, the offset setting unit 28 includes a code determination unit 30 that compares the code of the reference peak DSV from the determination unit 40 with the code of the first peak DSV from the peak hold unit 26, and a code determination unit 30. A code adjusting unit 32 that adjusts the sign of the first peak DSV according to the determination result in the unit 30; and an adding unit 34 that adds the reference peak DSV and the first peak DSV whose sign has been adjusted in the sign adjusting unit 32. Have.
[0019]
The sign determination unit 30 compares the sign of the first peak DSV from the peak hold unit 26 with the sign of the reference peak DSV from the discrimination unit 40 to determine whether the signs match. The determination result is sent to the code adjustment unit 32 and the selection unit 50. Further, the sign adjustment unit 32 performs a process of adjusting the sign of the first peak DSV according to the result of the judgment by the sign judgment unit 30. Specifically, when it is determined that the sign of the first peak DSV matches the sign of the reference peak DSV, the sign of the first peak DSV is inverted, while the sign of the first peak DSV and the reference peak DSV are reversed. If it is determined that the sign does not match, the sign of the first peak DSV is left as it is. The adder 34 performs a process of adding the first peak DSV sent from the code adjuster 32 and the reference peak DSV sent from the determiner 40.
[0020]
Further, the determination unit 40 compares the second peak DSV sent from the offset setting unit 28 of each of the modulation units U-1 to U-8, selects the one with the smallest absolute value, and selects the one with the smallest absolute value. Information for specifying the unit that has output the second peak DSV is output to the selection unit 50.
[0021]
Further, the selection unit 50 selects one of the code data output from the scramble 10 of each modulation unit according to the information from the determination unit 40, and outputs the selected code data to the NRZI encoder 60. At this time, according to the determination result from the code determination unit 30, in a predetermined case, a process of inverting the code data is performed. More specifically, if the code of the first peak DSV does not match the code of the reference peak DSV, the code data is left as it is, and if the code of the first peak DSV matches the code of the reference peak DSV. , The sign data is inverted.
[0022]
That is, specifically, as shown in FIG. 4, the selection unit 50 includes a selection processing unit 52, an inversion determination unit 54, and an inversion processing unit 56. The selection processing unit 52 selects one of the code data according to the information from the determination unit 40. In addition, the inversion determination unit 54 determines whether or not to perform the inversion processing according to the information from the sign determination unit 30 in the offset setting unit 28. The inversion processing unit 56 performs a process of inverting the code data sent from the inversion determination unit 54. The selection unit 50 also functions as the selection processing unit.
[0023]
In the digital modulation circuit A, eight modulation units are provided. Of the four-bit scramble patterns, the modulation units respectively corresponding to the scramble patterns “0000” to “0111” are provided. Is provided. That is, a modulation unit corresponding to each scramble pattern having no symmetry is provided. For example, modulation unit U-1 corresponds to "0000", modulation unit U-2 corresponds to "0001", modulation unit U-3 corresponds to "0010", and modulation unit U-4 corresponds to "0011". , The modulation unit U-5 corresponds to “0100”, the modulation unit U-6 corresponds to “0101”, the modulation unit U-7 corresponds to “0110”, and the modulation unit U-8 corresponds to “0100”. 0111 ”. That is, no modulation unit corresponding to each of the scramble patterns “1000” to “1111” is provided.
[0024]
The operation of the digital modulation circuit A having the above configuration will be described. First, input data as 4-bit digital data is input to each of the modulation units U-1 to U-8 at a cycle of 4 system clocks. Then, at the start of the DSV calculation period, the selector 16 is switched to the scramble pattern (Redundant Bit) side, and the XOR calculation unit 12 performs the XOR calculation on the 4-bit input data and the scramble pattern. The scrambling pattern is a 4-bit scrambling pattern unique to each modulation unit. For example, if a certain modulation unit corresponds to “0000”, “0000” is input to the XOR operation unit 12. Then, the operation result is held in the D latch 14 in four system clock cycles. Then, in the subsequent processing during the DSV operation period, the selector 16 is switched to the D latch 14 side, and the data held in the D latch 14 and the next 4-bit data in the input data are XORed. . Thereafter, the processing of XORing the data held in the D latch 14 and the input data as described above is repeated.
[0025]
The output result of the D latch 14 is sequentially sent to the selector 50 and the CDS converter 22 as 4-bit code data. The CDS conversion unit 22 calculates the CDS from the code data in four system clock cycles according to a CDS conversion table as shown in FIG. For example, when the code data output from the D latch 14 is “0000”, the value is +4, and when the code data is “1101”, the value is −2. Then, the addition / subtraction unit 24 performs the cumulative addition / subtraction of the CDS calculated by the CDS conversion unit 22 during the DSV calculation period, and calculates the DSV. For example, when the first code data is "0000", the value is +4, and when the next code data is "0010", +2 is added to +4 to be +6. For example, in the case of code data of “1111”, -4 is added, that is, 4 is subtracted. FIG. 8 shows an example of the time shift of the DSV.
[0026]
Here, in FIG. 8, the transition indicated by the solid line indicates the transition during the DSV period when a scramble pattern of “0010” is used for certain input data, while the transition indicated by the dashed line indicates the same transition. A case where a scramble pattern of “1101” is used for input data is shown, and the transition shown by the solid line and the transition shown by the broken line are symmetrical over the time axis. That is, when the result of performing the XOR operation between the scramble patterns is “1111”, the time shift of the DSV within one DSV operation period is symmetric via the time axis. That is, the addition between DSVs generated from the two symmetric scramble patterns is zero. A scramble pattern in which the result of performing an XOR operation between the scramble patterns is “1111” is referred to as a scramble pattern that is symmetric to each other.
[0027]
Note that, in the 4-bit scrambling pattern, the symmetric scrambling relationship is as shown in FIG. For example, the transition of DSV when a scramble pattern of “0000” is used for certain input data and the transition of DSV when a scramble pattern of “1111” is used are symmetrical over the time axis. “0001” and “1110” are symmetric. Note that a DSV calculation period of one cycle is normally a period of 368 bits, that is, 92 system clock cycles, and the maximum value that DSV can logically take is 92 × 4 = + 368 (4 is The maximum value in one addition and subtraction (see FIG. 7) is obtained, and the minimum value is -368.
[0028]
Next, the peak hold unit 26 obtains a DSV value whose absolute value is maximum (maximum) during the DSV calculation period, that is, a first peak DSV. For example, assuming that the displacement of the addition / subtraction unit 24 is as shown by the solid line in FIG. 8, the value α of the peak X1 becomes the first peak DSV. Assuming that the data for one cycle of the DSV period is one data block, the first peak DSV is obtained by the DSV peak value in the data of one data block. Note that the data for one data block in the input data is an input data block.
[0029]
Then, in the offset setting unit 28, the sign determination unit 30 compares the sign of the first peak DSV with the sign of the reference peak DSV from the discrimination unit 40, and determines whether the signs match. For example, when the first peak DSV is +30 and the reference peak DSV is +5, it is determined that the signs match, and when the first peak DSV is +30 and the reference peak DSV is -5, the signs do not match. Will do. The determination information on this determination result is sent to the code adjustment unit 32 and the selection unit 50.
[0030]
Then, the sign adjusting unit 32 adjusts the sign of the first peak DSV. That is, when it is determined that the signs match, the sign of the first peak DSV is inverted. For example, when the first peak DSV is +30 and the reference peak DSV is +5, the value of the first peak DSV is set to −30. If it is determined that the signs do not match, the sign is not inverted as described above.
[0031]
Then, the adding unit 34 calculates the second peak DSV by adding the first peak DSV from the code adjusting unit 32 and the reference peak DSV from the determining unit 40. For example, when the first peak DSV is +30 and the reference peak DSV is +5, -30 and +5 are added, so that it becomes -25. The adder 34 sends the value of the second peak DSV to the determiner 40. In the above example, information of a value of −25 is sent.
[0032]
Then, the determination unit 40 compares the values of the second peak DSV sent from each of the eight modulation units, selects the second peak DSV having the smallest absolute value, and selects the second peak DSV having the smallest value. Is transmitted to the selection processing unit 52 of the selection unit 50. The relationship between the transmitted second peak DSV and the modulation unit can be identified by a terminal to which each second peak DSV is transmitted. When transmitting the second peak DSV from the offset setting unit 28, information for specifying the modulation unit may be transmitted.
[0033]
Then, in accordance with the information from the determination unit 40, the selection unit 50 selects the code data from the modulation unit that has output the minimum second peak DSV. The selected code data is sent to the inversion determining unit 54. Further, the inversion determining unit 54 determines whether or not to perform an inversion process according to the information from the sign determination unit 30. Specifically, if the determination result is the same code, the code data is inverted, while if the determination result is a different code, the code data is left as it is. If it is determined that the inversion processing is to be performed, the code data is sent to the inversion processing unit 56. Otherwise, the code data is output as it is and sent to the NRZI encoder 60. The inversion processing unit 56 performs a process of inverting the code data, and sends the code data to the NRZI encoder 60. For example, if a part of the code data from the modulation unit is “1011”, the code data is inverted to “0100”. Note that, specifically, the selection unit 50 outputs the data for one cycle of the DSV operation period, that is, the code data for 368 bits in the above example to the NRZI encoder 60.
[0034]
Here, the reason for adjusting the code in the offset setting unit 28 as described above is as follows. That is, as described above, when the result of performing the XOR operation between the scramble patterns is “1111”, the time shift of the DSV within one DSV operation period is as shown in FIG. Via the symmetric. Therefore, when digital modulation is performed using a 4-bit scramble pattern, basically, it is only necessary to calculate peak DSVs for eight scramble patterns and compare their absolute values. However, since the offset needs to be set as described above, the adjustment is required.
[0035]
Here, considering a case where a DSV transition is obtained for a certain scramble pattern, there is a scramble pattern that indicates a transition that is symmetric with respect to the transition via the time axis. That is, the peak of one transition and the peak of the other transition have the same absolute value and opposite signs. In this pair of peak values, the positive peak value is defined as a positive first peak DSV, and the negative peak value is defined as a negative first peak DSV. For example, as shown in FIG. 8, the transition of the DSV in the case of “0010” and the transition of the DSV in the case of “1101” are symmetric, and the peak value in the transition of the DSV in the case of “0010” is α, and “ Assuming that the value of the peak Y1 in the DSV transition in the case of “1101” is β, α = −β. Α is the positive first peak DSV, and β is the negative first peak DSV.
[0036]
Next, when the reference peak DSV is added, when the sign of the reference peak DSV is positive, the absolute value of the positive first peak DSV becomes larger, and the absolute value of the negative first peak DSV becomes Become smaller. Since the minimum of the second peak DSV is selected in the discriminating section 40, if the sign of the reference peak DSV is positive in the positive first peak DSV and the negative first peak DSV, There is no possibility that the first positive peak DSV is selected. Therefore, when the sign of the first peak DSV is positive, the sign of the first peak DSV is inverted and added to the reference peak DSV to obtain the second peak DSV. In that case, as a result, the second peak DSV for another symmetric scramble pattern is calculated. That is, in the example of the shift of the DSV of the scramble pattern of “0010” in FIG. 8, the peak value, that is, the first peak DSV is positive. Therefore, when the reference peak DSV is positive, the first peak DSV is The sign is inverted and added, which means that the second peak DSV in the case of the symmetric scramble pattern “1101” is calculated.
[0037]
Similarly, when the sign of the reference peak DSV is negative, the negative first peak DSV has a larger absolute value and the positive first peak DSV has a smaller absolute value. In the case of, the reference peak DSV is added as it is, while if the first peak DSV is negative, the sign is inverted and added. That is, by adjusting the sign in the sign adjustment unit 32 as described above, one out of two candidates to be selected by the determination unit 40 is excluded.
[0038]
For example, in the example of FIG. 8, when the peak value of “0010” is +30 and the reference peak DSV added thereto is +5, the peak DSV that takes the offset into account as before is calculated to be +35. Since the peak value of “1101” is −30, it is −25. Comparing the two, the absolute value is smaller at -25. In the above example, the result is the same as outputting the second peak DSV having the smaller absolute value of the two second peaks DSV.
[0039]
In calculating the first second peak DSV in a certain DSV calculation period, since the reference peak DSV does not exist, processing is performed with the reference peak DSV set to 0. As described above, when the reference peak DSV is 0, the sign determination unit 30 may input a signal that maintains the sign, that is, a signal indicating that the signs do not match, to the sign adjustment unit 32. When the reference peak DSV is 0 as described above, the absolute value is compared in the determination unit 40 regardless of the sign of the first peak DSV, so that the determination result of the determination unit 40 is the same. However, in order to prevent the selection unit 50 from inverting the code data, the sign adjustment unit 32 sends a signal whose sign is not inverted.
[0040]
In addition, different from the above, the offset setting unit 28 may be configured as follows. That is, as shown in FIG. 5, an adding unit 70, a sign inverting unit 72, an adding unit 74, and a comparing unit 76 are provided. The adding section 70 adds the first peak DSV from the peak hold section 26 and the reference peak DSV as they are. This addition result is set as a first addition value. On the other hand, the sign inverting unit 72 inverts the sign of the first peak DSV from the peak hold unit 26, and the adding unit 74 adds the inverted first sign DSV and the reference peak DSV. This addition result is used as a second addition value. Then, the addition result, that is, the first addition value and the second addition value are compared by the comparison unit 76, and the smaller one of the absolute values is selected and sent to the determination unit 40 as the second peak DSV. . At this time, the selection unit 50 informs the selection unit 50 of whether or not the comparison unit 76 has selected the sign-inverted one, that is, whether the value from the addition unit 70 has been selected or the value from the addition unit 74. Send information about your choice. In this manner, the sum of the first peak DSV and the reference peak DSV in the symmetric scramble pattern is calculated, and the smaller absolute value can be selected.
[0041]
Further, as described above, the reason why the selecting unit 50 inverts the code data when the determination result in the code determining unit 30 is the same code is as follows. That is, when the determination result is the same sign, the sign of the first peak DSV is inverted as described above, and as a result, the first peak of the scramble pattern symmetric to the actually used scramble pattern is consequently obtained. This means that the second peak DSV is calculated by adding the reference peak DSV to the DSV. If the second peak DSV is selected as having the minimum absolute value, the code data to be selected must be the result of an XOR operation using a scrambling pattern symmetric to the actually used scrambling pattern. . Then, to obtain the result, the code data should be inverted.
[0042]
When the offset setting unit 28 is configured as shown in FIG. 5, the selection unit 50 operates as follows. That is, when the selecting unit 50 selects code data from a certain modulation unit, the selection information indicating that the value from the adding unit 70 is set to the second peak DSV is transmitted from the comparing unit 76 of the modulation unit. If the selection information indicating that the value from the adder 74 is the second peak DSV is transmitted from the comparator 76 of the modulation unit, the code data is output as it is. Outputs the code data inverted.
[0043]
By configuring the digital modulation circuit A as described above, the number of modulation units can be reduced to half that of the conventional one. That is, by utilizing the symmetry in the XOR operation, one modulation unit is substantially in charge of processing for two scramble patterns that are symmetric to each other, and the code data is inverted in a predetermined case to reduce the circuit scale. are doing.
[0044]
In the above description of the first embodiment, it has been described that the first peak DSV held by the peak hold unit 26 is one. However, as a second embodiment, a positive peak and a negative peak are held. Then, the data may be sent to the offset setting unit 28. The reason why the two peak values are output in this manner is as follows. That is, when the peak value detected by the peak hold unit 26 is one, there is no problem if the absolute value of the reference peak DSV is small and the fluctuation exerted by the reference peak DSV is small, but this reference peak DSV is added. Therefore, after adding the reference peak DSV, the peak value having the opposite sign to the first peak DSV may become the second peak DSV. For example, even in the transition shown by the solid line in FIG. 8, when the reference peak DSV is a negative value and the value is considerably large, the absolute value of the peak X2 which is the negative peak may become the maximum. is there. Therefore, two peak values are held.
[0045]
Specifically, the peak hold unit 26 holds two peaks, a positive peak value and a negative peak value. That is, the first peak DSV on the positive side and the first peak DSV on the negative side are detected and held. The first peak DSV on the positive side corresponds to the first peak value on the positive side, and the first peak DSV on the negative side corresponds to the first peak value on the negative side. Further, the offset setting unit 28 is configured as shown in FIG. That is, an adding section 80, a sign inverting section 82, an adding section 84, a first comparing section 86, a first comparing section 88, and a second comparing section 90 are provided. The adder 80 adds the reference peak DSV as it is with respect to the two positive peaks DSV on the positive side and the negative side from the peak hold unit 26, and calculates the positive first addition value and the negative first addition value. calculate. On the other hand, the sign inverting unit 82 inverts the signs of the two first peaks DSV from the peak hold unit 26, and the adding unit 84 adds the two first peaks DSV whose signs are inverted and the reference peak DSV. Then, the positive second addition value and the negative second addition value are calculated.
[0046]
Then, the addition result in the addition unit 80 is sent to the first comparison unit 86, and the first comparison unit 86 compares the two addition results, that is, the positive first addition value and the negative first addition value. The one with the larger absolute value is selected as the first addition result. That is, the peak value after the offset is extracted in the DSV transition of a certain scramble pattern. Similarly, the addition result in the addition unit 84 is sent to the first comparison unit 88, and the first comparison unit 88 compares the two addition results, that is, the positive second addition value and the negative second addition value. The larger absolute value is selected as the second addition result. That is, the peak value after the offset is extracted in the DSV transition of the symmetric scramble pattern.
[0047]
Then, the second comparing section 90 compares the value sent from each of the first comparing sections 86 and 88, that is, the first addition result and the second addition result, and determines the smaller one of the absolute value as the second peak DSV. To the discriminator 40. The selection unit 50 also sends selection information indicating whether the comparison unit 90 has selected a value from the first comparison unit 86 or a value from the first comparison unit 88.
[0048]
For example, when the value of the peak X1 on the positive side is +30 and the value of the peak X2 on the negative side is −25 in the DSV transition indicated by the solid line in FIG. 8, the information of the values of +30 and −25 is positive. The first peak DSV on the negative side and the negative side is sent to the adding section 80 and the sign inverting section 82. If the reference peak DSV is -10, the addition result of the addition unit 80 is +20 and -35, and the addition result of the addition unit 84 is -40 and +15. Then, the first comparing section 86 compares +20 and −35 and selects −35. Further, the first comparing section 88 compares -40 and +15, and selects -40. Then, the second comparing section 90 compares −35 and −40 and selects −35 having a small absolute value.
[0049]
Then, when the selecting section 50 selects code data from a certain modulation unit, the value from the second comparing section 90 to the first comparing section 86 of the modulation unit is set as the second peak DSV. When the selection information is transmitted, the code data is output as it is, and conversely, the selection information indicating that the value from the first comparing section 88 of the modulation unit is the second peak DSV is transmitted. In this case, the code data is inverted and output.
[0050]
As described above, the peak on the positive side and the peak on the negative side are taken into account, so that even when the absolute value of the reference peak DSV is large, it is possible to select a scramble pattern in which the DC component is appropriately suppressed. That is, in the above example, that is, when the value of the positive side peak X1 is +30, the value of the negative side peak X2 is −25, and the reference peak DSV is −10, in the first embodiment, the value of +20 is The second DSV is output to the determination unit 40. In the second embodiment, the peak value after the offset is appropriately selected by considering a peak having a polarity different from the polarity that becomes the peak in a certain DSV transition. You can do it.
[0051]
In the scramble 10, a data block constituting a data block in which each scramble pattern is added to the head of an input data block, and an XOR operation is sequentially performed on the data block in which the above-described scramble pattern is inserted for every four bits from the head. An XOR operation unit may be provided. In this case, the XOR operation unit performs an XOR operation on the first 4 bits and the immediately following 4 bits, further XORs the result of the XOR operation with the immediately succeeding 4 bits, and sequentially rearwards. This process will be repeated. Note that the position where the scramble pattern is added and inserted is not limited to the head of the input data block.
[0052]
In the above description, a 4-bit scramble pattern is used. However, a scramble pattern of another 2N bits (N is an integer of 1 or more) may be used. That is, 2 bits, 8 bits, etc. may be used. In that case, half the number of modulation units equal to 2 N is provided, and the correspondence for the 2 N codes is defined in the CDS conversion table (see FIG. 7). Become.
[0053]
【The invention's effect】
According to the modulation device of the present invention, the code data in which the DC component is most suppressed is selected by using the symmetry of the XOR operation, so that the circuit scale of the modulation circuit can be reduced. In particular, when detecting the peak value in the DSV, when the peak value on the positive side and the peak value on the negative side are detected, the DC component is appropriately suppressed even when the offset value, that is, the absolute value of the reference peak DSV is large. The selected scramble pattern can be selected.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a digital modulation circuit according to an embodiment of the present invention.
FIG. 2 is a block diagram illustrating a configuration of a modulation unit.
FIG. 3 is a block diagram illustrating a configuration of an offset setting unit.
FIG. 4 is a block diagram illustrating a configuration of a selection unit.
FIG. 5 is a block diagram illustrating a configuration of another example of an offset setting unit.
FIG. 6 is a block diagram illustrating a configuration of another example of an offset setting unit.
FIG. 7 is an explanatory diagram illustrating an example of a CDS conversion table.
FIG. 8 is an explanatory diagram illustrating an example of time transition of DSV.
FIG. 9 is an explanatory diagram showing a relationship between a scramble pattern and a peak value of DSV.
[Explanation of symbols]
A Digital modulation circuit
U-1 to U8 Modulation unit
10 Scramble
12 XOR operation part
14 D latch
16 selector
20 DSV calculator
22 CDS converter
24 Addition / subtraction unit
26 Peak hold section
28 Offset setting section
30 Sign judgment unit
32 sign adjustment unit
34, 70, 74, 80, 84 Adder
40 discriminator
50 Selector
52 Selection processing unit
54 Inversion judgment unit
56 Inversion processing unit
72, 82 Sign inversion unit
76 Comparison section
86, 88 1st comparison section
90 Second comparison section

Claims (2)

An operation processing unit that performs an XOR operation on the input data and the scramble pattern every N bits;
A peak detection unit for detecting a peak value of DSV with respect to a calculation result by the calculation processing unit;
The first peak value detected by the peak detection unit is compared with an offset value, and the first peak value is added to the offset value as it is or by reversing the sign and adding the first peak value to the offset value according to the comparison result. (2) an offset processing unit for calculating a peak value;
Digital modulation device comprising a plurality of modulation units having different for each data pattern, further comprising:
When a predetermined modulation unit is selected based on the second peak value from each of the modulation units, and the sign of the first peak value is inverted in the offset processing unit of the modulation unit, When the result of the operation by the operation processing unit is inverted and output, and the sign of the first peak value is left as it is in the offset processing unit of the modulation unit, the operation result by the operation processing unit of the modulation unit is left as it is. A selection unit to output,
A digital modulation device comprising: If the sign of the first peak value is different from the sign of the offset value, the offset processing unit inverts the sign of the first peak value and then adds the sign to the offset value. 2. The digital modulation device according to 1.

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