JP3243137B2 - Data conversion method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for converting data while suppressing a DC component when data is recorded at a high density on a recording medium or transmitted in a band-limited transmission system.

[0002]

2. Description of the Related Art Generally, in order to record data represented by a binary code at a high density on a recording medium or to transmit the data to a transmission system, a signal suitable for high-density or band limitation before recording or transmission. Convert the data into a waveform. That is, the minimum inversion interval (hereinafter referred to as T
min), and the maximum inversion interval (hereinafter, Tmax) is shortened. This is because if Tmin is long, interference of inversion of adjacent bit information is reduced to enable high density, and if Tmax is short, clock self-synchronization becomes easy. Further, in a transmission system in which a DC component is not transmitted, the waveform is distorted if the signal contains a DC component. Therefore, it is desirable that the DC component be removed by data conversion.

In order to fulfill such a purpose, various RLLs are used.
(Run Length Limited) code has been proposed. Generally, the original data sequence is divided into m-bit blocks,
1 so that the number of bits “0” between adjacent bits “1” after the conversion is d minimum and k maximum.
A data conversion method is used in which one or a plurality of blocks are sequentially converted into codewords with n bits per block. As a specific example, when a redundant data sequence is generated by inserting DC control bits having a predetermined number of bits at predetermined intervals of an input data sequence, a DC component of an output code sequence obtained by performing RLL code conversion on the redundant data sequence is used. Japanese Unexamined Patent Publication No. 4-115575 discloses a configuration in which the value of the DC control bit is determined so that the RLL code conversion is performed after the determined DC control bit is inserted.

FIG. 1 shows a mode of data conversion of the contents described in the publication. In FIG. 1, (A)
As shown in the figure, a predetermined interval (for example, 1
A DC control bit having a predetermined number of bits (for example, 2 bits) is inserted every 26 bits to obtain a redundant data sequence. Thereafter, code conversion is performed so that desired Tmin and Tmax are obtained. In this example, conversion is performed using the conversion table shown in FIG. 2 and the conversion table shown in FIG. That is, in this case, the number m of bits forming the block of the input data sequence is 2, and two adjacent blocks in which both adjacent bits are "1" (hereinafter, referred to as run blocks). Is converted into a 3-bit (and therefore n = 3) binary code in accordance with the conversion rule shown in the conversion table of FIG. 3, and the 2-bit binary code in blocks other than the run block is converted. The code is converted to a 3-bit binary code according to the conversion rules shown in the conversion table of FIG.

As a result, an output code sequence as shown in FIG. 1B is obtained, and the output waveform is NRZI (Non Re
(C) of FIG. 1 by the “turn to Zero Inverted” conversion. In (A), each DC control bit is "00".
Or “11”, the D value of the output waveform of FIG.
The value with the smaller absolute value of SV (Digital Sum Value) is selected. The DSV is obtained by assigning values of +1 and −1 to bit information (symbols) “1” and “0” in an output waveform sequence and sequentially obtaining the sum of each value from the start of the waveform sequence. For example, DS at point a in the output waveform
When V is +1, the value of the next DC control bit is set to “0”.
Assuming that the value of DSV at point b when it is set to "0" or "11" becomes -2 or +6, respectively, "00" in which the absolute value of DSV becomes smaller is selected as the value of the DC control bit.

[0006] By such DSV control, code conversion is performed on the redundant data sequence of FIG. 1A in which the selected DC control bit is inserted, and the output code sequence of FIG. As a result, the desired Tmin and Tmax can be achieved by code conversion independently of the control of the DSV. In this example using the conversion tables of FIGS. 2 and 3,

[0007]

## EQU1 ## Tmin = 4T / 3 Tmax = 16T / 3 Here, T is the bit interval of the redundant data sequence. In order to determine the DC control bit A in such data conversion, code conversion and DSV calculation are performed on the redundant data of all the blocks in the section from the point a to the point b until the DSV evaluation point corresponding to the end of the section. Must be done. However, if the last block AL in the a-b section takes a value of "11" or "01", the value of the next succeeding DC control bit (the next section DC control bit B) at the time of code conversion of the last block. Is not determined, it is not determined whether the code conversion unit of the block AL is the run block.

According to this embodiment, conversion based on the conversion tables shown in FIGS. 2 and 3 is performed, and "00" is set as the DC control bit.
And “11”, even if the last block AL in the a-b section takes a value of “11” or “01”, the code conversion of the last block AL by the evaluation point is performed. And DSV calculation can be determined. For example, when the last block AL in the a-b section takes a value of "11", if the value of the DC control bit B in the next section determined later is "00", the code conversion of the last block AL is performed. , A code conversion unit of a non-run block is adopted, so that "11" of the final block AL is code-converted to "101" according to the conversion rule of FIG. 2, and if the DC control bit B of the next section determined later is determined. If the value is "11", the code conversion unit of the run block is adopted for the code conversion of the last block AL in the a-b section. Therefore, "11" of the last block AL is determined according to the conversion rule of FIG. "1
01 ". in this way,
Regardless of whether the value of the DC control bit B in the next section is “00” or “11”, “1” in the last block of the a-b section
Since “1” is code-converted to the same “101”, if the last block of a certain section is “11”, it is “101” regardless of the value of the DC control bit following the last block.
Can be determined, and the calculation and evaluation of the DSV including that of the final block can be completed by the DSV evaluation point. The same applies to the case where the last block AL in the a-b section takes a value of "01" and other sections.

However, RLL code conversion is performed based on another conversion rule different from the conversion tables shown in FIGS.
If a value other than "00" and "11" is adopted as the value of the DC control bit, if the last block AL in the a-b section takes a value of "11" or "01", the block A is reached before the evaluation point.
It has been found that the code conversion of L and the calculation of DSV cannot be determined.

As a mode in which such a problem occurs, for example, “0” is directly added to the value of the DC control bit to be selected.
3 is adopted as the conversion rule when the code conversion unit is a non-run block, and the conversion table shown in FIG. 3 is used as the conversion rule when the code conversion unit is a run block. There is a case where the conversion table shown in FIG. 4 is employed instead of the table. In this case, for example, if the last block AL in the a-b section takes a value of "11", and if the value of the DC control bit B in the next section determined later is "00", the last block AL Since the code conversion unit of the non-run block is adopted for the code conversion of "1", the code "11" of the last block AL is code-converted to "101" according to the conversion rule of FIG. If the value of the DC control bit B is "11", the code conversion unit of the run block is adopted for the code conversion of the last block AL in the a-b section. According to the conversion rule of 4, "10
It must be transcoded to "0". Thus, when the value of the DC control bit B in the next section is “00” and “1”
Since the code conversion result of "11" of the last block AL of the a-b section differs between the case of "1" and that of the DC control bit B of the next section, the code conversion of the redundant data of the last block AL of the a-b section is different. It cannot be determined until the value is determined. Accordingly, the calculation and evaluation of the DSV including that of the last block cannot be completed by the DSV evaluation point, so that the value of the DC control bit A in the a-b section cannot be determined. Will occur.

[0011]

SUMMARY OF THE INVENTION Accordingly, the present invention provides a method for generating a redundant data sequence by inserting a DC control bit having a predetermined number of bits at predetermined intervals of an input data sequence.
In a data conversion method in which a DC control bit value is determined so that a DC component of an output code sequence obtained by performing RLL code conversion on a redundant data sequence is removed, and RLL code conversion is performed after inserting the determined DC control bit, Another object of the present invention is to provide a data conversion method capable of reliably determining a DC control bit even when any RLL code conversion rule of a plurality of blocks is adopted.

[0012]

According to the data conversion method of the present invention, a redundant data sequence is inserted by inserting a DC control bit having a predetermined number of bits at predetermined bit intervals in an input data sequence represented by a binary code. At the time of generation, a D of a provisional data sequence obtained by sequentially performing code conversion according to a predetermined conversion rule for performing RLL code conversion in units of a maximum of u (u is an integer of 2 or more) blocks is used for the redundant data sequence.
A data conversion method for determining a value of the DC control bit according to the SV, and code-converting a redundant data sequence having the determined DC control bit according to the predetermined conversion rule to generate an output data sequence. , The evaluation point of the DSV for determining the DC control bit is (u−d) from the position immediately before the DC control bit in the redundant data sequence.
1) It is characterized by being placed in front of a number of blocks.

[0013]

According to the data conversion method of the present invention, from the position immediately before one DC control bit (the longest conversion unit block number-
1) The value of the DC control bit arranged before the DC control bit is determined by the DSV evaluation point placed before the number of blocks by the number of blocks, and the DC control bit is set immediately before the DC control bit. The code conversion of the block used for the DSV calculation for determining the value of the DC control bit arranged before is completed.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings. In the data conversion method according to the present invention, as shown in FIG. 1, the DSV evaluation point (indicated by a triangle) is shifted from the block immediately before the DC control bit to the block position immediately before. As a result, the value of the DC control bit
A value is selected such that the DC component up to the DSV evaluation point following the DC control bit, that is, up to the block immediately before the DC control bit next to the DC control bit, becomes small.

[0015] This method does not cause the disadvantages of the prior art. That is, as can be seen from FIG.
The DSV calculation for determining the DC control bit A in the b section has been completed immediately before the last block AL in the ab section, and the last block An to be subjected to the DSV calculation has been completed.
Is a necessary condition for determining the value of the DC control bit A. In the conversion of the block An, as shown in an enlarged manner in FIG. 5, the conversion unit U1 for converting only one of the block An or the block An and its one
A conversion unit U21 for converting two blocks from the immediately preceding block or a conversion unit U22 for converting two blocks between the block An and the next block is applied. Since none of these conversion units straddles the DC control bit B in the next section, the code conversion of the last block An of the subject can be always performed before the DSV evaluation point.
Thus, the calculation of the DSV for determining the value of the DC control bit A does not become impossible.

In other words, the code conversion rule applied to the present embodiment includes a case where two consecutive blocks are collectively converted (that is, a case where the conversion rule of a run block is followed).
Therefore, the DSV calculation for the last block AL in the a-b section is performed by the DS control that follows the DC control bit B in the next section.
Since the longest code conversion unit has a 2-block length while leaving it to DSV calculation performed at the V evaluation point, only one block on the redundant data sequence is used to avoid code conversion performed together with the DC control bit B. The evaluation point is shifted forward so that code conversion can always be determined immediately before the DC control bit.

In general, when code conversion is performed on a maximum of u blocks at a time for a continuous block, D blocks are shifted forward by (u-1) blocks from the DC control bit position.
By setting the SV evaluation points, the code conversion at the DSV evaluation points is determined in any code conversion rules. The value of the DC control bit of the prior art described above is selected so that the DC component immediately before the DC control bit becomes small, and is determined by one DSV evaluation point and the DSV evaluation at the evaluation point. The distance between the DC control bit and the bit (that is, the distance between the DC control bit and the subsequent DSV evaluation point) is larger than that of the present embodiment, and the present embodiment has a higher DC component control than the conventional example. This will reduce efficiency. However, in fact, since the change bit width of the DSV evaluation point with respect to the conventional example can be relatively short, such a decrease in control efficiency is negligible.

In the above embodiment, FIGS.
And that the conversion rule as shown in FIG. 4 is applied. However, in the present invention, the code conversion rule is not limited, and the number of blocks when continuous block data is collectively converted can be grasped. Any other transcoding rules can be used. Further, in the above embodiment, one of “00” and “11” is selected as the DC control bit. However, other values that can be taken as the DC control bit are also selected, and one of them is selected. One may be selected. That is, in the above embodiment, since the DC control bit is 2 bits,
In addition to “00” and “11”, values “10” and “01” can be taken, and one of these four values may be selected. Also, if the number of DC control bits is increased, it is of course possible to select from more values.

[0019]

As described above in detail, according to the data conversion method of the present invention, when a DC control bit having a predetermined number of bits is inserted at a predetermined interval of an input data sequence to generate a redundant data sequence, In a data conversion method in which a DC control bit value is determined so that a DC component of an output code sequence obtained by performing RLL code conversion on a redundant data sequence is removed, and RLL code conversion is performed after inserting the determined DC control bit,
DSV placed before (the longest number of conversion unit blocks −1) blocks from the position immediately before the DC control bit of
At the evaluation point, the value of the DC control bit arranged before the DC control bit is determined, and the value of the DC control bit arranged before the DC control bit is determined immediately before the one DC control bit. The code conversion of the block used for the DSV calculation is completed, so that the DC control bit can be reliably determined regardless of the RLL code conversion rule of one or a plurality of blocks.

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of RLL code conversion according to the related art and the present invention.

FIG. 2 is a chart showing an example of a non-run block conversion rule.

FIG. 3 is a table showing an example of a run block conversion rule.

FIG. 4 is a table showing another example of a run block conversion rule.

FIG. 5 is a diagram for explaining the operation and effect of the RLL code conversion according to the present invention.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03M 7/14

Claims (1)

(57) [Claims] When a redundant data sequence is generated by inserting a DC control bit having a predetermined number of bits at predetermined bit intervals in an input data sequence represented by a binary code, the redundant data sequence is generated by a maximum of u. (U is an integer of 2 or more)
The value of the DC control bit is determined according to the DSV of a provisional data sequence obtained by sequentially performing code conversion according to a predetermined conversion rule for performing RLL code conversion in units of blocks.
A data conversion method for generating an output data sequence by code-converting a redundant data sequence having a DC control bit having the determined value according to the predetermined conversion rule, wherein a DSV evaluation point for determining the DC control bit is provided. Is placed in the redundant data sequence by (u-1) blocks before the position immediately before the DC control bit.