JPH08223046A - Data conversion method - Google Patents

Abstract

PURPOSE: To surely decide a DC control bit by setting a DSV evaluation point needed for decision of the DC control bit at a position preceding the immediately precedent position of the DC control bit by an extent equal to (lowest conversion unit block number -1) pieces of blocks in the redundant data series. CONSTITUTION: The DSV evaluation point is set at a position preceding the immediately precedent position of a DC control bit of 1 by an extent equal to (longest conversion unit block number -1) pieces of blocks. Then the value of a DC control bit that is set before the DC control bit of 1 is decided at the DSV evaluation point. Therefore, the code conversion is completed for the block that is used for the DSV calculation needed to decide the value of the DC control bit to be set before the DC control bit of 1 right before a time point immediately preceding the DC control bit of 1. As shown in a diagram, the DSV calculation needed for decision of the DC control bit A of an a-b section is completed right before the final block AL of the a-b section. Then the code conversion of the final block An to undergo the DSV calculation serves as the required condition to decide the value of the bit A.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for converting data while suppressing a direct current component when recording data on a recording medium at a high density or by using a band-limited transmission system.

[0002]

2. Description of the Related Art In general, in order to record data represented by a binary code on a recording medium at high density or to transmit it to a transmission system, a signal suitable for high density or band limitation before recording or transmission. Convert the data into a waveform. That is, the minimum inversion interval (hereinafter, T
min) is long and the maximum inversion interval (hereinafter, Tmax) is short. This is because when Tmin is long, the interference of inversion of adjacent bit information is small and high density is possible, and when Tmax is short, clock self-synchronization becomes easy. Further, in a transmission system in which a DC component is not transmitted, the waveform is distorted when the signal contains a DC component, so it is desirable to remove the DC component by converting the data.

In order to achieve this purpose, various RLLs are used.
(Run Length Limited) codes have been proposed. Generally, the original data sequence is divided into blocks of m bits each,
1 after the conversion so that the number of bits "0" between adjacent bits "1" is at least d and at most k
A data conversion method is used in which one bit or a plurality of blocks are sequentially converted into codewords with n bits per block. As a specific example, when a DC control bit consisting of a predetermined number of bits is inserted at predetermined intervals of an input data series to generate a redundant data series, a DC component of an output code series obtained by RLL-code converting the redundant data series. JP-A-4-115751 discloses a method in which the value of the DC control bit is determined so as to remove the RDC code, and the RLL code conversion is performed after the determined DC control bit is inserted.

FIG. 1 shows an aspect of data conversion of the contents described in the publication. In FIG. 1, (A)
As shown in, a predetermined interval (for example, 1
A redundant data series is obtained by inserting a predetermined number of bits (for example, 2 bits) of DC control bits every 26 bits. Thereafter, code conversion is performed so as to obtain desired Tmin and Tmax. In this example, conversion is performed by the conversion table shown in FIG. 2 and the conversion table shown in FIG. That is, in this case, the number of bits m forming a block of the input data series is 2, and two adjacent blocks in which adjacent bits between the blocks are both "1" (hereinafter referred to as run blocks) The 2-bit binary code in each of the two is converted into a 3-bit (thus n = 3) binary code according to the conversion rule shown in the conversion table of FIG. 3, and the 2-bit binary code in the block other than the run block is converted. The code is converted into a 3-bit binary code according to the conversion rule shown in the conversion table of FIG.

As a result, an output code sequence as shown in FIG. 1B is obtained, and its output waveform is NRZI (Non Re
Turn to Zero Inverted) conversion results in (C) in Figure 1. In (A), each DC control bit is "00"
Of the two values of “11” or “11”, D of the output waveform of (C)
The smaller value of the absolute value of SV (Digital Sum Value) is selected. In the DSV, bit information (symbols) "1" and "0" in the output waveform train are assigned values of +1 and -1, and the sum of the respective values from the start time of the waveform train is sequentially obtained. For example, in the output waveform, DS at point a
When V is +1, the value of the next DC control bit is set to "0".
When the value of DSV at the point b when it is set to 0 ”or“ 11 ”is −2 or +6, respectively,“ 00 ”, which has a smaller absolute value of DSV, is selected as the value of the DC control bit.

By such DSV control, code conversion is performed on the redundant data sequence of FIG. 1A in which the selected DC control bit is inserted, and the output code sequence of FIG. Since it is obtained, the desired Tmin and Tmax can be achieved by the code conversion regardless of the control of the DSV. In this example using the conversion tables of FIGS. 2 and 3,

[0007]

## EQU1 ## Tmin = 4T / 3 and Tmax = 16T / 3. However, T is the bit interval of the redundant data series. In order to determine the DC control bit A in such data conversion, code conversion and DSV calculation are performed on the redundant data of all blocks in the section up to the DSV evaluation point corresponding to the end of the section from point a to point b. Must have been done. However, when the final block AL in the ab section has a value of "11" or "01", the value of the DC control bit (next section DC control bit B) that follows the code conversion of the final block. Is not determined, it is not determined whether the code conversion unit of the block AL is the run block.

According to this example, conversion is performed based on the conversion table as shown in FIGS. 2 and 3, and "00" is set as the DC control bit.
By adopting “11” and “11”, even if the final block AL in the ab section takes a value of “11” or “01”, the code conversion of the final block AL by the evaluation point is performed. And the DSV calculation can be finalized. For example, in the case where the last block AL in the ab section has a value of "11", and if the value of the DC control bit B in the next section determined later is "00", the code conversion of the last block AL is performed. Since a code conversion unit of a non-run block is adopted for, the code "11" of the final block AL is code-converted into "101" according to the conversion rule of FIG. 2, and if the DC control bit B of the next section is determined later, If the value is "11", the code conversion unit of the run block is adopted for the code conversion of the final block AL in the ab section, so that "11" of the final block AL follows the conversion rule of FIG. "1
Must be transcoded to "01". in this way,
Whether the value of the DC control bit B in the next section is "00" or "11", "1" of the last block in the section ab
Since "1" is code-converted to the same "101", if the final block of a certain section is "11", "101" is irrespective of the value of the DC control bit following the final block.
It is possible to finalize the code conversion to, and thus it is possible to complete the calculation and evaluation of the DSV including the final block by the DSV evaluation point. The same applies to the case where the last block AL of the ab section has a value of "01" and other sections.

However, the RLL code conversion is performed based on another conversion rule different from the conversion tables of FIGS. 2 and 3,
When a value other than "00" or "11" is adopted as the value of the DC control bit, when the final block AL in the ab section has a value of "11" or "01", that block A is reached by the evaluation point.
It has been found that it is not possible to finalize the transcoding of L and the calculation of DSV.

As a mode in which such a problem occurs, for example, the value of the DC control bit to be selected is "0" as it is.
The conversion table of FIG. 3 is adopted as the conversion rule when the code conversion unit is a non-run block, and the conversion rule of FIG. 3 is used as the conversion rule when the code conversion unit is a run block. The case where the conversion table shown in FIG. 4 is adopted instead of the table is given. In this case, for example, when the final block AL in the ab section has a value of "11", if the value of the DC control bit B in the next section determined later is "00", the final block AL is Since the code conversion unit of the non-run block is adopted for the code conversion of, the code conversion of "11" of the final block AL to "101" is performed according to the conversion rule of FIG. If the value of the DC control bit B is "11", the code conversion unit of the run block is adopted for the code conversion of the final block AL in the ab section, so "11" of the final block AL is shown in the figure. According to the conversion rule of 4, "10
Must be transcoded to "0". As described above, when the value of the DC control bit B in the next section is "00" and "1",
Since the code conversion result of "11" of the last block AL of the ab section is different from that of "1", the code conversion of the redundant data of the last block AL of the ab section is performed by the DC control bit B of the next section. It cannot be fixed until the value is determined. Accordingly, the calculation and evaluation of the DSV including the final block cannot be completed by the DSV evaluation point, and thus the value of the DC control bit A in the ab section cannot be determined. Will occur.

[0011]

Therefore, according to the present invention, when a DC control bit consisting of a predetermined number of bits is inserted at predetermined intervals of an input data series to generate a redundant data series,
In the data conversion method, the value of the DC control bit is determined so that the DC component of the output code sequence obtained by RLL code conversion of the redundant data sequence is removed, and the RLL code conversion is performed after the determined DC control bit is inserted. Another object of the present invention is to provide a data conversion method capable of surely determining a DC control bit regardless of which RLL code conversion rule of a plurality of blocks is adopted.

[0012]

A data conversion method according to the present invention inserts a DC control bit consisting of a predetermined number of bits at every predetermined bit interval in an input data sequence represented by a binary code to form a redundant data sequence. At the time of generation, D of a temporary data sequence obtained by sequentially performing code conversion on the redundant data sequence in accordance with a predetermined conversion rule for performing RLL code conversion on a maximum u (u is an integer of 2 or more) block
A data conversion method for determining a value of the DC control bit according to SV, and performing code conversion of a redundant data sequence having the determined DC control bit according to the predetermined conversion rule to generate an output data sequence. , The DSV evaluation point for determining the DC control bit is (u-) from the position immediately before the DC control bit in the redundant data sequence.
1) It is characterized by being placed in front of the blocks.

[0013]

According to the data conversion method of the present invention, (the longest conversion unit block number-
1) The value of the DC control bit arranged before the DC control bit is determined at the DSV evaluation point which is placed before the DC control bit by one block, and the DC control bit is immediately before the DC control bit of the 1 concerned. The code conversion of the block used in the DSV calculation for determining the value of the DC control bit arranged before is completed.

[0014]

Embodiments of the present invention will now be described in detail with reference to the drawings. In the data conversion method according to the present invention, as shown in FIG. 1, the DSV evaluation point (indicated by a triangle) is shifted from the block immediately before the DC control bit to the block position immediately before. As a result, the value of the DC control bit is
A value is selected such that the DC component becomes small up to the DSV evaluation point subsequent to the DC control bit, that is, up to the block two blocks before the DC control bit next to the DC control bit.

According to this method, the problem as in the conventional example does not occur. That is, as can be seen from FIG. 1, a−
The DSV calculation for determining the DC control bit A in the section b is completed just before the last block AL in the section ab, and the last block An to be the target of the DSV calculation is An.
Is a necessary condition for determining the value of the DC control bit A. For the conversion of this block An, as shown in an enlarged view in FIG. 5, a conversion unit U1 for converting only one of the block An or the block An and its 1
A conversion unit U21 for converting two blocks of the previous block or a conversion unit U22 for converting two blocks of the block An and the next block is applied. Since none of these conversion units spans the DC control bit B in the next section, the last block An of the target can be code-converted before the DSV evaluation point without fail.
Therefore, the calculation of DSV for determining the value of the DC control bit A will not be disabled.

In other words, the code conversion rule applied to this embodiment is such that two consecutive blocks are collectively code-converted (that is, the run-block conversion rule is followed).
Therefore, the DSV calculation for the final block AL in the ab section is performed by the DS following the DC control bit B in the next section.
In addition to relying on the DSV calculation performed at the V evaluation point, the longest code conversion unit is 2 blocks long, so in order to avoid the code conversion performed with the DC control bit B, only 1 block is included in the redundant data sequence. The evaluation point is shifted forward so that the code conversion can be definitely determined immediately before the DC control bit.

In general, when performing code conversion on a maximum of u blocks in a continuous block at a time, D is preceded by (u-1) blocks from the DC control bit position.
By setting the SV evaluation point, the code conversion at the DSV evaluation point can be confirmed in any code conversion rule. As the value of the DC control bit of the conventional example described above, a value is selected so that the DC component up to immediately before the DC control bit becomes small, and is determined by the DSV evaluation point of 1 and the DSV evaluation at that evaluation point. The bit distance from the DC control bit (that is, the distance between the DC control bit and the DSV evaluation point subsequent thereto) is farther than that in the present embodiment, and this embodiment controls the DC component as compared with the conventional example. It will reduce efficiency. However, in actuality, the bit width for changing the DSV evaluation point with respect to that of the conventional example can be relatively short, so that such a decrease in control efficiency is negligible.

It should be noted that, in the above embodiment, FIG.
Although the conversion rules shown in FIG. 4 are applied, the code conversion rules are not limited in the present invention, and the number of blocks can be grasped when the continuous block data is collectively code-converted. Any other transcoding rule can be used, if any. Further, in the above-described embodiment, either "00" or "11" is selected as the DC control bit, but other values that can be taken as the DC control bit are also selected, and any one of them is selected. You may make it select one. That is, since the DC control bit is 2 bits in the above embodiment,
It is possible to take values of "10" and "01" in addition to "00" and "11", and one of these four values may be selected. Of course, if the number of DC control bits increases, it is possible to select from more values.

[0019]

As described above in detail, according to the data conversion method of the present invention, when a DC control bit consisting of a predetermined number of bits is inserted at predetermined intervals of an input data series to generate a redundant data series, In the data conversion method, the value of the DC control bit is determined so that the DC component of the output code sequence obtained by RLL code conversion of the redundant data sequence is removed, and the RLL code conversion is performed after the determined DC control bit is inserted.
DSV placed (block number of longest conversion unit-1) blocks ahead of the position immediately before the DC control bit of
At the evaluation point, the value of the DC control bit arranged before the DC control bit is determined, and the value of the DC control bit arranged before the DC control bit is determined by the time immediately before the DC control bit of 1. Since the code conversion of the block used for the DSV calculation is completed, the DC control bit can be surely determined even if any RLL code conversion rule of one or a plurality of blocks is adopted.

[Brief description of drawings]

FIG. 1 is a diagram showing an example of RLL code conversion according to the related art and the present invention.

FIG. 2 is a chart showing an example of a conversion rule of a non-run block.

FIG. 3 is a diagram showing an example of a run block conversion rule.

FIG. 4 is a table showing another example of run block conversion rules.

FIG. 5 is a diagram for explaining the operation effect of RLL code conversion according to the present invention.

Claims (1)

[Claims] 1. When a redundant data sequence is generated by inserting a direct current control bit consisting of a predetermined number of bits at a predetermined bit interval in an input data sequence represented by a binary code, the redundant data sequence has a maximum u (U is an integer of 2 or more)
Determining the value of the DC control bit according to the DSV of the provisional data sequence obtained by sequentially performing code conversion according to a predetermined conversion rule for performing RLL code conversion in block units of
A data conversion method for converting the redundant data sequence having the determined DC control bit according to the predetermined conversion rule to generate an output data sequence, wherein a DSV evaluation point for determining the DC control bit. Is preceded by (u-1) blocks from the position immediately preceding the DC control bit in the redundant data sequence.