JP3516778B2 - Frequency measurement method for semiconductor test equipment - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for measuring a frequency in a semiconductor test apparatus capable of measuring a low frequency region which cannot be measured by an existing frequency measuring function. is there. 2. Description of the Related Art FIG. 3 schematically shows a conventional frequency measuring method. This frequency measuring circuit is connected to the signal under measurement by, for example, 10
AND gate 11 for ANDing a system reference clock signal fixed at 0 MHz, and 1 output from AND gate 11
The counter 12 counts the number of 00 MHz pulses. First, the signal under test is input to the AND gate 11, and while the signal under test is at the "H" level, the system reference clock signal is input to the counter 12, and the count is multiplied by the cycle of the system reference clock. The "H" level time of the signal under measurement can be measured. Also, by inputting the signal to be measured to the AND gate 11 and inputting the system reference clock signal to the counter 12 while the signal to be measured is at the “L” level, the count number is multiplied by the cycle of the system reference clock. The "L" level time of the signal under measurement can be measured. "H" level time of signal under test and "L"
The period is obtained by adding the level time and the frequency can be obtained as the reciprocal of the period. [0003] When measuring the frequency by the above-described circuit, the period of the low-frequency signal is reduced because the system reference clock is fixed and the number of digits of the counter is fixed. Counter overflows when measurement is made, and measurement becomes impossible. An object of the present invention is to realize a frequency measurement method for measuring a period of a low-frequency signal and obtaining a frequency by using a function already provided in a semiconductor test apparatus. [0004] In order to achieve the above object, the frequency measuring method of the present invention is performed as follows. In other words, the signal under test is input and the level of the signal under test is compared with a preset level “H” or “L” at the timing of the test rate signal for which the cycle time can be programmed. And the mismatch is detected, the output of the match detection function 21 is input to the data fail memory 22, the number of mismatches is added and stored, and "H" and "L" are obtained by multiplying the test rate by the number of mismatches. Is obtained, and a period is obtained by adding the two. A frequency is obtained as a reciprocal of the period. [0005] In the frequency measuring method performed as described above,
The test rate can be set by a program, and when measuring the cycle of a low-frequency signal, there is an effect that the cycle can be measured by specifying a test rate having a long cycle that matches the cycle. The circuit used for this measurement is a circuit for the purpose of comparing the output of the device under test (DUT) 10 with an expected value, and there is no new circuit required as a semiconductor test apparatus. FIG. 1 shows an embodiment of the present invention. This circuit is
A match detection that compares the level of the signal to be measured with a preset level “H” or “L” at the timing of the test rate signal that allows the signal to be measured to be input and the cycle time can be programmed, and detects a match and a mismatch. Function 21
And a data fail memory 22 to which the output of the match detection function 21 is input and the number of mismatches is added and stored. FIG. 2 is a timing chart of the present invention, and its operation will be described. A change point from "L" to "H" of the signal under measurement is detected. Detects a transition point from “H” to “L” of the signal under test and starts detection of match / mismatch at the cycle of the test rate.
The data fail memory 22 counts the number of mismatches between the signal under test and the transition point from “L” to “H”. The test rate at this time is the resolution for measuring the period of the signal under measurement. By multiplying the number of mismatches counted by the data fail memory 22 by the cycle of the test rate, the "L" time of the signal under measurement can be measured. By setting the coincidence detection function 21 so that the signal under test is “H”, the time of “H” of the signal under test can be measured. The time obtained by adding the time obtained in the above becomes the cycle of the signal under measurement. The frequency is obtained by the reciprocal of the period obtained in the above. [0008] The cycle of the test rate can be set by a program, and measurement can be performed even when the frequency of the signal under measurement is low. Further, as described above, the frequency measurement method of the present invention measures the “H” time of the signal under measurement,
Since the measurement of the “L” time is possible, it is possible to perform not only the frequency measurement of the signal under measurement, but also the period measurement and the duty measurement. Another object of the present invention is to detect the occurrence of noise in a signal under measurement by generating a mismatch signal by comparing the signal under test with “L” when it should be “L”. Can be. Since the present invention is performed as described above, it has the following effects. That is,
The test rate can be set by a program, and when measuring the cycle of a low-frequency signal, there is an effect that the cycle can be measured by specifying a test rate having a long cycle that matches the cycle. The circuit used for this measurement is a circuit for the purpose of comparing the output of the device under test (DUT) 10 with an expected value, and there is no new circuit required as a semiconductor test apparatus.

[Brief description of the drawings] FIG. 1 is a block diagram of a frequency measurement circuit according to the present invention. FIG. 2 is a timing chart of period measurement according to the present invention. FIG. 3 is a block diagram of a conventional frequency measurement circuit. [Explanation of symbols] 10 Device under test (DUT) 11 AND gate 12 counter 21 Match Detection Function 22 Data Fail Memory (DFM)

Claims (1)

(57) [Claim 1] A signal to be measured is inputted, and a predetermined level “H” or “L” and a signal to be measured are set at a timing of a test rate signal which can program a cycle time. And a match detection function (21) detects a match and a mismatch. The output of the match detection function (21) is input to the data fail memory (22), and the number of mismatches is added and stored. A semiconductor test apparatus, wherein the times of "H" and "L" are obtained by multiplying a test rate by the number of times of mismatch, and a period is obtained by adding both times to obtain a frequency as a reciprocal of the period. Frequency measurement method.