JP3481309B2 - FM modulation circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an FM modulation circuit, and more particularly to a technique effectively applied to an FM modulation circuit for forming a video signal for recording in a video tape recorder (hereinafter referred to as VTR). is there.

[0002]

2. Description of the Related Art In a VTR, a carrier frequency at a peak level of a sync signal in a video signal and an oscillation frequency at a predetermined level of the video signal are defined in a standard. For example, in the NTSC mode of a VHS type VTR,
The input signal-to-oscillation frequency characteristic of the FM modulation circuit is, as shown in FIG. 4, the FM carrier frequency fco at the peak level of the synchronizing signal is 3.4 ± 0.1 MHz, and The FM deviation (Δf) from the peak value level to the white 100% level is 1.0 ± 0.1 MHz. As described above, the FM carrier frequency and the FM deviation need to be set accurately in a narrow range.

As shown in FIG. 10, a conventional FM modulation circuit is composed of an emphasis circuit 3, a voltage / current conversion circuit 6 and an oscillation circuit 8. The video signal Vin is high-frequency emphasized by the emphasis circuit 3, and then supplied to the resistor VR2 forming the alternating current Iac in the voltage-current conversion circuit 6. The voltage-current conversion circuit 6 forms a resistor VR2 that forms the AC current Iac, a resistor VR1 that forms the DC current Idc for obtaining the FM carrier frequency fco as described above, a transistor Q, and a constant voltage VB. It consists of a constant voltage source. Constant voltage VB supplied to the base of the transistor Q
Is set to a value that causes the emitter voltage of the transistor Q to reach the above-mentioned synchronous peak value. With the configuration shown, the DC current Idc has a value determined by the resistance value of the resistor VR1 and the emitter potential of the transistor Q determined by the constant voltage VB. The alternating current Iac is
It has a value determined by the resistance value of the resistor VR2 and the potential difference between the output potential of the emphasis circuit 3 and the emitter potential of the transistor Q. A combined current of the direct current Idc and the alternating current Iac is obtained at the collector of the transistor Q. The combined current is used as a signal for controlling the oscillation frequency of the oscillation circuit 8. As a result, the FM modulation signal FMout is obtained from the oscillation circuit 8.

In the oscillation circuit 8, the oscillation frequency characteristic with respect to the input current changes as shown in FIG. 5 due to variations in circuit elements such as transistors and capacitors. That is, it has a variation in characteristics in a relatively wide range as shown by a dotted line. Therefore, for example, when the characteristic of the circuit actually obtained has a gentler slope (rate of change) with respect to the characteristic indicated by the solid line, the direct current Idc is adjusted like Idc 'and the reference is used as the reference. AC current I to obtain the same FM deviation Δf
It is necessary to set ac to be Iac '. That is,
It is necessary to adjust both the direct current Idc 'and the alternating current Iac' to the variations in the above characteristics, and for that purpose, the variable resistance element V as a resistor for performing voltage-current conversion is adjusted.
R1 and VR2 are used.

[0005]

As described above, the conventional F
In the M modulation circuit, since the variable resistance element is used as an external component, the number of external terminals increases in the semiconductor integrated circuit, and the number of external components increases on the mounting board, which requires adjustment work during assembly. In addition, there is a problem that must be solved, such as being affected by the aging of the variable resistance element.

An object of the present invention is to provide an FM modulation circuit capable of automatically adjusting the FM carrier frequency and FM deviation with high accuracy and good reproducibility.
Another object of the present invention is to provide an FM modulation circuit that realizes a reduction in the number of external terminals and the number of external components and no adjustment. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0007]

The outline of a typical one of the inventions disclosed in the present application will be briefly described as follows. That is, the peak value of the synchronization signal included in the video signal is set to a predetermined potential by the voltage clamp circuit, and the amplitude control circuit controls so that the pedestal level of the output signal of the voltage clamp circuit matches the predetermined reference voltage. Thus, the white level in the video signal is controlled to be a predetermined voltage, a reference voltage corresponding to the clamp voltage is applied to the first resistance element to form a direct current corresponding to the carrier frequency, and the amplitude control is performed. An output signal of the circuit is applied to the second resistance element to form an alternating current corresponding to the video signal, and a synthetic current of the direct current and the alternating current is used as an oscillation frequency control signal and the oscillation circuit via the current variable circuit. And the capacitor is charged or discharged by the first constant current in the first pulse period formed from the oscillation signal corresponding to the synchronization signal period. The capacitor is discharged or charged by the second constant current in the second pulse period formed from the reference frequency signal, and the current variable circuit is controlled by the holding voltage of the capacitor to set the carrier frequency of the oscillator circuit to the desired value. Control to the frequency.

[0008]

According to the above-mentioned means, the white 100% level of the video signal can be indirectly set by making the level difference between the synchronizing signal in the video signal and the pedestal level constant, whereby the AC current and the DC current can be set. The ratio can be fixedly set, and the fixed current signal is set so that the oscillation cycle in the synchronization signal period matches the reference carrier wave cycle for variations in the characteristics of the oscillation circuit. A desired FM modulation output can be obtained by controlling the circuit and supplying it to the oscillation circuit.

[0009]

1 is a block diagram of an embodiment of an FM modulation circuit according to the present invention. Each circuit block shown in the figure is formed on one semiconductor substrate such as single crystal silicon together with other circuit blocks constituting the video signal processing circuit by a known semiconductor integrated circuit manufacturing technique. Further, the video signal processing circuit and the color signal processing circuit may be formed on the semiconductor substrate.

As shown in the waveform example of FIG. 2, the input signal Vin is a video signal including a luminance signal and a synchronizing signal, and is input to the voltage clamp circuit 1. The voltage clamp circuit 1 is
Although the detailed structure of the inside is not shown because it is not directly related to the present invention, it has a variable level shift circuit including a capacitor for level shift inside, and has a reference voltage VDC1 formed by the first reference voltage generating circuit 5. The voltage clamp operation is performed so that the peak values of the synchronization signal included in the video signal match. That is, the voltage clamp circuit 1 extracts the sync signal from the input signal Vin by the clamp pulse KLP having a waveform such as KLP of FIG. 2 which is generated in the sync signal period, and based on this, the peak value of the sync signal is used as a reference. A control signal for matching with the voltage VDC1 is held in the internal level shift capacitor, and the level shift operation is performed by the control signal held in the capacitor during the video signal period. As a result, in the output signal V1 of the voltage clamp circuit 1, the peak value of the synchronizing signal in the output signal V1 is matched with the reference voltage VDC1.

The amplitude control circuit 2 receives the output signal V1 from the clamp circuit 1, takes out a pedestal level by a keyed pulse KDP having a waveform like KDP in FIG. 2, and the level is the second reference voltage generating circuit 4. The amplitude of the entire signal V1 is controlled so as to match the reference voltage VDC2 formed by. By such amplitude control operation,
As shown in FIG. 4, the 100% white level of the video signal is F
It is possible to perform control so as to match the AC current Iac corresponding to the M division Δf. That is, by utilizing the fact that the relationship between the peak value of the sync signal and the pedestal level and 100% of the white of the video signal is determined by a constant ratio, the peak value of the sync signal that always exists in one horizontal period By defining the two relations with the pedestal level, it is possible to indirectly define the white 100% level of the video signal, which is determined in a fixed proportional relationship with the pedestal level.

In the second reference voltage generating circuit 4, since the ratio between the peak value level of the synchronizing signal and the pedestal level needs to be a predetermined ratio as described above, it is formed by the first reference voltage generating circuit 5. The reference voltage VDC1 that has been input is input, and the reference voltage VDC that changes in accordance with the change in VDC1
2 is formed.

The output signal of the amplitude control circuit 2 is input to the emphasis circuit 3, where the high frequency component is emphasized like the voltage V2 in FIG. That is, since noise components are concentrated in the high frequency band on the magnetic tape, the high frequency component is emphasized during recording to improve the S / N ratio. Then, during reproduction, the high frequency range is attenuated through the de-emphasis circuit to restore the original frequency characteristic.

The voltage-current conversion circuit 6 forms a direct current Idc for determining the carrier frequency and an alternating current Iac corresponding to the FM deviation Δf. The reference voltage VDC3 formed by the first reference voltage generating circuit 5 is supplied to the base of the transistor Q1. The reference voltage VDC3 is set to a level higher than the clamp voltage VDC1 by the base-emitter voltage of the transistor Q1. As a result, the emitter voltage of the transistor Q1 is made to match the clamp voltage VDC1 corresponding to the peak value of the synchronizing signal included in the video signal. A resistor R1 is provided between the emitter of the transistor Q1 and the ground potential point of the circuit to form a direct current Idc. A resistor R2 is connected between the output of the emphasis circuit 3 and the emitter of the transistor Q1 to form an alternating current Iac, and the combined current is obtained from the collector of the transistor Q1.

The combined current is used as a frequency control signal.
It is supplied to the oscillation circuit 8 via a current variable circuit 7 described later. It is desirable that the oscillator circuit 8 has good linearity between the input and the oscillation frequency, and in this embodiment, it is composed of a capacitive integration type multivibrator. As described above, the carrier current frequency fco can be formed in the oscillation circuit 8 by determining the combined current value so that the DC current Idc flows at the peak of the synchronization signal. Such direct current Idc
By superimposing the AC current Iac formed by the resistor R2 on, the oscillation circuit 8 can perform an oscillation operation corresponding to the FM deviation Δf.
That is, in the voltage-current conversion circuit 6, assuming that the oscillation circuit 8 has a constant constant current-frequency characteristic as shown by the solid line in FIG.
And the alternating current Iac are set.

However, in the oscillator circuit 8 which is actually formed by a semiconductor integrated circuit, current-frequency conversion is performed as indicated by the dotted line in FIG. 5 due to variations in the characteristics of the transistors and capacitors forming the oscillator circuit 8. The rate changes with a relatively large variation.

Corresponding to variations in characteristics as shown in FIG.
For example, when the oscillation circuit 8 has the characteristic shown by the lower dotted line, it forms the corrected DC current Idc ′,
Alternatively, it is necessary to form a corrected alternating current Iac '. In this embodiment, the following circuits are provided in order to automatically (without adjustment) form the above-described corrected DC current Idc 'and AC current Iac'.

The output current (combined current) of the voltage-current conversion circuit 6 is supplied to the oscillation circuit 8 through the current variable circuit 7. The output current IFM of the current variable circuit 7 is
As described above, the combined current of the direct current Idc 'and the alternating current Iac' corrected in accordance with the variation of the characteristics is obtained.
The operation is controlled by the control signal Va. The control signal Va is the first pulse P from the first pulse generation circuit 9.
1st and 2nd pulse P2 from the 2nd pulse generation circuit 10
And a schematic configuration thereof is formed by the frequency comparison circuit 11 shown in FIG. The first pulse generating circuit 9 is operated during the clamp pulse KLP, receives the oscillation signal from the oscillation circuit 8 in the synchronizing signal period, and outputs M / 2 of the oscillation signal.
The first pulse P1 (see the waveform P1 in FIG. 2) for the period of the cycle is generated. The second pulse generation circuit 10 uses the clamp pulse KLP to generate a second pulse P2 for a period of N / 2 cycles of the color subcarrier signal fsc (3.579545 MHz) (see the waveform P2 in FIG. 2). Generate.

Here, M and N are integers, for example, M = N = 8 is set, the pulse width TW1 of the output pulse P1 is TW1 = M / 2fc, and the pulse width TW2 of the pulse P2 is TW2 = Since it is N / 2fsc, the pulses P1 and P2 have pulse widths corresponding to four times the FM carrier period and the color subcarrier period, respectively.

In the frequency comparison circuit 11, the pulse P1
3 is controlled by the switch SW1 of FIG. 3 to flow a constant current I1 into the capacitor C for charging, and the switch SW2 controlled by the pulse P2 discharges the capacitor C by the constant current I2. Then, the holding voltage Va corresponding to the difference between the charge and the discharge obtained in the capacitor C is obtained.
Is supplied to the current variable circuit 7 as the control signal Va.

The ratio (I1 / I2) between the charging current I1 and the discharging current I2 is set in correspondence with the ratio (fco / fsc) between the target FM carrier frequency fco and the color subcarrier frequency fsc. , In other words, (I1 / I
2) = (fco / fsc = 3.4 / 3.579545 = 0.
9498), the charge charged to the capacitor C by the charging current I1 and the discharge charge of the capacitor C by I2 are such that the output of the oscillation circuit 8 matches the target FM carrier frequency fco. Then they will be in balance with each other. On the other hand, the output of the oscillation circuit 8 is the target frequency f
If the frequency is lower than co, the pulse width TW1 of the first pulse P1 is correspondingly increased and the charging voltage of the capacitor C is increased. As a result, the control voltage Va is increased so as to increase the output frequency of the oscillation circuit 8. On the contrary, when the frequency of the output signal of the oscillation circuit 8 is high, the level of the control voltage Va is lowered so as to lower the oscillation frequency. Therefore, as a result of such an operation, the control voltage Va extracted from the capacitor C is made stable in a constant equilibrium state, and the FM carrier frequency fc is automatically adjusted. As a reference frequency for determining the oscillation frequency of the oscillation circuit 8,
The circuit can be simplified by using the above-described color subcarrier frequency fsc used in the color video signal circuit.

As described above, in the oscillator circuit 8, the input current and the oscillation frequency have linearity.
By the control voltage Va when the FM carrier frequency is automatically set,
In the current variable circuit 7, the alternating current Iac can be automatically adjusted like the alternating current Iac 'corresponding to the FM deviation Δf at the same ratio where the direct current Idc is automatically adjusted like Idc'.

That is, as shown in FIG. 5, the characteristic variation between the input current and the oscillation frequency indicated by the dotted line of the oscillation circuit 8 is caused by the variation in the capacitance of the capacitance integration type multivibrator which constitutes the oscillation circuit 8. Since this variation is the variation of the modulation sensitivity = the inclination of the characteristic, the target F
DC current Idc (Id to obtain M carrier frequency fco
The current ratio between c ') and the alternating current Iac (Iac') for obtaining the target FM deviation is always constant. Therefore, in the voltage-current conversion circuit 6, the ratio of the direct current Idc of the FM modulation input current and the alternating current Iac is made constant,
Moreover, the FM carrier frequency is set to f by the current variable circuit 7.
By adjusting to co, it is possible to adjust FM deviation naturally.

In the embodiment of FIG. 1, the clamp circuit 1
Although the amplitude control circuit 2 is arranged in the next stage, the voltage clamp circuit can be formed by controlling the voltage of one of the differential inputs of the amplitude control variable gain circuit.

FIG. 6 is a block diagram of another embodiment of the FM modulation circuit according to the present invention. In this embodiment, the operational amplifier circuit OPA in the voltage-current conversion circuit 6 is used.
Is added, the reference voltage VDC1 corresponding to the clamp voltage is directly supplied to the non-inverting input (+), the emitter voltage of the transistor Q1 is fed back to the inverting input (−), and the output voltage is applied to the base of the transistor Q1. To supply. With this configuration, the emitter voltage of the transistor Q1 can be accurately matched with the reference voltage VDC1, and the DC current Idc and the AC current Iac can be set with high accuracy.

That is, in the embodiment of FIG. 1, the transistor Q
1 base-emitter voltage and reference voltage VDC1 and VDC
If the difference in C3 does not match, an offset will occur, but such a problem can be solved in the embodiment of FIG.

FIG. 7 shows a block diagram of another embodiment of the FM modulation circuit according to the present invention. In this embodiment, an alternating current Iac and a direct current Idc are formed by one resistor R3 in the voltage-current conversion circuit 6. That is, the emphasis circuit 3 has a configuration devised with a level shift function as described below, and its output voltage V2 is applied to the base of the transistor Q1 so that the resistor R3 receives the peak value of the synchronization signal. The direct current Idc flows, and the alternating current Iac in a combined form flows at a constant ratio corresponding to the brightness level.

The emphasis circuit 3 is not particularly limited, but as shown in the figure, an operational amplifier circuit OPA, an emitter follower transistor Q2 for applying a level shift voltage corresponding to the base-emitter voltage of the transistor Q1 to the circuit, and a resistor. It is composed of R4, R5 and a capacitor C2. In the emphasis circuit 3, the output signal of the amplitude control circuit 2 is supplied to the non-inverting input (+), and the output signal of the operational amplifier circuit OPA is supplied to the base of the emitter follower transistor Q2. A feedback circuit composed of a resistor R4, a capacitor C2, and a resistor R5 is provided between (-) and (-) to reduce the amount of negative feedback in the high range, thereby increasing the gain and emphasizing the high range. is there. According to the level shift function in the emphasis circuit 3, the voltage-current conversion circuit 6
Therefore, the emitter potential of the transistor Q1 at is at substantially the same value as the reference voltage VDC1 at the peak value of the synchronizing signal. As a result, a desired level of current as described above will flow through the resistor R3.

FIG. 8 shows a block diagram of still another embodiment of the FM modulation circuit according to the present invention. In this embodiment, an FM signal recorded on a VTR magnetic tape is removed in order to remove crosstalk from adjacent tracks.
It is possible to control the carrier frequency by a frequency offset of 1/2 the horizontal synchronizing frequency (1/2 fH carrier offset) by the magnetic head switching signal.

The frequency comparison circuit 11, as shown in FIG. 9, has a switch S controlled by a head switching signal.
A circuit for adding the charging current Ioff necessary to generate the 1 / 2fH carrier offset by W4 is added. In response to this, in the voltage-current conversion circuit 6 of FIG. 8, the switch SW3 controlled by the head switching signal and the DC current Idcoff necessary for generating the 1 / 2fH carrier offset are added.

That is, 1/2 fH of the voltage-current conversion circuit 6
Carrier offset and 1/2 in frequency comparison circuit 11
By linking with the fH carrier offset operation, the FM carrier frequency f without changing the control voltage Va.
While giving a 1/2 fH carrier offset to co,
It is possible to stably feedback control the FM deviation.

The operational effects obtained from the above embodiment are as follows. That is, (1) the peak value of the synchronizing signal included in the video signal is set to a predetermined potential by the voltage clamp circuit, and the pedestal level of the output signal of the voltage clamp circuit matches the predetermined reference voltage by the amplitude control circuit. Control so that the white level becomes a predetermined voltage, a reference voltage corresponding to the clamp voltage is applied to the first resistance element to form a direct current corresponding to the carrier frequency, and the amplitude control is performed. The output signal of the circuit is applied to the second resistance element to form an alternating current corresponding to the video signal, and a combined current of these direct current and alternating current is supplied to the oscillation circuit via the current variable circuit for synchronization. A second pulse formed from the reference frequency signal, which is charged or discharged by the first constant current in the first pulse period formed from the oscillation signal corresponding to the signal period. A capacitor that is discharged or charged by a second constant current between the two, and by controlling the current variable circuit by the holding voltage of the capacitor to control the carrier frequency of the oscillation circuit to a desired frequency, F corresponding to the variation of the input current of the oscillator circuit vs. the oscillation frequency
The effect that the M modulation output can be automatically obtained is obtained.

(2) According to the above (1), it is possible to reduce the number of external terminals and the number of external components of the semiconductor integrated circuit device including the FM modulation circuit in the VTR or the camera-integrated VTR and to rationalize the assembly process. The effect is obtained.

(3) Since the FM modulation output corresponding to the variation of the input current vs. the oscillation frequency can be automatically obtained by the above (1), deterioration of the performance of the VTR or the camera-integrated VTR due to aging is prevented. The effect of being able to

(4) By supplying a voltage-clamped and amplitude-controlled video signal to one resistor,
The effect that the combined current of the direct current and the alternating current can be obtained by one resistor is obtained.

(5) A first switch element for adding an offset current to a direct current formed by the first resistance element of the voltage-current conversion circuit, and a first switch element of the frequency comparison circuit.
A second switch element that adds an offset current commensurate with the offset current to the constant current of 1 is provided, and a 1 / 2fH carrier offset in the voltage-current conversion circuit is provided.
By interlocking with the 1/2 fH carrier offset operation in the frequency comparison circuit, it is possible to give 1/2 fH carrier offset to the FM carrier frequency fco without changing the control voltage, and to perform stable feedback control of FM deviation. The effect is obtained.

Although the invention made by the present inventor has been specifically described based on the embodiments, the invention of the present application is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say. For example, the frequency comparison circuit that sets the frequency in the synchronizing signal period of the oscillation circuit to the desired frequency uses another appropriate reference frequency signal instead of the one using the color subcarrier frequency as described above. It may be one. In this case, the reference frequency does not have to match the FM carrier frequency, and the ratio of the charging / discharging current of the capacitor may be set according to the ratio of the FM carrier frequency to the FM carrier frequency. INDUSTRIAL APPLICABILITY The present invention can be widely used for an FM modulation circuit that forms a video signal for recording for VTR.

[0038]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows. That is, the peak value of the synchronizing signal included in the video signal is set to a predetermined potential by the voltage clamp circuit, and the amplitude control circuit controls so that the pedestal level of the output signal of the voltage clamp circuit matches the predetermined reference voltage. By controlling the white level to a predetermined voltage, applying a reference voltage corresponding to the clamp voltage to the first resistance element to form a direct current corresponding to the carrier frequency, and outputting the amplitude control circuit. A signal is applied to the second resistance element to form an alternating current corresponding to the video signal,
A combined current of the direct current and the alternating current is supplied to the oscillation circuit via the current variable circuit, and the first pulse period is formed from the oscillation signal corresponding to the synchronization signal period.
And a capacitor that is charged or discharged by a constant current and discharged or charged by a second constant current during a second pulse period formed from the reference frequency signal, and the current variable circuit according to the holding voltage of the capacitor. To control the carrier frequency of the oscillation circuit to be a desired frequency, it is possible to automatically obtain an FM modulation output corresponding to the variation of the input current of the oscillation circuit versus the oscillation frequency.

According to the above, the VTR or the camera-integrated VTR
It is possible to reduce the number of external terminals and the number of external components of the semiconductor integrated circuit device including the FM modulation circuit in 3 and to rationalize the assembly process.

As described above, since the FM modulation output corresponding to the variation of the input current versus the oscillation frequency can be automatically obtained, it is possible to prevent the performance deterioration of the VTR or the camera-integrated VTR due to aging.

By supplying a voltage-clamped and amplitude-controlled video signal to one resistor, a combined current of direct current and alternating current can be obtained by one resistor.

A first offset current is added to the direct current formed by the first resistance element of the voltage-current conversion circuit.
Switch element and a second switch element for adding an offset current commensurate with the offset current to the first constant current of the frequency comparison circuit, and a 1 / 2fH carrier offset in the voltage-current conversion circuit is provided. By interlocking with the 1 / 2fH carrier offset operation in the frequency comparison circuit, it is possible to give 1 / 2fH carrier offset to the FM carrier frequency fco without changing the control voltage and to perform stable feedback control of FM deviation. it can.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an FM modulation circuit according to the present invention.

FIG. 2 is a schematic waveform diagram for explaining the operation of the FM modulation circuit.

3 is a circuit diagram showing an embodiment of a frequency comparison circuit in the FM modulation circuit of FIG.

FIG. 4 is a characteristic diagram for explaining the operation of the FM modulation circuit according to the present invention.

FIG. 5 is a characteristic diagram for explaining the operation of the FM modulation circuit according to the present invention.

FIG. 6 is a block diagram showing another embodiment of the FM modulation circuit according to the present invention.

FIG. 7 is a block diagram showing another embodiment of the FM modulation circuit according to the present invention.

FIG. 8 is a block diagram showing still another embodiment of the FM modulation circuit according to the present invention.

9 is a circuit diagram showing an embodiment of a frequency comparison circuit in the FM modulation circuit of FIG.

FIG. 10 is a block diagram showing an example of a conventional FM modulation circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Voltage clamp circuit, 2 ... Amplitude control circuit, 3 ... Emphasis circuit, 4 ... 2nd reference voltage generation circuit, 5 ... 1st reference voltage generation circuit, 6 ... Voltage-current conversion circuit, 7 ... Current variable circuit, 8 ... Oscillation circuit, 9 ... First pulse generation circuit, 1
0 ... Second pulse generation circuit, 11 ... Frequency comparison circuit.

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Katsumi Kaneshiro 5-22-1, Kamimizuhoncho, Kodaira-shi, Tokyo Inside Hitachi Microcomputer System Co., Ltd. (72) Morishaku Yamamoto 5-chome, Kamimizumoto-cho, Kodaira, Tokyo No. 22-1 Hitachi Microcomputer System Co., Ltd. (72) Inventor Nori Nakagawa 5-22, Kamimizuhonmachi, Kodaira-shi, Tokyo No. 22-1 Hitachi Microcomputer System Co., Ltd. (72) Kenji Takebuchi, Kodaira-shi, Tokyo 5-22-1, Mizumotocho Hitachi Microcomputer System Co., Ltd. (72) Inventor Hiroyuki Hori 1410 Inada, Katsuta City, Ibaraki Prefecture Hitachi Ltd. AV Equipment Division (72) Inventor Nobuo Hori Moriya, Kanagawa-ku, Yokohama-shi, Kanagawa 3-12 Machi-Cho, Japan Victor Company of Japan (72) Inventor Yasuyuki Yata 3 Moriya-cho, Kanagawa-ku, Yokohama-shi, Kanagawa Address No. 12 within Victor Company of Japan (56) Reference JP-A-4-304084 (JP, A) JP-A-6-197309 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H04N 5/76-5/956 H03C 3/00-3/28

Claims (5)

(57) [Claims] 1. A first reference voltage source for providing a first predetermined voltage, a second reference voltage source for providing a second predetermined voltage that changes in response to a change in the first predetermined voltage, and a video signal. Voltage clamp circuit for setting the peak value of the synchronization signal included in the first predetermined voltage, and amplitude control for controlling the pedestal level in the video signal passed through the voltage clamp circuit to match the second predetermined voltage. A circuit, a first resistance element for forming a direct current corresponding to the carrier frequency by the reference voltage corresponding to the first predetermined voltage, and an alternating current corresponding to the video signal output from the amplitude control circuit. A second resistance element, a current variable circuit that varies the combined current of the direct current and the alternating current, and an oscillation circuit whose oscillation frequency is changed by the output current of the current variable circuit,
A first pulse generating circuit which receives the frequency of the oscillation signal corresponding to the synchronizing signal period and forms a first pulse; and a second pulse which forms a second pulse of a pulse period corresponding to the frequency of the input reference signal. And a capacitor that is charged or discharged by a first constant current in the first pulse period and discharged or charged by a second constant current in the second pulse period. An FM modulation circuit, characterized in that the current variable circuit is controlled by the holding voltage of the capacitor so that the frequency of the oscillation signal becomes a desired frequency. 2. An output of the amplitude control circuit is provided with an emphasis circuit for emphasizing high frequency components,
The first resistance element is provided between the emitter of the transistor and the ground potential point of the circuit, the emitter potential of which is set to the peak value of the synchronization signal, and the second resistance element is the amplitude control circuit. 2. The FM modulation circuit according to claim 1, wherein the FM modulation circuit is provided between the output of the transistor and the emitter of the transistor, and obtains the combined current from the collector of the transistor. 3. The FM modulation circuit according to claim 1, wherein the first and second resistance elements are replaced with one resistance element satisfying the above condition. 4. A base voltage of the transistor is supplied with a reference voltage common to the voltage clamp circuit, to a non-inverting input and an output voltage of an operational amplifier circuit with an emitter voltage applied to the inverting input. The FM modulation circuit according to claim 2, wherein 5. A first switch element for adding an offset current to a DC current formed by the first resistance element, and an offset current commensurate with the offset current with respect to the first or second constant current. The FM modulation circuit according to claim 1 or 2, further comprising a second switch element for adding.