JP3464247B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing method, and more particularly to a method for forming a shallow and high-concentration diffusion layer.

[0002]

2. Description of the Related Art With miniaturization and high integration of elements in MOS type integrated circuits, diffusion layers in semiconductor elements are
In order to suppress the short channel effect of the OS transistor,
Its diffusion depth is shallow, and in order to obtain low electric resistance,
High concentration is required. These requirements are especially needed near the source and drain ends. In order to realize this, in forming the source / drain, the conventional LD
The D (Lightly Doped Drain) structure has been adopted. This is because after the gate electrode of the transistor is formed, low acceleration and low dose ion implantation is performed, and after the side wall of the gate is formed,
This is a method of performing ion implantation with higher acceleration and higher dose.

In order to miniaturize the transistor having the LDD structure, it is necessary to reduce the acceleration or dose of ion implantation at the end of the gate electrode. However, lowering the ion implantation energy leads to a decrease in the beam current during ion implantation, the substrate is sputtered during ion implantation, and even if the acceleration voltage is reduced to 1/2, the depth of the tail portion of ion implantation is reduced. However, it cannot be reduced to 1/2 due to channeling or the like, and it cannot be made sufficiently shallow.

On the other hand, lowering the dose causes an increase in the resistance of the diffusion layer and an increase in the parasitic resistance of the transistor.

As another method for making the diffusion layers at the ends of the source and drain shallow and highly concentrated, a thin film containing a dopant impurity is deposited after forming the side wall of the gate, and the thin film containing the dopant impurity is used as a diffusion source. A method of forming a drain has also been proposed. However, this method has a problem that the impurity concentration immediately below the side wall is particularly low at the end of the gate electrode and this becomes the series resistance of the transistor, so that the parasitic resistance cannot be reduced.

[0006]

As described above, according to the conventional method, it is extremely difficult to form a shallow and high-concentration diffusion layer.

The present invention has been made in view of the above circumstances, and an object thereof is to form a shallow and high-concentration diffusion layer.

[0008]

Therefore, in the present invention, an ion implantation step of implanting halogen ions into the surface of a silicon substrate and a solid phase or gas phase substance containing boron are brought into contact with the surface of the silicon substrate. And a diffusion step of diffusing boron on the surface of the silicon substrate.

In a second aspect of the present invention, a first ion implantation step of implanting ions containing boron into the surface of the silicon substrate and a halogen ion implantation step before or after the first ion implantation step are performed. The method is characterized by including the ion implantation step 2 and a diffusion step of diffusing boron to the surface of the silicon substrate by heat treatment.

Preferably, the substrate surface has an atomic concentration of 0.1%.
The above-mentioned contact may be performed by depositing the above-mentioned layer containing boron.

Preferably, the second injection step is
The angle of the implanted ion beam with respect to the substrate is 10 degrees or more 6
It is good to set it to 0 degrees or less.

It should be noted that among the above-mentioned solid-phase or gas-phase substances containing boron, boron alone is also included.

[0013]

As a result of various experiments, the present inventors have found that when a diffusion layer containing boron at a high concentration is formed on a silicon substrate and a halogen ion is implanted, a shallow diffusion layer having a high concentration is formed. I found that.

Therefore, first, the following experiment was conducted in order to investigate the ion implantation effect of halogen on the silicon substrate.

Fluorine F, which is one kind of halogen, is accelerated on a silicon substrate having a (100) plane orientation at an acceleration voltage of 15 ke.
V, dose amount 2 × 10 ¹⁶ cm ^-2 ion implantation was performed. Here, the implantation angle was 83 °, that is, the angle was 7 ° with respect to the vertical direction. Then, after heat treatment at 900 ° C. for 1 hour in a nitrogen atmosphere, boron-doped amorphous silicon containing 2% boron is deposited on this substrate by the CVD method, and 8
By heat treatment at 50 ° C. for 30 minutes, boron was diffused in the substrate by using this as a diffusion source. The results of SIMS analysis of the boron and fluorine concentrations in the depth direction are shown in FIG. 1 (a). For comparison, FIG. 1 (b) shows the results of SIMS depth analysis of boron concentration when boron diffusion was performed by the same method without implanting fluorine ions. Also, for the purpose of comparing the diffusion profile from the deposited thin film and the diffusion profile by ion implantation, BF ₂ ⁺ ,
Ion implantation is performed at a dose of 1 × 10 ¹⁶ cm ^{-2 and} at 850 ° C for 30
The analysis result of the boron concentration by the SIMS in the depth direction when the heat treatment for a minute is performed is shown. In FIG. 1, the interface between the deposited film and the substrate was used as the depth reference position.

From comparison with FIGS. 1A and 1B, it is understood that a shallow and high-concentration diffusion layer is formed by previously implanting fluorine ions. This is probably because a high concentration of boron was trapped in the fluorine existing at a depth of 20 nm, which served as a diffusion source, and at the same time, the presence of fluorine in a deeper region lowered the diffusion coefficient of boron. . Further, from the result of examining the concentration of B which is actually electrically activated from the depth direction of the carrier concentration, it was confirmed that a shallow and high-concentration diffusion layer was formed. Also, compared with the case of ion implantation of BF ₂ ⁺ in FIG. 1 (c), the boron concentration in the substrate is higher when the solid-phase diffusion source is used, but the electrically activated boron is higher. From the carrier concentration measurement, it was found that the concentration was about the same as when the solid phase diffusion source was used. From these results, when forming a shallow and high concentration diffusion layer,
It can be seen that it is desirable to adopt a method in which fluorine is ion-implanted in advance and then boron is diffused into the substrate from a deposition diffusion source, that is, a solid-phase diffusion source. In these experiments, after ion implantation of fluorine, heat treatment was performed at 900 ° C. for 1 hour in a nitrogen atmosphere, but the profiles of fluorine and boron after boron diffusion were the same regardless of the heat treatment.

Further, in order to obtain the necessary boron concentration in the material containing boron or boron used as the deposition diffusion source, the same experiment was conducted using the contained boron concentration in the deposited film as a parameter. As a result, the concentration of boron contained in the deposited amorphous silicon film is 5 × 10 ^19.
If it is cm ^-3 or more, the boron profile in the substrate after heat treatment becomes shallow and the concentration becomes high by implanting halogen ions, whereas if it is less than 5 × 10 ¹⁹ cm ^-3 , the profile depends on the presence or absence of halogen ion implantation. It turns out that there is no difference between. This means that if the boron concentration is 5 × 10 ¹⁹ cm ⁻³ or more, that is, the atomic concentration ratio is 0.1% or more,
It is considered that this is because boron is not supplied to the region where the ion-implanted halogen exists.

Further, in order to investigate the dose of halogen required to form a shallow and high-concentration diffusion layer, the concentration distribution of halogen in the depth direction when a heat treatment is performed in a nitrogen atmosphere after implantation of halogen ions is performed by SIMS. Measured by
In FIG. 2, heat treatment was performed at 900 ° C. for 1 hour on a sample in which ion implantation was performed with the acceleration voltage set to 50 keV and the boron concentration profile at this time was measured. From this figure, when the fluorine dose amount is 3 × 10 ¹⁵ cm ^-2 and 2 × 10 16 cm ^-2 , so-called pile-up in which fluorine is localized at a certain depth after heat treatment is observed.
At 5 × 10 ¹⁴ cm ^-2, it can be seen that most of the fluorine has been lost. Then, it was found that the ion implantation amount required for pile-up to a certain depth of fluorine after the heat treatment was 5 × 10 ¹⁹ cm ⁻³ in peak concentration. It was also confirmed that a shallow and high-concentration boron diffusion layer can be formed when the fluorine piles up. When the peak concentration of fluorine exceeds 1 × 10 ²² cm ^-3 , the electrical activation rate of boron in the substrate is lowered, and the effect is lost in forming a high-concentration diffusion layer. It is considered that this is because the presence of extremely high concentration of fluorine formed a high density of defects in the substrate and hindered the electrical activation of boron.

For example, as shown in FIG. 3, a silicon substrate 1
A MOS transistor is formed until the step of forming a gate electrode through the gate insulating film 3 in the element region separated by the element isolation insulating film 2 formed on the surface and forming the sidewall insulating film 7 on the side wall of the gate insulating film. It was formed by the usual process. For this sample, fluorine was used to form a source / drain diffusion layer at an acceleration voltage of 15 keV and a dose of 2 × 10 ^16.
Ion implantation was performed at a cm ^-2 implantation angle of 83 degrees. Then, heat treatment was performed at 900 ° C. for 1 hour in a nitrogen atmosphere. Then, a boron-added silicon oxide film containing 4% of boron was deposited on this substrate by a CVD method, and heat treatment was performed at 850 ° C. for 30 minutes to diffuse boron in the substrate by using this as a diffusion source. For comparison, a boron-doped silicon oxide film containing 4% of boron was similarly added to a sample in which fluorine was not ion-implanted.
After being deposited by the VD method, heat treatment at 850 ° C. for 30 minutes diffused boron into the substrate by using this as a diffusion source. As another sample, fluorine was similarly ion-implanted, and boron was then accelerated at an acceleration voltage of 15 keV and a dose of 2 × 10 ^16.
Implanted by cm ⁻² ion implantation. The two-dimensional concentration profile of the diffusion layer obtained as a result of these experiments is shown in Fig. 4 (a).
, (B), (c) are shown by iso-concentration lines. This profile measurement uses selective etching and E
The measurement was carried out by measuring the boron concentration by DX.

Further, by setting the angle of the implanted ion beam of halogen with respect to the substrate to be 10 degrees or more and 60 degrees or less, the halogen can be localized at a shallow depth and the shallow diffusion layer having a good profile. Can be formed.

Furthermore, in the case of performing the ion implantation through the insulating film formed on the side wall of the gate electrode in the LDD structure or the like, it is possible to control the extension of diffusion in the horizontal direction by adjusting this angle. It is possible to form a diffusion layer having an optimum concentration profile such that the impurity profile immediately below the sidewall insulating film can be highly concentrated.

In addition to diffusion from a deposited film containing boron, halogen is ion-implanted in advance for diffusion from a gas phase using a gas containing boron. It is possible to obtain the same effect as in the case of diffusion.

Furthermore, the present invention is also effective when boron ions are implanted by ion implantation, but in this case, halogen ion implantation has good results both before, after, and simultaneously with the boron ion implantation. Can be obtained.

In the present invention, not only fluorine but also
The same applies to other halogens, that is, chlorine, bromine, and iodine.

[0025]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 5 is a diagram showing a manufacturing process of a MOS transistor using the method of the present invention. in this way,
In forming the p-type diffusion layer for forming the source / drain regions, after implanting halogen ions, a boron-containing amorphous silicon layer is formed, and a solid phase or gas phase substance containing boron is deposited on the silicon substrate. It is characterized in that a shallow and high-concentration diffusion layer is formed by contacting the surface.

First, as shown in FIG. 5 (a), the plane orientation (10
0), LO on the n-type silicon substrate 1 having a specific resistance of 4 to 6 Ωcm.
After forming an element isolation insulating film 2 having a thickness of about 0.6 μm by the COS method, a gate oxide film 3 having a thickness of 10 nm is formed by thermal oxidation. A polycrystalline silicon film 4 having an impurity content of 100 nm and a tungsten silicide film having a thickness of 300 nm are formed on the gate oxide film 3. The film 5 is sequentially formed, and further 150 is formed on the surface thereof by the LPCVD method.
A silicon oxide film 6 having a thickness of nm is formed. Then, these laminated films are etched by using photolithography and reactive ion etching to form a pattern of the gate electrode.

Then, as shown in FIG. 5B, a sidewall insulating film made of a silicon oxide film 7 having a thickness of about 100 nm is formed on the sidewall of the gate electrode. This side wall insulating film is obtained by depositing a silicon oxide film having a film thickness of about 150 nm on the entire surface by a CVD method or the like and performing anisotropic etching on the entire surface.

Thereafter, the acceleration voltage is 15 keV and the dose amount is 2
× 10 ¹⁶ cm ^-2 , fluorine ion implantation at an implantation angle of 83 degrees,
As shown in FIG. 5C, an amorphous silicon thin film containing 2% boron was selectively deposited only on the source / drain regions where the substrate was exposed. Then, heat treatment is performed at 850 ° C. for 30 minutes in a nitrogen atmosphere, and using this as a diffusion source, a high concentration p-type diffusion layer 9 is formed in the source / drain regions.
To form. By this heat treatment, the boron-containing amorphous silicon film 8 is crystallized.

After that, a 300 nm silicon oxide film is deposited on the entire surface by the CVD method, and then, as shown in FIG.
A contact hole is opened in the silicon oxide film 10 by anisotropic etching. Then, an aluminum film 11 containing silicon and copper at 0.5% respectively was deposited to 800 nm. After patterning the aluminum film 11 to be used as an electrode, it was heat-treated in a nitrogen atmosphere containing 10% hydrogen at 450 ° C. for 15 minutes.

When the parasitic resistance of this MOS transistor was measured, a gate length of 0.8 μm, a channel width of 1.1 μm and a contact diameter of 0.8 μm were measured.
Each was 200Ω. On the other hand, in the sample formed without ion implantation of fluorine, the parasitic resistance is 40
It was 0Ω. Also, BF ₂ ⁺ ions are accelerated with an acceleration voltage of 15 ke
The parasitic resistance is 4 even in the sample in which boron ions are implanted by implanting ions with V and a dose of 3 × 10 ¹⁶ cm ^-2.
It became 00Ω.

Further, with the gate length as a parameter, the MOS
The change in the threshold voltage of the transistor was examined. The results are shown by curves a, b and c in FIG. A curve a is obtained by using a process in which fluorine is ion-implanted and then boron is diffused by using a solid-phase diffusion source, and a curve b shows a result of performing the same experiment without ion-implanting fluorine. ,
Curve c shows the experimental results for those implanted with BF ₂ ⁺ ions. From this figure, it can be seen that the threshold voltage is highest and the short channel effect is suppressed by using the process of ion-implanting fluorine and then diffusing boron using a solid-phase diffusion source for any gate length. Is effective for the MOS
It was found that it is effective for forming a shallow diffusion layer along with miniaturization of integrated circuit elements.

Next, in the halogen ion implantation step, the angle formed by the implanted ion beam with respect to the silicon substrate was changed, and the relationship between this incident angle and the threshold voltage was measured. The result is shown in FIG. 7. Here, chlorine ions are used as halogen ions, ions are implanted at an accelerating voltage of 30 eV and a dose amount of 1 × 10 ¹⁶ cm ^-2 , and then an amorphous silicon thin film containing 5% boron is deposited to form an amorphous region other than the source / drain regions. After removing the silicon thin film by etching, heat treatment was performed at 850 ° C. for 30 minutes in a nitrogen atmosphere, boron was diffused using this as a diffusion source, and a MOS transistor having a gate length of 0.15 μm was formed. As a result, it was found that the threshold voltage increased when the temperature was set to 60 degrees or less. That is, the change in the threshold voltage is suppressed by ion-implanting chlorine at an incident angle shallower than 60 degrees, and the short-channel effect can be suppressed more than when ion-implanting is performed at a relatively close vertical angle. You can see that more is done.

By performing the chlorine ion implantation at a shallow incident angle, a region where chlorine is present at a high concentration is formed immediately below the sidewall oxide film, and as a result, the boron concentration immediately below the sidewall oxide film can be increased. This is considered to be the result that a diffusion layer having a shorter extension in the depth direction than that in the lateral direction could be formed.

When chlorine ion implantation was performed at an extremely shallow incident angle of less than 10 degrees, the short channel effect was not suppressed as shown in FIG. This is the source,
It is considered that the drain region was a shadow of the element formed on the substrate surface and the ions were not implanted, or the implanted ions were reflected on the substrate surface and did not enter the substrate.

Next, as a second embodiment of the present invention, a method of implanting F ions and then implanting boron by BF ₂ ⁺ ion implantation will be described.

First, F ions are ion-implanted at a dose amount of 2 × 10 ¹⁵ cm ^-2 and an accelerating voltage of 20 KeV into a silicon substrate on which the gate electrode has been formed in the same manner as in the first embodiment. After that, BF ₂ ⁺ ions are accelerated at a voltage of 10
Ion implantation with keV and dose 8 × 10 ¹⁴ cm ^-2 , 95
Heat treatment was performed at 0 ° C. for 30 seconds. At this time as well, although the diffusion depth was slightly deeper, a shallow and high-concentration diffusion layer could be obtained as in the first embodiment.

Next, in order to measure the effect of implantation of F ions and the effect of the implantation conditions, when F ions are not implanted, the dose amount is 2 × 10 ¹⁵ cm ^-2 accelerating voltage 10, 20, 3
A total of four types of samples at 0 KeV were prepared, and BF ₂ ⁺ ions were ion-implanted in each of them at an acceleration voltage of 10 keV and a dose amount of 8 × 10 ¹⁴ cm ⁻² . The resulting concentration profiles are shown in FIGS. 8 (a) to 8 (d), respectively. From these results, comparing the profiles of B, it can be seen that B is deeply present when BF ₂ ⁺ ions are implanted without implanting F shown in FIG. 8 (a). BF ₂ ⁺ that exists deeply here
It is F. On the other hand, as shown in FIGS. 8B to 8D, when BF ₂ ⁺ ions are ion-implanted after F is ion-implanted, the depth is slightly shallower than in the case of FIG. 8A. However, the depth of the tail portion of ion implantation is not sufficiently shallow. It is slightly shallower than that in the case of FIG. 8 (a) because the substrate is made amorphous by pre-implantation of F and B at the time of BF ₂ ⁺ ion implantation.
It is considered that this is the result of the suppression of channeling.

Thereafter, for these four types of sample substrates,
Heat treatment was performed at 950 ° C. for 30 seconds using an RTA (rapid heating) device. The concentration profiles of B and F at this time are shown in FIGS. 9 (a) to 9 (d). Regarding the profile of F, it can be clearly seen that the peak depth formed in the deep region becomes deeper by increasing the acceleration voltage of F.
Although the B profile does not show a significant difference as compared with the F profile, as can be seen from the result of overwriting the B profile of each sample in FIG.
The tail part of becomes shallow, and especially the acceleration voltage is 20
It can be seen that the B concentration is high at a depth of about 70 nm at keV or higher. This is because by implanting F with the implantation of BF ₂ ⁺ ions,
This is because, as in the case of diffusing B from the diffusion source, the B concentration can be increased in the shallow region. As described above, according to the method of the present invention, not only is it possible to form a shallow high-concentration region that cannot be obtained only by the B channeling suppression effect, but also ion implantation that cannot be solved by any conventional method. I was able to solve the problem of shortening the tail part of.

Further, FIG. 11 shows the results of measuring the sheet resistance of these samples. As a result, the sheet resistance becomes about 2 by setting the acceleration voltage of F to 20 keV or more.
It is 0% lower, and the effectiveness of F ions can be confirmed in forming a shallow and low resistance diffusion layer.

In the above experiment, B after ion implantation of F was performed.
The heat treatment was carried out by implanting F ₂ ⁺ ions.
_{Even if} the ion implantation of F is performed after the implantation of ₂ ⁺ ions, the B profile after the heat treatment is performed except for the low concentration region of 10 ¹⁸ cm ^-3 or less, and the BF ₂ ⁺ ions are implanted after the ion implantation of F. It became exactly the same as when. Also from this result, the effect of F ion implantation for forming a shallow and high-concentration diffusion layer is more effective in controlling the B profile during heat treatment than in suppressing the B channeling. Is shown.

Further, the same effect could be obtained by simultaneously implanting BF ₂ ⁺ ions and F ions.

In addition, in such a case, if F ⁺ is used as the halogen and BF ₂ ⁺ is used as the boron-containing ion, the amount of the mixed gas obtained by the decomposition of BF ₃ is adjusted by a mass separator. It can also be supplied while.

[0044]

As described above, according to the method of the present invention, it is possible to form a shallow and high-concentration diffusion layer.

[Brief description of drawings]

FIG. 1 is a diagram showing concentration distribution profiles when a method of the present invention is used and when a conventional method is used.

FIG. 2 is a diagram showing a relationship between an implantation dose of fluorine and a concentration distribution profile in the method of the present invention.

FIG. 3 is a diagram showing a MOS transistor having a sidewall insulating film.

FIG. 4 is a diagram showing a two-dimensional concentration distribution of boron.

FIG. 5 is a manufacturing process diagram of a MOS transistor according to an embodiment of the present invention.

FIG. 6 is a diagram showing the results of measuring the relationship between the gate length and the threshold voltage of a MOS transistor formed by the method of the embodiment of the present invention and the method of the conventional example.

FIG. 7 is a diagram showing a result of measuring a relationship between an incident angle and a threshold value in fluorine ion implantation.

FIG. 8 is a diagram showing concentration distribution profiles of fluorine and boron before heat treatment when the method of the second embodiment of the present invention and the conventional method are used.

FIG. 9 is a diagram showing concentration distribution profiles of fluorine and boron after heat treatment when the method of the second embodiment of the present invention and the conventional method are used.

FIG. 10 is a diagram showing a concentration distribution profile of fluorine and boron after heat treatment when the method of the second embodiment of the present invention and the conventional method are used.

FIG. 11 is a diagram showing a relationship between an injection voltage and a threshold voltage.

[Explanation of symbols]

1 Silicon substrate 2 element isolation insulating film 3 Gate oxide film 4 Polycrystalline silicon film 5 Tungsten silicide film 6 Silicon oxide film 7 Silicon oxide film 8 Silicon boron-containing deposited film 9 p-type diffusion layer 10 Silicon oxide film 11 Aluminum film

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI H01L 29/78 301F

Claims (3)

(57) [Claims] 1. An ion implantation step of implanting halogen ions into a surface of a silicon substrate, and a solid phase or gas phase substance containing boron is brought into contact with the surface of the silicon substrate to diffuse the boron into the surface of the silicon substrate. A method of manufacturing a semiconductor device, comprising: 2. The method of manufacturing a semiconductor device according to claim 1, wherein the diffusion step forms a diffusion layer of a MOS transistor. 3. The halogen ions are fluorine ions, and the diffusion step forms a steep profile by diffusing the boron at a higher concentration than in a case where the fluorine ions are not implanted. The method for manufacturing a semiconductor device according to claim 1.