JP3458809B2 - Printed wiring board and method of manufacturing the same - Google Patents
Printed wiring board and method of manufacturing the sameInfo
- Publication number
- JP3458809B2 JP3458809B2 JP2000030262A JP2000030262A JP3458809B2 JP 3458809 B2 JP3458809 B2 JP 3458809B2 JP 2000030262 A JP2000030262 A JP 2000030262A JP 2000030262 A JP2000030262 A JP 2000030262A JP 3458809 B2 JP3458809 B2 JP 3458809B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor circuit
- circuit portion
- printed wiring
- wiring board
- solder resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、電子部品であるプ
リント配線板とその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board which is an electronic component and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】電子部品の一つとしてプリント配線板が
あるが、このプリント配線板には、例えば、ガラスエポ
キシ樹脂の表面に銅皮膜を形成した、いわゆる銅張りガ
ラスエポキシ樹脂基板を用いて製造されるものがあり、
多用されている。ところで、このような銅張りガラスエ
ポキシ樹脂基板は、ガラスクロスにエポキシ樹脂を含浸
させて成形した、いわゆるガラスエポキシ樹脂板に対
し、予め接合面に接着剤を塗布した銅箔を張り合わせる
方法、或いはガラスエポキシ樹脂プリプレグと銅箔とを
熱圧着する方法などによって得られている。この際に用
いられる銅箔としては、厚みに応じて電解銅箔や圧延銅
箔が用いられ、一般にその厚みは９μｍ〜３５μｍ程度
のものが主流となっている。2. Description of the Related Art There is a printed wiring board as one of electronic parts. For this printed wiring board, for example, a so-called copper-clad glass epoxy resin substrate in which a copper film is formed on the surface of glass epoxy resin is used. There is something
It is used a lot. By the way, such a copper-clad glass epoxy resin substrate is formed by impregnating a glass cloth with an epoxy resin, a so-called glass epoxy resin plate, and a method of laminating a copper foil having a bonding surface coated with an adhesive in advance, or It is obtained by a method such as thermocompression bonding of a glass epoxy resin prepreg and a copper foil. As the copper foil used at this time, an electrolytic copper foil or a rolled copper foil is used according to the thickness, and generally, the thickness thereof is about 9 μm to 35 μm.
【０００３】しかし、プリント配線板がテレビ、カメラ
などの民生用機器類、コンピューターなどの多種の産業
用機器類に幅広く使用されるにつれて、高密度な配線が
要求されるようになってきた。その結果、微細な回路を
精度よく形成することが必要となり、このため、銅被膜
層の薄肉化が求められてきた。これに応えるべく従来種
々の検討が成されているが、有力な技術の一つとして銅
張りガラスエポキシ樹脂基板の表面に無電解メッキ法に
より薄い銅被膜層薄膜を形成し、これにセミアディティ
ブ法やサブトラクティブ法などを適用してプリント配線
板を得ることが検討されている。However, with the widespread use of printed wiring boards in consumer devices such as televisions and cameras, and various industrial devices such as computers, high-density wiring has been required. As a result, it is necessary to form a fine circuit with high precision, and for this reason, it has been required to reduce the thickness of the copper coating layer. In order to respond to this, various studies have been made in the past, but as one of the leading technologies, a thin copper coating layer thin film is formed on the surface of a copper-clad glass epoxy resin substrate by electroless plating, and a semi-additive method is applied to this. It is considered to obtain a printed wiring board by applying a subtractive method or the like.
【０００４】ここで、セミアディティブ法とは、銅張り
ガラスエポキシ樹脂基板上の銅被膜層に更にメッキによ
り導体回路を形成する方法である。これを詳細に説明す
ると、まず銅張りガラスエポキシ樹脂基板上に形成され
た金属皮膜を第１の金属層とし、その上に所定のパター
ンでメッキレジスト層を形成する。この場合、メッキレ
ジスト層の厚さを、所望の回路の厚さ以上とする。次い
で、露出している第１の金属層の上に電気メッキ法によ
り銅を析出させてメッキ被膜（第２の金属層）を形成す
る。その後、前記メッキレジスト層を剥離して、第１の
金属層を露出させ、第２の金属層をマスクしてエッチン
グし、露出する第１の金属層を除去して導体回路を形成
する方法である。またサブトラクティブ法とは、銅張り
ガラスエポキシ樹脂基板から銅被膜層を溶解除去して導
体回路を形成する方法である。これを詳細に説明する
と、銅張りガラスエポキシ樹脂基板の銅皮膜上に、電気
メッキ法で所望の厚さに銅を析出させ、その上に所定パ
ターンでメッキレジスト層を形成する。次いで、露出し
た銅皮膜領域を溶解除去して、導体回路パターンを形成
し、その後前記レジスト層を剥離することによりプリン
ト配線板を製造する方法である。上記のようなセミアデ
ィティブ法やサブトラクティブ法により得られたプリン
ト配線板は、用いる銅皮膜層が従来の電解銅箔や圧延銅
箔より格段に薄く出来るため、電解銅箔や圧延銅箔を用
いた銅張りガラスエポキシ樹脂基板で作製されたプリン
ト配線板に比べ、高密度な配線を形成することが可能で
ある。Here, the semi-additive method is a method in which a conductor circuit is formed on the copper coating layer on the copper-clad glass epoxy resin substrate by further plating. This will be described in detail. First, a metal film formed on a copper-clad glass epoxy resin substrate is used as a first metal layer, and a plating resist layer is formed on the first metal layer in a predetermined pattern. In this case, the thickness of the plating resist layer is made equal to or larger than the thickness of the desired circuit. Then, copper is deposited on the exposed first metal layer by an electroplating method to form a plating film (second metal layer). Then, the plating resist layer is peeled off to expose the first metal layer, the second metal layer is masked and etched, and the exposed first metal layer is removed to form a conductor circuit. is there. The subtractive method is a method of forming a conductor circuit by dissolving and removing a copper coating layer from a copper-clad glass epoxy resin substrate. This will be described in detail. Copper is deposited to a desired thickness on a copper film of a copper-clad glass epoxy resin substrate by an electroplating method, and a plating resist layer is formed in a predetermined pattern on the copper. Next, the exposed copper film region is dissolved and removed to form a conductor circuit pattern, and then the resist layer is peeled off to produce a printed wiring board. The printed wiring board obtained by the above semi-additive method or subtractive method uses electrolytic copper foil or rolled copper foil because the copper film layer used can be made significantly thinner than conventional electrolytic copper foil or rolled copper foil. It is possible to form high-density wiring as compared with a printed wiring board made of a conventional copper-clad glass epoxy resin substrate.
【０００５】ところで、このようにして得られたプリン
ト配線板は、通常シート状であり、半導体チップを搭載
するための導体回路部分が中央領域に複数個配列されて
いる。即ち、該プリント配線板は、導体回路部と、該導
体回路部を囲むように設けられていて、実装工程で除去
される周辺領域とから構成される。そして、このような
プリント配線板は、その後、以下のような処理が施され
る。即ち、基板回路全体を、後に実施するソルダレジス
トとの密着性を向上させるために粗面化した後、ソルダ
レジストを導体回路部分と周辺領域との表面を覆うよう
にコーティング、或いはラミネートし、このソルダレジ
スト層に所定のマスクを用いて露光・現像し、バンプパ
ッド部を露出させ、不要部を除去した後、ソルダレジス
ト層を熱硬化させ、前記バンプパット部に電気メッキが
施される。このようにして得たシート状のプリント配線
板上に半導体素子を搭載するに際しては、該プリント配
線板を搬送することが必要となる。この際に上記端部、
特にシート長手方向の周辺領域が用いられる。よって、
この周辺領域は強度が必要とされるため、通常銅被膜層
を除去することなく、その上からソルダレジスト層が設
けられる。The printed wiring board thus obtained is usually in the form of a sheet, and a plurality of conductor circuit portions for mounting semiconductor chips are arranged in the central region. That is, the printed wiring board is composed of a conductor circuit portion and a peripheral region which is provided so as to surround the conductor circuit portion and is removed in the mounting process. Then, such a printed wiring board is then subjected to the following processing. That is, the entire substrate circuit is roughened in order to improve the adhesion with the solder resist to be implemented later, and then the solder resist is coated or laminated so as to cover the surfaces of the conductor circuit portion and the peripheral region. The solder resist layer is exposed and developed using a predetermined mask to expose the bump pad portion and the unnecessary portion is removed. Then, the solder resist layer is thermally cured, and the bump pad portion is electroplated. When mounting a semiconductor element on the thus obtained sheet-shaped printed wiring board, it is necessary to transport the printed wiring board. At this time, the end portion,
In particular, the peripheral area in the longitudinal direction of the sheet is used. Therefore,
Since strength is required in this peripheral region, a solder resist layer is usually provided on the peripheral region without removing the copper coating layer.
【０００６】近年半導体素子実装速度の高速化は目覚ま
しい。このため、用いるプリント配線板の厚みの均一性
が求められ、周辺領域の厚みも可能な限り導体回路部の
厚みに近づけることが望まれるようになってきた。しか
しながら、導体回路部では銅被覆層がない部分があり、
周辺領域では銅被覆層が全面に存在することから、周辺
領域の厚みは導体回路部の厚みより厚くならざるを得な
いという問題がある。こうしたプリント配線板を用いて
高速実装を行った場合、必ずしも十分な加工精度が得ら
れない。In recent years, the semiconductor element mounting speed has been remarkably increased. Therefore, it is required that the thickness of the printed wiring board to be used be uniform, and that the thickness of the peripheral region be as close as possible to the thickness of the conductor circuit portion. However, in the conductor circuit part, there is a part without a copper coating layer,
Since the copper coating layer is present on the entire surface in the peripheral region, there is a problem that the thickness of the peripheral region must be larger than the thickness of the conductor circuit portion. When high-speed mounting is performed using such a printed wiring board, sufficient processing accuracy cannot always be obtained.
【０００７】[0007]
【発明が解決しようとする課題】こうした問題を解決す
べく検討されているものに、周辺領域の銅被覆層を、格
子状に銅被覆層が残るようにエッチングし、その上にソ
ルダレジスト層を設けることが試みられ、一部実施され
ている。この方法は、こうすることにより、周辺領域の
厚みを薄くし、導体回路部の厚みに近づけようとするも
のである。この方法は確かに周辺領域の厚みを導体回路
部の厚みに近づけることを可能にした。しかしながら、
前記したソルダレジストをコーティング或いはラミネー
トする際に、周辺領域に設けられた開口部分の基板樹脂
表面とソルダレジストとが密着せず、ソルダレジストと
基板樹脂表面との間に気泡を巻き込むという事態が発生
した。このように気泡を巻き込んだ場合、該プリント配
線板は不良品として廃棄せざるを得ない。この結果、製
品歩留まりを悪化させることとなり、改善が望まれてい
た。In consideration of the problems to be solved, the copper coating layer in the peripheral region is etched so that the copper coating layer remains in a grid pattern, and a solder resist layer is formed thereon. Attempts have been made, and some have been implemented. This method is intended to reduce the thickness of the peripheral region and bring it closer to the thickness of the conductor circuit portion by doing so. This method has made it possible to bring the thickness of the peripheral region closer to the thickness of the conductor circuit portion. However,
When coating or laminating the solder resist described above, a situation may occur in which air bubbles are caught between the solder resist and the substrate resin surface due to the fact that the substrate resin surface at the opening provided in the peripheral area does not adhere to the solder resist. did. When air bubbles are thus caught, the printed wiring board must be discarded as a defective product. As a result, the product yield is deteriorated, and improvement has been desired.
【０００８】本発明は、従来技術の有するこのような問
題点に鑑みてなされたものであり、その目的とするとこ
ろは、導体回路部と、該導体回路部の周囲に設けられた
周辺領域と、所定部分のみ開口されて該導体回路部と周
辺領域とを覆うように設けられたソルダレジスト層とか
ら主として構成されるプリント配線板において、周辺領
域の表面とソルダレジスト層との間に気泡が存在し得な
いようにしたプリント配線板とその製造方法を提供しよ
うとするものである。The present invention has been made in view of such problems of the prior art, and an object thereof is to provide a conductor circuit portion and a peripheral region provided around the conductor circuit portion. In a printed wiring board mainly composed of a solder resist layer provided so as to cover the conductor circuit portion and the peripheral region by opening only a predetermined portion, air bubbles are generated between the surface of the peripheral region and the solder resist layer. An object of the present invention is to provide a printed wiring board that cannot exist and a manufacturing method thereof.
【０００９】[0009]
【課題を解決するための手段】上記目的を達成するた
め、本発明によるプリント配線板は、導体回路部を設け
た中央領域と前記導体回路部を取り囲んでいて一辺の長
さが１００乃至３３０μｍの何れかである方形をなす同
じ大きさの所定の間隔を置いて格子状に配列された多数
の開口を設けた金属皮膜で被覆された周辺領域とを有す
る絶縁基板と、少なくとも前記導体回路部のバンプパッ
ド部が露出するように前記中央領域と周辺領域を被覆し
たソルダレジスト層とを含んでいる。本発明によれば、
前記絶縁基板は好ましくはガラスエポキシ樹脂から成っ
ており、また、金属皮膜は好ましくは銅から成ってい
る。In order to achieve the above object, the printed wiring board according to the present invention has a length of one side which surrounds the central area where the conductor circuit portion is provided and the conductor circuit portion.
A square shape having a size of 100 to 330 μm
An insulating substrate having a peripheral region covered with a metal film and provided with a large number of openings arranged in a grid pattern at predetermined intervals, and at least the bump pad portion of the conductor circuit portion is exposed. And a solder resist layer covering the central region and the peripheral region. According to the invention,
The insulating substrate is preferably made of glass epoxy resin, and the metal coating is preferably made of copper.
【００１０】上記目的を達成するため、本発明によるプ
リント配線板の製造方法は、一側表面に金属皮膜を設け
た絶縁基板を準備するステップと、前記金属皮膜を用い
て前記絶縁基板の中央領域に導体回路部を形成するステ
ップと、前記導体回路部を含む前記金属皮膜全体を粗面
化するステップと、前記中央領域を取り囲む周辺領域の
前記金属皮膜に一辺の長さが１００乃至３３０μｍの何
れかである方形をなす同じ大きさの互いに所定の隔を置
いて配置された多数の開口を形成するステップと、前記
中央領域と前記周辺領域の表面全体にソルダレジスト層
を形成した後所定のマスクを用いて露光し現像するステ
ップと、少なくとも前記導体回路部のバンプパッド部の
ソルダレジストを除去した後前記ソルダレジスト層を硬
化させるステップと、露出した前記金属皮膜表面に電気
メッキを施すステップとを含んでいる。また、本発明の
製造方法によれば、前記導体回路部は、セミアディティ
ブ法又はサブトラクティブ法により形成される。In order to achieve the above object, a method of manufacturing a printed wiring board according to the present invention comprises a step of preparing an insulating substrate having a metal coating on one surface thereof, and a central region of the insulating substrate using the metal coating. Forming a conductor circuit part on the metal film, roughening the whole metal film including the conductor circuit part, and forming a metal film having a side length of 100 to 330 μm on the metal film in the peripheral region surrounding the central region.
Some squares of the same size and spaced apart from each other
Forming a large number of apertures arranged in the central region and the peripheral region, and then exposing and developing using a predetermined mask after forming a solder resist layer on the entire surface of the central region and the peripheral region; The method includes a step of curing the solder resist layer after removing the solder resist on the bump pad portion, and a step of electroplating the exposed surface of the metal film. Further, according to the manufacturing method of the present invention, the conductor circuit portion is formed by a semi-additive method or a subtractive method.
【００１１】[0011]
【発明の実施の形態】以下、本発明の実施の形態を図面
及び実施例に基づき説明する。図１は製造過程にある本
発明に係るプリント配線板の一実施例を示す平面図、図
２は図１に示したプリント配線板の導体回路部周辺領域
の一部拡大平面図である。図１に示す如く、本発明に係
るプリント配線板は、両側部に搬送用の孔１ａが穿設さ
れたサイドレール部１ｂを有する帯状の例えばガラスエ
ポキシ樹脂等から成る絶縁基板１上に例えば１２駒所定
の間隔を置いて連設された方形のユニットとして形成さ
れ、製造の最終工程で個々に切り離されて製品とされ
る。各ユニットの中央領域１Ａには所定の導体回路部が
形成され、前記サイドレール部１ｂを含むその周辺領域
１Ｂには後述する多数の開口２が形成されている。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings and examples. 1 is a plan view showing an embodiment of a printed wiring board according to the present invention in a manufacturing process, and FIG. 2 is a partially enlarged plan view of a peripheral region of a conductor circuit portion of the printed wiring board shown in FIG. As shown in FIG. 1, a printed wiring board according to the present invention has, for example, 12 layers on a strip-shaped insulating substrate 1 made of, for example, glass epoxy resin having side rail portions 1b having holes 1a for transportation formed on both sides thereof. Pieces are formed as rectangular units that are continuously arranged at predetermined intervals, and are individually cut into products in the final manufacturing process. A predetermined conductor circuit portion is formed in the central area 1A of each unit, and a large number of openings 2 described later are formed in the peripheral area 1B including the side rail portion 1b.
【００１２】導体回路部は、一般的な銅張りガラスエポ
キシ樹脂基板等を用いて形成され得るが、前述のセミア
ディティブ法、サブトラクティブ法、フルアディティブ
法の何れを用いても形成することが出来る。無電解メッ
キ法を用いてガラスエポキシ樹脂基板の如き絶縁基板１
の表面上に導体回路部を形成する場合は、該絶縁基板１
の表面にメッキ触媒としてパラジウム或いはそれを含む
合金が付与された後、無電解メッキ法により金属皮膜が
形成される。また、フルアディティブ法を用いて導体回
路部を形成する場合は、絶縁基板表面に上記触媒を付着
させた後、その上面にレジスト層を設け、所望のマスク
を用いてパターニングし、露出した触媒付きの絶縁基板
表面に金属皮膜を形成して導体回路部を作成する。この
際、導体回路部即ち各ユニットの中央領域１Ａを取り囲
む周辺領域１Ｂにも、図２に示した如く、格子状に多数
の開口２を有する金属皮膜を形成する。The conductor circuit portion can be formed by using a general copper-clad glass epoxy resin substrate or the like, but can be formed by any of the above-mentioned semi-additive method, subtractive method, and full-additive method. . Insulating substrate 1 such as glass epoxy resin substrate using electroless plating method
When a conductor circuit portion is formed on the surface of the
After palladium or an alloy containing it is applied as a plating catalyst to the surface of the metal, a metal film is formed by an electroless plating method. Also, when forming a conductor circuit part using the full additive method, after depositing the above catalyst on the surface of the insulating substrate, a resist layer is provided on the upper surface, patterning is performed using a desired mask, and the exposed catalyst is attached. A conductor film is formed by forming a metal film on the surface of the insulating substrate. At this time, as shown in FIG. 2, a metal film having a large number of openings 2 in a grid pattern is also formed on the conductor circuit portion, that is, the peripheral region 1B surrounding the central region 1A of each unit.
【００１３】このようにして、絶縁基板表面に形成され
た導体回路部を、例えば化学研磨，バフ研磨或いはジェ
ットスクラブ（砥石吹き付け）などによって粗面化して
ソルダレジストとの密着性を良くした後、絶縁基板表面
全体にソルダレジストを塗布またはラミネートして該表
面全体を被覆し、導体回路部中央部に存在するバンプパ
ッド部上のソルダレジスト層を露光・現像することによ
り除去して該バンプパッド部を露出させ、熱処理してソ
ルダレジスト層を紫外線照射して硬化させ、その後、露
出したバンプパッド部にニッケル−金メッキ或いは金メ
ッキを施して、プリント配線基板を完成する。In this manner, the conductor circuit portion formed on the surface of the insulating substrate is roughened by, for example, chemical polishing, buff polishing, jet scrub (grinding stone spraying) or the like to improve the adhesion with the solder resist. The entire surface of the insulating substrate is coated or laminated with a solder resist to cover the entire surface, and the solder resist layer on the bump pad portion existing in the central portion of the conductor circuit portion is removed by exposing and developing the bump pad portion. Is exposed and heat-treated to irradiate the solder resist layer with ultraviolet rays to cure it, and then the exposed bump pad portion is plated with nickel-gold or gold to complete a printed wiring board.
【００１４】ここで、周辺領域１Ｂに多数の開口２を設
ける理由について説明する。一般に、ソルダレジスト層
の形成には膜厚精度を保持するためにスクリーン印刷法
が使用されるが、導体回路部の配線形状（密度）によ
り、同一条件で塗布しても、周辺領域１Ｂが金属皮膜で
完全に被覆されている場合には、導体回路部に比べて周
辺領域におけるソルダレジストの膜厚が著しく厚くな
り、製品として不都合が生じる。この不都合をなくすた
めに、周辺領域１Ｂの金属皮膜に格子状に多数の開口２
を設けて、導体回路部即ち中央領域１Ａと周辺領域１Ｂ
に形成されるソルダレジスト層の厚さを可能な限り近づ
けるようにしている。この場合、多数の開口２を格子状
に配置したのは、周辺領域１Ｂに適度の強度を付与する
ためで、特にサイドレール部１ｂの強度を適当に保持さ
せて、製造時における絶縁基板１の搬送時にジャミング
等支障を来すことのないようにするためである。Here, the reason why a large number of openings 2 are provided in the peripheral region 1B will be described. Generally, a screen printing method is used for forming the solder resist layer in order to maintain the film thickness accuracy. However, depending on the wiring shape (density) of the conductor circuit portion, even if the peripheral region 1B is metalized even if it is applied under the same conditions. When it is completely covered with a film, the film thickness of the solder resist in the peripheral region becomes significantly thicker than in the conductor circuit portion, which causes a problem as a product. In order to eliminate this inconvenience, a large number of openings 2 in a grid pattern are formed on the metal film in the peripheral region 1B.
To provide the conductor circuit portion, that is, the central area 1A and the peripheral area 1B.
The thickness of the solder resist layer formed on the substrate is made as close as possible. In this case, the reason why the large number of openings 2 are arranged in a lattice pattern is to impart appropriate strength to the peripheral region 1B, and in particular, the strength of the side rail portion 1b is appropriately maintained so that the insulating substrate 1 at the time of manufacture is This is to prevent problems such as jamming during transportation.
【００１５】周辺領域１Ｂの強度を適正に保持するため
に、隣接する各開口間の距離即ち開口２の配列ピッチを
適当に選択する必要があることは云うまでもないが、開
口２内にソルダレジストが十分に入り込むようにするた
めには、開口２の一辺の長さＬが或る値以上であること
が必要である。ソルダレジストが開口２内に十分に入り
込まないと、ソルダレジストの塗布時絶縁基板表面上の
導体層とソルダレジスト層との間に気泡が巻き込まれ、
不良品を生む結果となる。また、開口２の一辺の長さＬ
（図２参照）は、用いられる金属皮膜の厚さと関連し、
金属皮膜が厚くなればなる程長くなければならない。実
験によれば、金属皮膜の厚さを一般的に回路形成に用い
られる２０μｍ前後とした場合、上記諸条件を考慮し
て、開口２の一辺の長さＬは、１００乃至３００μｍで
あることが好ましく、１４０乃至３３０μｍとするとよ
り好ましいことが分かった。開口２の形状は図２に示す
ように正方形であることが好ましいが、長方形又は三角
形であってもよい。Needless to say, in order to maintain the strength of the peripheral region 1B appropriately, the distance between adjacent openings, that is, the arrangement pitch of the openings 2 must be appropriately selected. In order to allow the resist to enter sufficiently, the length L of one side of the opening 2 needs to be a certain value or more. If the solder resist does not sufficiently enter into the opening 2, air bubbles are caught between the conductor layer and the solder resist layer on the surface of the insulating substrate during the application of the solder resist,
This will result in defective products. In addition, the length L of one side of the opening 2
(See Figure 2) is related to the thickness of the metal coating used,
The thicker the metal coating, the longer it must be. According to the experiment, when the thickness of the metal film is about 20 μm which is generally used for forming a circuit, the length L of one side of the opening 2 is 100 to 300 μm in consideration of the above conditions. It was found that the thickness is preferably 140 to 330 μm, and more preferably. The shape of the opening 2 is preferably square as shown in FIG. 2, but may be rectangular or triangular.
【００１６】次に、本発明を検討例、実施例及び比較例
に基づき説明する。検討例
この検討例は、中央領域１Ａに形成される導体回路部の
周辺領域１Ｂに形成される開口２の配列ピッチと大きさ
の条件を求めるために行われた実験結果を示すものであ
る。先ず、検討片として用意した厚さ１８μｍの銅箔を
張った厚さ２００μｍのガラスエポキシ樹脂基板の表面
に、旭化成工業（株）製のドライフィルム型フォトレジ
スト（商品名「ＡＱ２５５９」）を厚さ２５μｍとなる
ように均一にラミネートした。その後、図２に示したよ
うに、各検討片のフォトレジスト層上に、開口２の配列
ピッチが４００μｍであり、開口２の一辺の長さＬが、
２０μｍ，３０μｍ，４０μｍ，５０μｍ，６０μｍ，
７０μｍ，８０μｍ，９０μｍ，１００μｍ，１２０μ
ｍ，１４０μｍ，１６０μｍ，１８０μｍ，２００μ
ｍ，２５０μｍ，３００μｍとなるように夫々パターニ
ングされたフォトマスクを載置し、６０ｍＪ／ｃｍ2 の
紫外線を照射した後、現像し、露出した銅箔部をエッチ
ング法により除去し、各４００ケの開口２が格子状に形
成された基板を得た。次にこの基板上に残存するフォト
レジスト層を除去し、粒径１００μｍの砥粒を吹き付け
て粗面化した後、太陽インキ（株）製のソルダレジスト
（商品名「ＰＳＲ４０００ＡＵＳ」）を厚さ２５〜３０
μｍとなるように塗布した。その後、これを乾燥し、紫
外線を照射して硬化させた。その後、各開口２に気泡が
存在するかどうかを倍率４０倍の光学顕微鏡にて４００
個繰り返し観察し、気泡が存在する開口の数を数え、そ
の平均値をレジスト欠損数とした。その結果が下表に示
されている。その後、ソルダレジストを剥離し、開口２
の一辺の実際の長さＬ（以下、開口寸法という）を測定
した。その平均値が下表に合せて示されている。
Ａ（μｍ） レジスト欠損数
設計値 実際値 個／４００
２０ ４３ ２５８
３０ ５１ １７３
４０ ６１ １０１
５０ ７０ ３５
６０ ８３ ７
７０ ９５ ９
８０ １０７ ０
９０ １１５ ０
１００ １２７ ０
１２０ １４７ ０
１４０ １７２ ０
１６０ １９０ ０
１８０ ２０７ ０
２００ ２３０ ０
２５０ ２７７ ０
３００ ３３０ ０
３５０ ３８２ ０
この表から明らかなように、開口２の一辺の長さＬが１
００μｍ以上の場合は、気泡が全く存在せず、プリント
配線板として問題のない合格品が得られることが分か
る。Next, the present invention will be described based on a study example, an example and a comparative example. Examination Example This examination example shows the results of an experiment conducted to obtain conditions for the arrangement pitch and size of the openings 2 formed in the peripheral region 1B of the conductor circuit portion formed in the central region 1A. First, a dry film type photoresist (trade name "AQ2559") manufactured by Asahi Kasei Kogyo Co., Ltd. is formed on the surface of a glass epoxy resin substrate having a thickness of 200 μm, which is provided with a copper foil having a thickness of 18 μm prepared as a test piece. It was evenly laminated to have a thickness of 25 μm. After that, as shown in FIG. 2, the arrangement pitch of the openings 2 is 400 μm, and the length L of one side of the openings 2 is on the photoresist layer of each test piece.
20μm, 30μm, 40μm, 50μm, 60μm,
70μm, 80μm, 90μm, 100μm, 120μ
m, 140 μm, 160 μm, 180 μm, 200 μ
The photomasks patterned to have m, 250 μm, and 300 μm respectively were placed, and after irradiation with ultraviolet rays of 60 mJ / cm 2 , development was performed, and the exposed copper foil portion was removed by an etching method. A substrate having openings 2 formed in a grid pattern was obtained. Next, the photoresist layer remaining on this substrate was removed, and abrasive grains having a particle size of 100 μm were sprayed to roughen the surface. Then, a solder resist (trade name “PSR4000AUS”) manufactured by Taiyo Ink Co., Ltd. was formed to a thickness of 25. ~ 30
It was applied to have a thickness of μm. Then, this was dried and irradiated with ultraviolet rays to be cured. After that, whether or not air bubbles are present in each opening 2 is checked with an optical microscope at a magnification of 40 times.
The number of openings in which bubbles were present was counted repeatedly, and the average value was used as the number of resist defects. The results are shown in the table below. After that, the solder resist is peeled off and the opening 2 is formed.
The actual length L of one side (hereinafter referred to as the opening size) was measured. The average values are shown in the table below. A (μm) Number of resist defects Design value Actual value / 400 20 43 43 258 30 51 173 40 61 61 101 50 70 35 35 60 60 83 7 70 95 9 80 80 107 0 90 115 115 0 100 127 127 0 120 147 0 140 172 0 160 1900 180 207 0 200 200 230 0 250 277 0 300 330 0 350 382 0 As is apparent from this table, the length L of one side of the opening 2 is 1
It can be seen that when the thickness is 00 μm or more, no bubbles are present at all, and an acceptable product having no problem as a printed wiring board can be obtained.
【００１７】実施例１
厚さ１８μｍの銅箔を張った厚さ２００μｍのガラスエ
ポキシ樹脂基板の表面に、旭化成工業（株）製のドライ
フィルム型フォトレジスト（商品名「ＡＱ２５５９」）
を厚さ２５μｍで均一にラミネートした。その後、所定
のマスクを用いて６０ｍＪ／ｃｍ2 の紫外線を照射した
後、現像し、露出した銅箔部をエッチングして除去し、
図１に示す如く、中央部に所定の配線回路とバンプパッ
ド部を有する導体回路部を作成し、その両側に、開口の
配列ピッチ４００μｍ、実質開口寸法１２０μｍで格子
状に配列された多数の開口を有する導体回路部周辺部を
作成した。次にこの基板表面に粒径１００μｍの砥粒を
吹き付けて粗面化した後、太陽インキ（株）製のソルダ
レジスト（商品名「ＰＳＲ４０００ＡＵＳ」）を厚さ２
５〜３０μｍとなるように塗布した。その後、所定のマ
スクを載置して露光、現像してバンプパッド部を露出さ
せ、次いで紫外線を照射してソルダレジストを硬化させ
た。その後、バンプパッド部にニッケルメッキを施し、
引き続き金メッキを施し、外形を整えた。このようにし
て１シートに１２ユニットの導体回路部と、シート長手
方向で導体回路部の両脇に導体回路部周辺部とを有する
プリント配線板１を５０枚作成し、導体回路部とその両
脇の導体回路部周辺部の厚さを全数測定し、その平均値
を測定した。その結果、導体回路部の平均厚さは２６４
μｍであり、導体回路部周辺部の平均厚さは２７５μｍ
であった。また、導体回路部周辺部でのソルダレジスト
の密着状態を調査したが、気泡の巻き込みによる不良は
なかった。 Example 1 A dry film type photoresist (trade name "AQ2559") manufactured by Asahi Kasei Kogyo Co., Ltd. was formed on the surface of a glass epoxy resin substrate having a thickness of 200 μm with a copper foil having a thickness of 18 μm.
Was uniformly laminated to a thickness of 25 μm. Then, after irradiating with ultraviolet rays of 60 mJ / cm 2 using a predetermined mask, it is developed, and the exposed copper foil portion is removed by etching,
As shown in FIG. 1, a conductor circuit part having a predetermined wiring circuit and a bump pad part is formed in the central part, and a large number of openings are arranged on both sides of the conductor circuit part in a grid pattern with an array pitch of 400 μm and a substantial opening size of 120 μm. A peripheral portion of the conductor circuit portion having the is formed. Next, after polishing the surface of the substrate with abrasive grains having a particle size of 100 μm to roughen the surface, a solder resist (trade name “PSR4000AUS”) manufactured by Taiyo Ink Co., Ltd. having a thickness of 2 is used.
It was applied so as to have a thickness of 5 to 30 μm. Thereafter, a predetermined mask was placed, exposed and developed to expose the bump pad portion, and then ultraviolet rays were irradiated to cure the solder resist. After that, nickel plating is applied to the bump pad,
Subsequently, gold plating was applied to adjust the outer shape. In this manner, 50 printed wiring boards 1 having 12 units of conductor circuit portions on one sheet and conductor circuit portion peripheral portions on both sides of the conductor circuit portion in the sheet longitudinal direction were prepared. The total thickness of the peripheral side of the conductor circuit portion was measured, and the average value was measured. As a result, the average thickness of the conductor circuit portion is 264.
μm, and the average thickness around the conductor circuit is 275 μm.
Met. Further, the adhesion state of the solder resist in the peripheral portion of the conductor circuit portion was investigated, but no defect was found due to inclusion of bubbles.
【００１８】実施例２
銅箔の厚さを２５μｍとし、導体回路部周辺部における
実質開口寸法を１４０μｍとした以外は実施例１と同様
にしてプリント配線板１を５０枚作成し、導体回路部と
その両脇の導体回路部周辺部の厚さを全数測定し、その
平均値を測定した。その結果、導体回路部の平均厚さは
２６３μｍであり、導体回路部周辺部の平均厚さは２７
３μｍであった。また、導体回路部周辺部でのソルダレ
ジストの密着状態を調査したが、気泡の巻き込みによる
不良はなかった。 Example 2 50 printed wiring boards 1 were prepared in the same manner as in Example 1 except that the thickness of the copper foil was 25 μm and the substantial opening dimension in the periphery of the conductor circuit portion was 140 μm. And, the total thickness of the peripheral portions of the conductor circuit portion on both sides was measured, and the average value was measured. As a result, the average thickness of the conductor circuit portion was 263 μm, and the average thickness of the peripheral portion of the conductor circuit portion was 27 μm.
It was 3 μm. Further, the adhesion state of the solder resist in the peripheral portion of the conductor circuit portion was investigated, but no defect was found due to inclusion of bubbles.
【００１９】実施例３
表面粗化に用いる砥粒の粒径を５０μｍとした以外は実
施例１と同様にしてプリント配線板１を５０枚作成し、
導体回路部とその両脇の導体回路部周辺部の厚さを全数
測定し、その平均値を測定した。その結果、導体回路部
の平均厚さは２６４μｍであり、導体回路部周辺部１Ｂ
の平均厚さは２７４μｍであった。また、導体回路部周
辺部でのソルダレジストの密着状態を調査したが、気泡
の巻き込みによる不良はなく、実施例１と同様に良好で
あった。 Example 3 Fifty printed wiring boards 1 were prepared in the same manner as in Example 1 except that the grain size of the abrasive grains used for surface roughening was 50 μm.
The total thicknesses of the conductor circuit portion and the peripheral portions of the conductor circuit portion on both sides of the conductor circuit portion were measured, and the average value thereof was measured. As a result, the average thickness of the conductor circuit portion was 264 μm, and the conductor circuit portion peripheral portion 1B
Had an average thickness of 274 μm. Further, the adhesion state of the solder resist in the peripheral portion of the conductor circuit portion was investigated, and it was found that there was no defect due to entrapment of air bubbles and it was good as in Example 1.
【００２０】比較例１
銅箔の厚さを１８μｍとし、導体回路部周辺部における
実質開口寸法を３５０μｍとした以外は実施例１と同様
にしてプリント配線板１を５０枚作成し、導体回路部と
その両脇の導体回路部周辺部の厚さを全数測定し、その
平均値を測定した。その結果、導体回路部の平均厚さは
２６４μｍであり、導体回路部周辺部の平均厚さは２６
６μｍであった。また、導体回路部周辺部でのソルダレ
ジストの密着状態を調査したが、気泡の巻き込みによる
不良はなかった。導体回路部周辺部の強度が弱く、実装
工程で用いることができなかった。 Comparative Example 1 50 printed wiring boards 1 were prepared in the same manner as in Example 1 except that the thickness of the copper foil was 18 μm and the substantial opening size in the periphery of the conductor circuit was 350 μm. And, the total thickness of the peripheral portions of the conductor circuit portion on both sides was measured, and the average value was measured. As a result, the average thickness of the conductor circuit portion was 264 μm, and the average thickness of the peripheral portion of the conductor circuit portion was 26 μm.
It was 6 μm. Further, the adhesion state of the solder resist in the peripheral portion of the conductor circuit portion was investigated, but no defect was found due to inclusion of bubbles. The strength of the peripheral portion of the conductor circuit was weak, and it could not be used in the mounting process.
【００２１】比較例２
銅箔の厚さを１８μｍとし、導体回路部周辺部における
実質開口寸法を９０μｍとした以外は実施例１と同様に
してプリント配線板１を５０枚作成し、導体回路部とそ
の両脇の導体回路部周辺部の厚さを全数測定し、その平
均値を測定した。その結果、導体回路部の平均厚さは２
６４μｍであり、導体回路部周辺部の平均厚さは２７８
μｍであった。導体回路部周辺部でのソルダレジストの
密着状態を調査したところ、気泡の巻き込みによる不良
が多発し実用に耐えるものとならなかった。 Comparative Example 2 50 printed wiring boards 1 were prepared in the same manner as in Example 1 except that the thickness of the copper foil was 18 μm and the substantial opening dimension in the peripheral portion of the conductor circuit portion was 90 μm. And, the total thickness of the peripheral portions of the conductor circuit portion on both sides was measured, and the average value was measured. As a result, the average thickness of the conductor circuit is 2
64 μm, and the average thickness around the conductor circuit is 278.
was μm. When the adhesion state of the solder resist around the conductor circuit part was investigated, defects were frequently caused by the inclusion of bubbles, and it could not be put to practical use.
【００２２】[0022]
【発明の効果】以上述べた通り本発明の方法によれば、
導体回路部の周辺領域に設けた格子状に配列された多数
の開口の一辺の長さを１００〜３３０μｍとすることに
より、当該領域の厚みを導体回路部の厚みに近づけ得る
ばかりでなく、ソルダレジストと絶縁基板の表面とを、
気泡を巻き込むことなく、確実に接合できる。よって、
本発明の方法で作成されたプリント配線板を用いれば、
信頼性の高い半導体装置を組み立てることが可能とな
る。As described above, according to the method of the present invention,
By setting the length of one side of a large number of openings arranged in a grid pattern in the peripheral region of the conductor circuit portion to 100 to 330 μm, not only can the thickness of the region be close to the thickness of the conductor circuit portion, but also the solder can be formed. The resist and the surface of the insulating substrate,
Can be joined securely without involving air bubbles. Therefore,
If the printed wiring board produced by the method of the present invention is used,
It becomes possible to assemble a highly reliable semiconductor device.
【図１】製造過程にある本発明に係るプリント配線板の
一実施例を示す平面図である。FIG. 1 is a plan view showing an embodiment of a printed wiring board according to the present invention in a manufacturing process.
【図２】図１に示したプリント配線板の導体回路部周辺
領域の一部拡大平面図である。2 is a partially enlarged plan view of a region around a conductor circuit portion of the printed wiring board shown in FIG.
１ 絶縁基板 １Ａ 中央領域 １Ｂ 周辺領域 １ａ 搬送用の孔 １ｂ サイドレール部 ２ 開口 Ｌ 開口の一辺の長さ 1 Insulation board 1A central area 1B peripheral area 1a Transport hole 1b Side rail part 2 openings L Length of one side of opening
フロントページの続き (72)発明者 西村 明広 長野県上伊那郡箕輪町大字中箕輪12238 株式会社伸光製作所内 (56)参考文献 特開 平１−296690（ＪＰ，Ａ) 特開 平４−158592（ＪＰ，Ａ) 特開 平５−299786（ＪＰ，Ａ) 特開 平10−150250（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H05K 1/02 H05K 3/28 Front page continued (72) Inventor Akihiro Nishimura 12238 Nakaminowa, Minowa-cho, Kamiina-gun, Nagano Prefecture Inside Shinko Seisakusho Co., Ltd. (56) Reference JP-A-1-296690 (JP, A) JP-A-4-158592 (JP) , A) JP-A-5-299786 (JP, A) JP-A-10-150250 (JP, A) (58) Fields investigated (Int.Cl. 7 , DB name) H05K 1/02 H05K 3/28
Claims (5)
路部を取り囲んでいて一辺の長さが１００乃至３３０μ
ｍの何れかである方形をなす同じ大きさの所定の間隔を
置いて格子状に配列された多数の開口を設けた金属皮膜
で被覆された周辺領域とを有する絶縁基板と、少なくと
も前記導体回路部のバンプパッド部が露出するように前
記中央領域と周辺領域を被覆したソルダレジスト層とを
含むプリント配線板。1. A central region provided with a conductor circuit portion and the conductor circuit portion are surrounded, and one side has a length of 100 to 330 μm.
a predetermined interval of the same size that makes a square that is either m
An insulating substrate having a peripheral region covered with a metal film and provided with a large number of openings arranged in a grid pattern; and the central region and the peripheral region so that at least the bump pad portion of the conductor circuit portion is exposed. A printed wiring board including a coated solder resist layer.
っている請求項１に記載のプリント配線板。2. The printed wiring board according to claim 1, wherein the insulating substrate is made of glass epoxy resin.
又は２に記載のプリント配線板。3. The metal film is made of copper.
Or the printed wiring board according to 2.
備するステップと、前記金属皮膜を用いて前記絶縁基板
の中央領域に導体回路部を形成するステップと、前記導
体回路部を含む前記金属皮膜全体を粗面化するステップ
と、前記中央領域を取り囲む周辺領域の前記金属皮膜に
一辺の長さが１００乃至３３０μｍの何れかである方形
をなす同じ大きさの互いに所定の隔を置いて配置された
多数の開口を形成するステップと、前記中央領域と前記
周辺領域の表面全体にソルダレジスト層を形成した後所
定のマスクを用いて露光し現像するステップと、少なく
とも前記導体回路部のバンプパッド部のソルダレジスト
を除去した後前記ソルダレジスト層を硬化させるステッ
プと、露出した前記金属皮膜表面に電気メッキを施すス
テップとを含むプリント配線板の製造方法。4. A step of preparing an insulating substrate having a metal coating on one surface thereof, a step of forming a conductor circuit portion in a central region of the insulating substrate using the metal coating; and a conductor circuit portion. A step of roughening the entire metal film, and a step of applying a metal film to a peripheral region surrounding the central region.
A rectangle whose one side length is 100 to 330 μm
Of the same size and spaced apart from each other
Forming a large number of openings, forming a solder resist layer on the entire surface of the central region and the peripheral region, and then exposing and developing using a predetermined mask, and at least the bump pad portion of the conductor circuit portion. A method of manufacturing a printed wiring board, comprising: a step of curing the solder resist layer after removing the solder resist; and a step of electroplating the exposed surface of the metal film.
はサブトラクティブ法により形成される請求項４に記載
のプリント配線板の製造方法。5. The method for manufacturing a printed wiring board according to claim 4, wherein the conductor circuit portion is formed by a semi-additive method or a subtractive method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000030262A JP3458809B2 (en) | 2000-02-02 | 2000-02-02 | Printed wiring board and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000030262A JP3458809B2 (en) | 2000-02-02 | 2000-02-02 | Printed wiring board and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001217507A JP2001217507A (en) | 2001-08-10 |
| JP3458809B2 true JP3458809B2 (en) | 2003-10-20 |
Family
ID=18555300
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000030262A Expired - Fee Related JP3458809B2 (en) | 2000-02-02 | 2000-02-02 | Printed wiring board and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3458809B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200704323A (en) * | 2005-07-01 | 2007-01-16 | Lite On It Corp | Printed circuit board |
| KR101175886B1 (en) | 2010-11-25 | 2012-08-21 | 삼성전기주식회사 | printed circuit board and method for anufacturing the same |
| JP5382010B2 (en) * | 2011-01-24 | 2014-01-08 | ブラザー工業株式会社 | WIRING BOARD AND WIRING BOARD MANUFACTURING METHOD |
| WO2017152879A1 (en) * | 2016-03-11 | 2017-09-14 | 杭州华普永明光电股份有限公司 | Light emitting diode module and manufacturing method therefor, and lamp |
-
2000
- 2000-02-02 JP JP2000030262A patent/JP3458809B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2001217507A (en) | 2001-08-10 |
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