JP3436593B2 - Data communication device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data communication device suitable for data communication between a plurality of ECUs (Electronic Control Units) mounted on a vehicle.

[0002]

2. Description of the Related Art FIG. 1 is a block diagram showing an overall configuration of a data communication apparatus 1 which is a premise of the present invention. The data communication device 1 is configured to include one master terminal device M and a plurality of slave terminal devices S1 to Sn (reference numeral S is used when collectively referred to). The terminal devices M and S are connected by a communication line K. Data communication device 1
In accordance with ISO 9141 (international standard), a communication method is implemented. This communication system is a so-called master / slave system, in which request data is transmitted from the master terminal device M to a plurality of slave terminal devices S, each slave terminal device S receives the request data, and each slave terminal device S receives the request data. In this method, S transmits response data to the master terminal device M.

The slave terminal devices S1 to Sn have a predetermined priority order, and the response data is transmitted to the master terminal device M in order from the slave terminal device having the higher priority order. Here, it is assumed that the subscripts 1 to n of the reference symbol S represent the priority order. In the standby state, the terminal devices M and S lower the communication line K, which is set to a predetermined first potential (high level), to a predetermined second potential (low level) lower than the first potential. Means is provided, and bit data is created by switching these two levels at a predetermined timing, and the data is transmitted. Byte data is composed of a predetermined number of bit data, and message data is composed of a predetermined number of byte data. This message data corresponds to the request data and the response data.

In the data communication device 1 shown in FIG. 1,
After receiving the request data from the master terminal device M, each of the slave terminal devices S1 to Sn is configured to transmit the response data after a lapse of a predetermined waiting period according to each priority order. There is. It is necessary to provide a predetermined waiting period between request data and response data and between response data. Furthermore, it is necessary to provide a predetermined waiting period between the plurality of byte data forming the response data and the request data.

Whether the message data has ended or whether the byte data has ended is determined by the communication line K.
Is based on whether or not the high level continued for a certain period. The request data length and the response data length are variable, for example, the communication speed is 10.4 kbps, 20
20ms to 400m when transmitting byte data
s. The waiting period to be secured between byte data is selected in the range of 0 to 20 ms, for example. The waiting period to be secured between message data is selected in the range of 0 to 50 ms, but the waiting period between byte data is 0 to 20 ms.
From the relationship of being selected as ms, it is selected in the range of 20 ms-50 ms. Therefore, accurate measurement of these waiting periods is an important issue in timing control of data communication.

FIG. 7 is a time chart for explaining the first conventional example. As shown in FIG. 7 (1), the byte data includes a start bit and a predetermined number, for example, 8 bytes.
It consists of bit data of bits and stop bit data. The byte data is transmitted during the period W0. The transmission period of the start bit data is the period W1, the transmission period of the bit data is the period W2, and the transmission period of the stop bit data is the period W3. Some of the microcomputers included in the terminal device are provided with a reception completion flag and a receiving flag in advance. As shown in FIG. 7B, the reception completion flag is turned on when the reception of 1-byte data is completed, that is, when the stop bit data is received. The receiving flag is shown in FIG.
As shown in (3), it is set to ON during the entire reception period of 1-byte data. The terminal device measures the period during which the communication line K is at the high level, and resets the time measuring means at the timing when the reception completion flag and the receiving flag are turned on. Further, the time counting operation is not performed while the flag is on.

FIG. 8 is a circuit diagram for explaining the second conventional example. The terminal devices M and S include a control circuit 12 that executes data transmission and reception, various calculations, various controls, and the like. The control circuit 12 is realized by a microcomputer or the like, and has a serial data input terminal Sin, a serial data output terminal Sout, and a port P for input / output of various signals.
0 and P1 are provided. The terminal devices M and S include a connection terminal 3 for connecting the communication line K, and the connection terminal 3 has a serial data output terminal Sout via the output buffer 14.
The serial data input terminal Sin is connected via the and input buffer 15. The S-type flip-flop 16 is
The output of the input buffer 15 is given to the input terminal S,
The output from the port P1 of the control circuit 12 is given to the reset terminal R, and the output from the output terminal OUT is given to the port P0 of the control circuit 12. The control circuit 12 is provided with the above-mentioned reception completion flag, but is not provided with the receiving flag. Therefore, the flip-flop 16 is used to latch the input data to create the receiving flag.

[0008]

In the first conventional example, it is necessary to select, as the microcomputer incorporated in the terminal device, a microcomputer having a reception completion flag and a receiving flag, and the usable microcomputers are limited. Also, the cost may increase.

In the second conventional example, it is necessary to create the receiving flag by using the external flip-flop circuit 16 or the like, an extra external circuit is required, and the labor for connecting the external circuit is required. It takes.

An object of the present invention is to provide a data communication device capable of accurately measuring the period during which the communication line is in the standby state and accurately controlling the data transmission timing.

[0011]

According to the present invention, a main terminal device is connected to a plurality of sub-terminal devices having a priority order for determining the order of data transmission to the main terminal device by one communication line. However, the communication line is in a standby state at a predetermined first potential, and each terminal device selects the first potential and a predetermined second potential lower than that from a plurality of types of communication speeds. The data is created and transmitted by switching at a timing according to the communication speed, and each sub-terminal device responds to the request data from the main terminal device, and at least the response data in accordance with the priority is set in advance at least in advance. In a data communication device that sequentially transmits after a waiting period, the request data and the response data are each a plurality of byte data transmitted after at least a predetermined second waiting period. The byte data is composed of start bit data selected for the second potential, a predetermined number of bit data, and stop bit data selected for the first potential, and each terminal device synchronizes with the communication speed. Data detecting means for detecting byte data, a potential detecting means for detecting the potential of the communication line at a predetermined sampling interval, and a period during which the communication line is in a standby state, and the data detecting means detects the byte data. And a timing unit for stopping the timing operation after the second potential is detected by the potential detection unit, and the timing period by the timing unit exceeds a predetermined first standby period. If it is determined that the request data or the response data has ended, the byte data has ended when the predetermined second waiting period is exceeded. A data communication apparatus, characterized by determining that the. Further, the sampling interval of the potential detecting means of the present invention is changed according to the communication speed during execution. Furthermore, the terminal device of the present invention comprises a second timing means for timing a period in which the communication line is at the second potential, and when the timing period by the second timing means exceeds a predetermined reference period. It is characterized by determining that an abnormality has occurred. The predetermined reference period of the present invention is characterized in that it is selected as a reception period of byte data at the lowest communication speed of the terminal device. Further, the predetermined reference period of the present invention is characterized in that it is selected as a byte data reception period according to a communication speed during execution.

[0012]

According to the present invention, the main terminal device transmits the request data to the plurality of sub terminal devices, and each sub terminal device sequentially transmits the response data in accordance with the priority order. At least a predetermined first waiting period is secured between the request data and the response data and between the response data. The request data and the response data are composed of a plurality of byte data, and at least a predetermined second waiting period is secured between the byte data. The byte data is composed of start bit data selected for the second potential, a predetermined number of bit data, and stop bit data selected for the first potential. In the bit data, the first potential has a logical value “0” and the second potential has a logical value “1”. 1
The length of bit data is determined according to the communication speed.
The communication speed is selected from a plurality of types. The communication speed is selected, for example, by an initialization signal transmitted from the main terminal device to the sub terminal device prior to data communication. For example, in the case of 5 baud for transmitting 5-bit data in 1 sec, the length of 1-bit data is 0.2 msec.

Each terminal device measures the period during which the communication line is in the standby state (first potential) by the time measuring means. The time measuring means is reset at the end time of the byte data by the data detecting means, that is, at the timing when the stop bit data is detected, or stops the time measuring operation for a period after the second potential is detected by the potential detecting means. To do. If the communication speed is relatively high, there is no problem if the clocking means is reset at the detection timing of the stop bit data, but if the communication speed is low, the length of 1-byte data is the first predetermined value. And the second waiting period may be exceeded. That is, when all the bit data is “0” as 1-byte data, the period in which the communication line is at the first potential in the 1-byte data is
The terminal device may continue for more than the first and second waiting periods, and at this time, the terminal device may erroneously determine that the byte data has ended or that the response data or the request data has ended. There is. Therefore, each terminal device determines that the start bit data is received after detecting that the potential of the communication line is the second potential by the potential detecting means, and stops the timing operation by the timing means. As a result, the 1-byte data becomes the first and second
Even when the standby period is exceeded, the standby period can be accurately measured and the data transmission timing can be accurately controlled.

Further, preferably, the sampling interval of the potential detecting means is changed in accordance with the communication speed being executed, so that the start bit data of the byte data can be surely detected, and the timing control can be further improved. It can be done reliably.

Further, according to the present invention, it is determined that an abnormality has occurred when the period of the second potential of the communication line clocked by the second timing means exceeds a predetermined reference period. That is, the second potential is a so-called dominant level, and when this second potential is continued for a certain period, normal data transmission is not performed. Therefore, the occurrence of abnormality can be detected by detecting this state.

Preferably, the reference period is
It is selected during the receiving period of byte data at the lowest communication speed of the terminal device.

More preferably, the reference period is selected as a byte data reception period depending on the communication speed being executed.

[0018]

1 is a block diagram showing the overall construction of a data communication apparatus 1 which is the premise of the present invention. The data communication device 1 is configured to include one master terminal device M and a plurality of slave terminal devices S1 to Sn (reference numeral S is used when collectively referred to). The terminal devices M and S are connected by a communication line K. The data communication device 1 is
A communication system based on ISO9141 (International Standard) is implemented. This communication system is a so-called master / slave system, in which request data is transmitted from the master terminal device M to a plurality of slave terminal devices S, each slave terminal device S receives the request data, and each slave terminal device S receives the request data. In this method, S transmits response data to the master terminal device M.

The slave terminal devices S1 to Sn have a predetermined priority order, and the response data is transmitted to the master terminal device M in order from the slave terminal device having the higher priority order. Here, it is assumed that the subscripts 1 to n of the reference symbol S represent the priority order. In the standby state, the terminal devices M and S lower the communication line K, which is set to a predetermined first potential (high level), to a predetermined second potential (low level) lower than the first potential. Means is provided, and bit data is created by switching these two levels at a predetermined timing, and the data is transmitted. Byte data is composed of a predetermined number of bit data, and message data is composed of a predetermined number of byte data. This message data corresponds to the request data and the response data.

In the data communication device 1 shown in FIG. 1,
After receiving the request data from the master terminal device M, each of the slave terminal devices S1 to Sn is configured to transmit the response data after a lapse of a predetermined waiting period according to each priority order. There is. It is necessary to provide a predetermined first waiting period between the request data and the response data and between the response data. Further, it is necessary to provide a predetermined second waiting period between the plurality of byte data forming the response data and the request data.

FIG. 2 is a block diagram showing the configuration of each terminal device M, S. The terminal devices M and S include a control circuit 2 that executes data transmission and reception, various calculations, various controls, and the like.
including. The control circuit 2 is realized by a microcomputer or the like, and has a serial data input terminal Sin, a serial data output terminal Sout, and a port P0 for input / output of various signals.
Equipped with.

The terminal devices M and S are provided with a connection terminal 3 for connecting the communication line K, a serial data output terminal Sout is connected to the connection terminal 3 via an output buffer 4, and an input buffer 5 is also provided. Serial data input terminal Sin is connected. The output of the input buffer 5 is also given to the port P0.

The control circuit 2 receives the serial data supplied via the communication line K from the serial data input terminal Sin.
Input from, and when the stop bit data is read,
The reception completion flag F1 is turned on. Further, the control circuit 2 is
The level of the signal input to the port P0 is sampled at a predetermined sampling interval, and it is determined based on the sampling result whether data is being received. If data is being received, the receiving flag F2 is turned on.

FIG. 3 is a flow chart for explaining the basic operation executed by the control circuit 2. At step a1, the initialization operation is performed. Here, the count value Cmain of the time counter is set to 0. At step a2, 1 is added to the count value of the time counter, and the process proceeds to step a3. In step a3, it is determined whether or not the count value Cmain is equal to or larger than a constant x0 that determines the sampling cycle X. If the determination is negative, proceed to step a4,
It is determined whether or not 0.5 msec has elapsed, and when it has elapsed, the process returns to step a2 to continue the timing operation. If the determination is affirmative in step a3, the process proceeds to step a5, the count value Cmain is reset to 0, and step a6
Then, main processing described later is executed, and the process proceeds to step a4.
That is, the sampling period X of the port P0 of the control circuit 2 is 0.5 ms × x0.

FIG. 4 is a flow chart for explaining the interrupt processing of the control circuit 2. When data is input to the serial data input terminal Sin, the interrupt process starts, and at step b1, the reception completion flag F1 is turned on when the stop bit data of the received byte data is read.

FIG. 5 is a flow chart showing in detail the main process executed in step a5 of the flow chart shown in FIG. As described above, this main processing is executed every set sampling cycle X.

At step c1, 1 is added to the count value tidl of the bus idle counter. The bus idle counter is a counter that counts a period during which the communication line K is in a standby state. In step c2, the communication line K is
It is determined whether it is low level. If the determination is affirmative, the process proceeds to step c4, and if the determination is negative, the process proceeds to step c6. Whether or not the communication line K is at the low level is determined based on the level of the input signal of the port P0.

In step c4, the receiving flag F2 is turned on, and in step c5, the count value t of the receiving counter is t.
1 is added to rec. Then, the process is step c6.
Proceed to. The receiving counter is a counter that counts a period in which the communication line K is at a low level.

At step c6, it is judged whether the reception completion flag F1 is on. If the determination is affirmative, the process proceeds to step c7, and if the determination is negative, the step c1 is performed.
Go to 1. In step c7, the reception completion flag F1 is turned off, and in step c8, the count value tr of the receiving counter
ec is set to 0, and the receiving flag F is set in step c9.
2 is turned off, the count value tidl of the bus idle counter is set to 0 in step c10, and the process proceeds to step c11.

At step c11, it is determined whether the receiving flag F2 is on. If the determination is affirmative, the process proceeds to step c12, and if the determination is negative, the process is step c.
Proceed to 13. In step c12, the count value tidl of the bus idle counter is reset to 0, and the process proceeds to step c13.

At step c13, it is judged whether or not the count value trec of the receiving counter exceeds a predetermined reference period Tth. Here, it is determined by converting the count value into time as trec × X. If the determination is affirmative, the process proceeds to step c14, and if the determination is negative, the step c
Proceed to 16. At step c14, the error flag is turned on, at step c15, the flags F1 and F2 are cleared, and the routine proceeds to step c16.

At step c16, it is judged whether the initialization signal has been received. If received, the process proceeds to step c17, and if not received, the process ends. In step c17, the communication speed is set based on the initialization signal, and in step c18, the sampling cycle X is similarly set based on the initialization signal. At step c20, the reception completion flag F1 is turned on, and the process is ended. The parameter T1 is a parameter that defines the first waiting period to be ensured between the request data and the response data, or between the response data. The parameter T2 is a parameter that defines the second waiting period that should be ensured between byte data.

FIG. 6 is a time chart showing the operation of the terminal devices M and S. As shown in FIG. 6 (1), the response data is transmitted after the lapse of the parameter T1 from the end of the request data, and similarly, the response data is transmitted when the parameter T1 elapses. The response data is shown in FIG.
As shown in (2), it is composed of a plurality of byte data.
An interval corresponding to the parameter T2 is secured between each byte data. The byte data, as shown in FIG. 6 (3),
It is composed of start bit data that is always selected as the second potential, bit data of a predetermined number, for example, 8 bits, and stop bit data that is always selected as the first potential.

The operation when the communication speed is low is shown in FIG.
It is shown in (4) to (6). Reception completion flag F1
Is turned on at the timing of receiving the stop bit data, as shown in FIG. 6 (4). The receiving flag F2 is
As shown in FIG. 6 (5), the byte data is set to a high level from the start time to the end time. This is shown in Figure 6 (6).
This is because the sampling pulse is shorter than the timing of 1-bit data, as shown in, and the start bit data forming the byte data can be reliably detected. Therefore, the period from the detection of the start bit data to the detection of a predetermined number of bit data is a 1-byte data transmission period, and thus the receiving flag F2 is turned on. Whether or not it is the start bit is determined based on whether or not the standby period of the predetermined period T1 or T2 continues until the second potential is detected. In this way, the bus idle counter is reset at the timing when the flag F1 is turned on, and is always reset while the flag F2 is turned on. As a result, the timing operation is not performed. As a result, even if the byte data includes a period in which the first potential continues longer than the parameter T1 or T2, the period is not counted as the period in the standby state.

The operation when the data communication speed is high is shown in FIGS. 6 (7) to 6 (9). As shown in FIG. 6 (7), the reception completion flag F1 is always turned on at the end of the 1-byte data by the interrupt processing to the control circuit 2. As shown in FIG. 6 (9), port P
When the time interval of the sampling pulse of 0 is long and 1-byte data is included in the interval of the sampling pulse, the control circuit 2 cannot detect the start bit data even if the signal of the port P0 is detected. However, since 1-byte data is sent in a very short period of time, it is a much shorter period than the predetermined waiting periods T1 and T2. Therefore, the flag F shown in FIG.
By resetting the bus idle counter at the timing when 1 is turned on, it is possible to accurately detect that the communication line K is in the waiting period.

As described above, according to this embodiment, it is possible to reliably detect that the communication line K is in the waiting period, and it is possible to accurately control the transmission timing of the response data with respect to the request data. When the receiving counter exceeds the predetermined reference period, it is determined that an error has occurred, the operation is interrupted, and the process is ended. As a result, the communication line K is fixed to a so-called dominant level, and this prevents the data communication from being stopped.

[0037]

As described above, according to the present invention, it is possible to accurately detect the standby period in which no data is transmitted to the communication line, to accurately control the data transmission timing, and to prevent a communication error. Is prevented and the reliability of data communication is improved.

When the communication line exceeds the predetermined reference period at the so-called dominant level second potential, it is determined that a communication error has occurred, and the operation is interrupted.
By notifying that an error has occurred, the reliability of data communication is significantly improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of a data communication device 1 which is a premise of the present invention.

FIG. 2 is a block diagram showing a configuration of terminal devices M and S.

FIG. 3 is a flowchart illustrating a basic operation of a control circuit 2 included in the terminal devices M and S.

FIG. 4 is a flowchart illustrating an interrupt process performed by a control circuit 2.

5 is a flowchart illustrating a process performed by the control circuit 12 in step a5 of FIG.

FIG. 6 is a time chart illustrating a communication operation of the data communication device 1.

FIG. 7 is a time chart for explaining a first conventional example.

FIG. 8 is a block diagram for explaining a second conventional example.

[Explanation of symbols]

1 Data communication device 2 control circuit 3 connection terminals 4 output buffer 5 input buffer K communication line M master terminal device S slave terminal device Sin Serial data input terminal Sout Serial data output terminal P0 port T1, T2 timing parameters F1 and F2 flags X sampling period tidl Bus idle counter count value trec Count value of receiving counter

Claims (5)

(57) [Claims] 1. A main terminal device and a plurality of sub-terminal devices, which have a predetermined priority order for determining the order of data transmission to the main terminal device, are connected by one communication line, and the communication line is predetermined. The first potential is in a standby state, and each terminal device sets the first potential and a predetermined second potential lower than the first potential at a timing corresponding to a communication speed selected from a plurality of types of communication speeds. Data is created and transmitted by switching, and each sub-terminal device responds to the request data from the main terminal device and sequentially transmits response data in accordance with the priority order at least with a predetermined first waiting period. In the data communication device, the request data and the response data each include at least a plurality of byte data transmitted with a predetermined second waiting period, the byte data , Start bit data selected for the second potential, a predetermined number of bit data, and stop bit data selected for the first potential. Each terminal device detects byte data in synchronization with the communication speed. Data detecting means, a potential detecting means for detecting the potential of the communication line at a predetermined sampling interval, and a period during which the communication line is in a standby state, and is reset at the byte data detection end timing by the data detecting means. A time measuring means for stopping the time measuring operation after the second electric potential is detected by the electric potential detecting means, and when the time measuring period by the time measuring means exceeds a predetermined first waiting period, request data or It is judged that the response data has ended, and that the byte data has ended when the predetermined second waiting period is exceeded. Characteristic data communication device. 2. The data communication apparatus according to claim 1, wherein the sampling interval of the potential detecting means is changed according to the communication speed during execution. 3. The terminal device comprises second timing means for timing a period in which the communication line is at a second potential, and when the timing period by the second timing means exceeds a predetermined reference period. The data communication device according to claim 1, wherein it is determined that an abnormality has occurred. 4. The data communication device according to claim 3, wherein the predetermined reference period is selected as a reception period of byte data at the lowest communication speed of the terminal device. 5. The data communication device according to claim 3, wherein the predetermined reference period is selected as a byte data reception period according to a communication speed during execution.