CN117573586A - Single-wire communication method, device and system - Google Patents

Single-wire communication method, device and system Download PDF

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Publication number
CN117573586A
CN117573586A CN202311515619.1A CN202311515619A CN117573586A CN 117573586 A CN117573586 A CN 117573586A CN 202311515619 A CN202311515619 A CN 202311515619A CN 117573586 A CN117573586 A CN 117573586A
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Prior art keywords
master device
slave device
bit
communication
slave
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杨晓雯
吴飞虎
周鹏
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Hangzhou Shenlian Microelectronics Technology Co ltd
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Hangzhou Shenlian Microelectronics Technology Co ltd
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Priority to CN202311515619.1A priority Critical patent/CN117573586A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The application discloses a method, a device and a system for single-wire communication, wherein the method comprises the steps that after a master device confirms that a clock of a slave device is stable, the master device enters an initialization mode; the master device transmits an initialization timing to the slave device, and then releases the bus so that the slave device transmits a low level of a preset width to the master device; the master device starts counting after the slave device pulls down the bus, and stops counting after the slave device releases the bus to obtain a period count value; the master device determines the relationship between the clock frequencies of the master device and the slave device according to the period count value; after the initialization mode is finished, the active mode is automatically entered, and the master device and the slave device carry out single-wire communication according to the corresponding coding modes and the format of the communication frame. The problem that the communication efficiency between chip and the chip is influenced to current single line communication mode is solved to this application.

Description

Single-wire communication method, device and system
Technical Field
The present application relates to the field of data communications technologies, and in particular, to a method, an apparatus, and a system for single-wire communications.
Background
Single bus communication is a common way of near field single line communication between chips, is a peripheral serial expansion bus technology proposed by the company DALLAS in the united states, and is different from an SPI and I2C serial data communication way, and adopts a single signal line, so that data transmission is bidirectional. Using single bus traffic The data communication in the communication mode must strictly adhere to the communication protocol of a single bus, when data is sent or read, the transmission initiation of each bit is initiated by the main device, and different delay parameters need to be set for the communication time sequence. For example, as shown in FIG. 1, an initialization timing diagram corresponding to a single BUS (1-WIRE BUS) is shown. Wherein the Master device (Master) first transmits (Tx) a low level exceeding A1 μs, A1>480. Then wait for A2 μs,15<A2<60; the slave (DS 18B 20) responds by sending a low level of 60-240 μs and then releasing the bus; at this time the master is in the receive (Rx) state, sampling at time A3, 60<A3<240, a step of; ending the initialization time sequence after waiting for A4 mu s, A4>240. FIG. 2 shows corresponding write and read timing diagrams for a single BUS (1-WIRE BUS). Wherein the WRITE timings are divided into WRITE 1 timing (WRITE "1" slot) and WRITE 0 timing (WRITE "0" slot), all of which must last for a minimum of 60 μs, including a recovery time (T) of X1 μs between two WRITE cycles REC ),X1>1. Wherein, write 1 timing is: master pull-down bus X2 mus, 1<X2<15, then releasing the bus; the write 0 timing is: the master pulls down the bus X3 mus, X3>60 and then releases the bus. All read timings are at least 60 μs, and the recovery time between two read cycles is X4 μs, X4 >1. Specifically, the read timing is: the master pulls down the bus X5 mus, X5>1, then release the bus, sample at a time X6 μs, 10<X6<15 wait for X7 μs, X7>45. From the analysis, the primary device needs to set 4 parameters (A1-A4) when implementing initialization time sequence, the primary device needs to set 7 parameters (X1-X7) when implementing read-write time sequence, and the total of 11 parameters is complicated and unstable in parameter adjustment, which easily causes inaccurate time delay, and if the time delay is inaccurate, the situation that both the primary and secondary parties occupy buses at the same time to perform data transmission can occur, so that data communication is abnormal, and the data communication cannot be recovered after the abnormality occurs.
In summary, the existing single bus communication method has the problems of unstable communication, easy communication abnormality and abnormal failure recovery, and the problems greatly affect the communication efficiency between chips.
Disclosure of Invention
The main purpose of the application is to provide a method, a device and a system for single-wire communication, which solve the problem that the existing single-wire communication mode affects the communication efficiency between chips.
To achieve the above object, according to a first aspect of the present application, there is provided a method of single-wire communication.
The method for single-wire communication according to the application comprises the following steps: after the master device confirms that the internal clock of the slave device is stable, entering an initialization mode; the master device sends an initialization time sequence to the slave device, and releases a bus after the completion of the sending, so that the slave device sends a low level with a preset width to the master device; the master device detects whether the slave device pulls down a bus; if the bus is pulled down, the master device starts counting by taking the clock cycle of the master device as a unit; after the slave device releases the bus, the master device stops counting to obtain a period count value; the master device calculates the ratio of the clock frequency of the master device to the clock frequency of the slave device according to the period count value and the preset width, and the initialization mode is ended and the active mode is entered; the master device determines the coding mode of the master device according to the ratio and a preset single-wire communication coding mode, wherein the preset single-wire communication coding mode uses the clock period of the slave device as 1 counting unit; the master device and the slave device perform single-wire communication according to the respective corresponding coding modes and the format of the communication frame, and the coding mode of the slave device is the preset single-wire communication coding mode.
Optionally, the format of the communication frame is that one communication frame includes 22 codes, one code corresponds to 1 bit, and the 22 codes are in turn: the master device sends 1-bit initial bit, the slave device replies 1-bit response bit, the master device sends 7-bit address bits, the master device sends 1-bit read-write indicating bit, the master device sends 1-bit first even check bit, the slave device replies 1-bit first response bit for check, the master device sends 8-bit data bit, the master device sends 1-bit second even check bit, and the slave device replies 1-bit second response bit for check.
Optionally, the single-wire communication between the master device and the slave device according to the respective corresponding coding modes and according to the format of the communication frame further includes: in the single-wire communication process, the main equipment judges whether communication abnormality occurs or not; and if communication abnormality occurs, the master device sends a reset time sequence to the slave device so as to reset the slave device.
Optionally, the determining, by the master device, whether the communication abnormality occurs includes: if the number of times of the continuous occurrence of the first response bit or the second response bit, which indicates that the verification fails, exceeds the preset number of times, determining that communication abnormality occurs; and if the first response bit and the second response bit both indicate that the verification is passed, determining that no communication abnormality occurs.
To achieve the above object, according to a second aspect of the present application, there is provided another method of single-wire communication.
The method for single-wire communication according to the application comprises the following steps: after the master device confirms that the internal clock of the slave device is stable and enters an initialization mode, the slave device receives an initialization time sequence sent by the master device; after the initialization time sequence is received, the slave device detects whether the bus is released by the master device; if the slave device is released, the slave device sends a low level with a preset width to the master device, so that the master device starts counting by taking a clock cycle of the slave device as a unit after detecting that the slave device pulls down a bus; after low-level transmission with preset width is completed, the slave device releases the bus so that the master device stops counting after the slave device releases the bus to obtain a period count value, and the ratio of the clock frequency of the master device to the clock frequency of the slave device is calculated according to the period count value and the preset width; the slave device enters an active mode after releasing the bus, the slave device and the master device perform single-wire communication according to respective corresponding coding modes and according to a format of a communication frame, the coding mode of the master device is determined by the master device according to the ratio and a preset single-wire communication coding mode, the preset single-wire communication coding mode is 1 counting unit in terms of clock cycle of the slave device, and the coding mode of the slave device is the preset single-wire communication coding mode.
Optionally, the format of the communication frame is that one communication frame includes 22 codes, one code corresponds to 1 bit, and the 22 codes are in turn: the master device sends 1-bit initial bit, the slave device replies 1-bit response bit, the master device sends 7-bit address bits, the master device sends 1-bit read-write indicating bit, the master device sends 1-bit first even check bit, the slave device replies 1-bit first response bit for check, the master device sends 8-bit data bit, the master device sends 1-bit second even check bit, and the slave device replies 1-bit second response bit for check.
Optionally, the single-wire communication between the slave device and the master device according to the respective corresponding coding modes and according to the format of the communication frame further includes: in the communication process, the slave device judges whether a reset time sequence is received or not, and the reset time sequence is sent after the master device judges that communication abnormality occurs; and if the reset time sequence is received, the slave device resets according to the reset time sequence.
To achieve the above object, according to a third aspect of the present application, there is provided a device for single-wire communication.
The device for single-wire communication according to the application comprises: a confirmation unit, configured to enter an initialization mode after the master device confirms that the internal clock of the slave device is stable; a first transmitting unit, configured to transmit an initialization timing sequence to the slave device by using the master device, and release a bus after transmission is completed, so that the slave device transmits a low level with a preset width to the master device; the first detection unit is used for detecting whether the slave device pulls down a bus or not by the master device; the counting unit is used for starting counting by taking the clock cycle of the master equipment as a unit if the bus is pulled down; the stopping unit is used for stopping counting by the master device after the slave device releases the bus to obtain a period count value; the calculating unit is used for calculating the ratio of the clock frequency of the master device to the clock frequency of the slave device according to the period count value and the preset width, ending the initialization mode and entering an active mode; the determining unit is used for determining the encoding mode of the master equipment according to the ratio and a preset single-wire communication encoding mode, wherein the preset single-wire communication encoding mode uses the clock period of the slave equipment as 1 counting unit; the first communication unit is used for carrying out single-wire communication on the master equipment and the slave equipment according to the respective corresponding coding modes and the format of the communication frame, and the coding mode of the slave equipment is the preset single-wire communication coding mode.
Optionally, the format of the communication frame is that one communication frame includes 22 codes, one code corresponds to 1 bit, and the 22 codes are in turn: the master device sends 1-bit initial bit, the slave device replies 1-bit response bit, the master device sends 7-bit address bits, the master device sends 1-bit read-write indicating bit, the master device sends 1-bit first even check bit, the slave device replies 1-bit first response bit for check, the master device sends 8-bit data bit, the master device sends 1-bit second even check bit, and the slave device replies 1-bit second response bit for check.
Optionally, the first communication unit further includes: the first judging module is used for judging whether communication abnormality occurs in the process of single-wire communication or not by the main equipment; and the sending module is used for sending a reset time sequence to the slave equipment by the master equipment if communication abnormality occurs so as to reset the slave equipment.
Optionally, the first judging module is configured to: if the number of times of the continuous occurrence of the first response bit or the second response bit, which indicates that the verification fails, exceeds the preset number of times, determining that communication abnormality occurs; and if the first response bit and the second response bit both indicate that the verification is passed, determining that no communication abnormality occurs.
To achieve the above object, according to a fourth aspect of the present application, there is provided another single-wire communication apparatus.
The device for single-wire communication according to the application comprises: a receiving unit, configured to receive, from a slave device, an initialization timing sequence sent by a master device; the second detection unit is used for detecting whether the bus is released by the master device or not by the slave device after the initialization time sequence is received; the second sending unit is used for sending a low level with a preset width to the master device by the slave device if the bus is released by the master device, so that the master device starts counting by taking a clock cycle of the slave device as a unit after detecting that the slave device pulls down the bus; the release unit is used for releasing the bus by the slave device after the low-level transmission with the preset width is completed, so that the master device stops counting after the slave device releases the bus to obtain a period count value, and calculating the ratio of the clock frequency of the master device to the clock frequency of the slave device according to the period count value and the preset width; the second communication unit is used for enabling the slave device to enter an active mode after the slave device releases the bus, the slave device and the master device perform single-wire communication according to respective corresponding coding modes and according to a communication frame format, the coding mode of the master device is determined by the master device according to the ratio and a preset single-wire communication coding mode, the preset single-wire communication coding mode is 1 counting unit in terms of clock cycle of the slave device, and the coding mode of the slave device is the preset single-wire communication coding mode.
Optionally, the format of the communication frame is that one communication frame includes 22 codes, one code corresponds to 1 bit, and the 22 codes are in turn: the master device sends 1-bit initial bit, the slave device replies 1-bit response bit, the master device sends 7-bit address bits, the master device sends 1-bit read-write indicating bit, the master device sends 1-bit first even check bit, the slave device replies 1-bit first response bit for check, the master device sends 8-bit data bit, the master device sends 1-bit second even check bit, and the slave device replies 1-bit second response bit for check.
Optionally, the second communication unit further includes: the second judging module is used for judging whether the slave equipment receives a reset time sequence or not in the communication process, wherein the reset time sequence is sent after the master equipment judges that communication abnormality occurs; and the reset module is used for resetting the slave equipment according to the reset time sequence if the reset time sequence is received.
In order to achieve the above object, according to a fifth aspect of the present application, there is provided a single-wire communication system, the system including a master device, a slave device, the master device and the slave device being connected by a bus and being connected in an open-drain output manner, wherein the master device is configured to perform the method of single-wire communication according to any one of the foregoing first aspects; the slave device is configured to perform the method for single-wire communication according to any one of the foregoing second aspects.
In the method, the device and the system for single-wire communication in the embodiment of the application, the master device and the slave device are initialized before communication, the master device sends an initialization time sequence in the initialization process, and the clock frequency of the slave device is accurately determined in a counting mode according to the low level of the preset width returned after the slave device is initialized; and then the master equipment can accurately encode according to the frequency ratio of the master clock and the slave clock in the single-wire communication of the master equipment and the slave equipment, compared with the existing single-bus communication mode, different delay parameters are not required to be set in the whole process, and the problems that the delay is inaccurate, communication abnormality occurs and communication efficiency is influenced due to complex parameters can be effectively avoided.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, are included to provide a further understanding of the application and to provide a further understanding of the application with regard to the other features, objects and advantages of the application. The drawings of the illustrative embodiments of the present application and their descriptions are for the purpose of illustrating the present application and are not to be construed as unduly limiting the present application. In the drawings:
FIG. 1 is a prior art initialization timing diagram for a single bus;
FIG. 2 is a diagram of write and read timing corresponding to a single bus in the prior art;
FIG. 3 is a flow chart of a method of single wire communication provided in accordance with an embodiment of the present application;
FIG. 4 is a schematic diagram of a connection manner of a master device and a slave device according to an embodiment of the present application;
fig. 5 is an initialization timing chart corresponding to an initialization mode in a single-wire communication method according to an embodiment of the present application;
fig. 6 is a schematic diagram of a preset single-wire communication coding mode in a single-wire communication method according to an embodiment of the present application;
FIG. 7 is a schematic diagram of a write communication frame and a read communication frame in a single-wire communication method according to an embodiment of the present application;
fig. 8 is a schematic diagram of a reset timing sequence in a single-wire communication method according to an embodiment of the present application;
FIG. 9 is a flow chart of another method of single wire communication provided in accordance with an embodiment of the present application;
FIG. 10 is a flow chart of a method of single wire communication according to yet another embodiment of the present application;
FIG. 11 is a flow chart of a method of still another single wire communication provided in accordance with an embodiment of the present application;
FIG. 12 is a block diagram of a single wire communication device according to an embodiment of the present application;
fig. 13 is a block diagram of another single wire communication device according to an embodiment of the present application.
Detailed Description
In order to make the present application solution better understood by those skilled in the art, the following description will be made in detail and with reference to the accompanying drawings in the embodiments of the present application, it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, shall fall within the scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate in order to describe the embodiments of the present application described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be combined with each other. The present application will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
According to an embodiment of the present application, there is provided a method for single-wire communication, which is applied to a master device, as shown in fig. 3, and includes the following steps S101 to S108: s101, after the master device confirms that the internal clock of the slave device is stable, entering an initialization mode; s102, the master device sends an initialization time sequence to the slave device, and releases the bus after the completion of the sending; s103, the master device detects whether the slave device pulls down the bus; if the bus is pulled down, S104 is executed, the master device starts counting by taking the clock cycle of the master device as a unit; s105, after the slave device releases the bus, the master device stops counting to obtain a period count value; s106, the master device calculates the ratio of the clock frequency of the master device to the clock frequency of the slave device according to the period count value and the preset width, and the initialization mode is ended and the active mode is entered; s107, the main equipment determines the coding mode of the main equipment according to the ratio and a preset single-wire communication coding mode; s108, the master device and the slave device carry out single-wire communication according to the corresponding coding modes and the format of the communication frame. The coding mode of the slave equipment is a preset single-wire communication coding mode.
In step S101, before entering the initialization mode, the master device needs to confirm whether the internal clock of the slave device is stable, and if not, needs to wait for the clock to be stable and then enter the initialization mode. In the initialization mode, the master needs to accurately determine the clock frequency of the slave, and thus needs to ensure that the clock of the slave has stabilized before entering the initialization mode.
Steps S102 to S106 all belong to the phase of the initialization mode, and the initialization mode is mainly used for enabling the master device to initialize the single-wire communication function of the slave device, and enabling the master device to confirm the clock relationship between the master device and the slave device.
Specifically, in step S102, the master device transmits an initialization sequence to the slave device, and releases the bus after the transmission is completed. Illustratively, the initialization sequence may be to send a low level of 128 μs first, a high level of 32 μs second, a low level of 96 μs second, a high level of 64 μs second, and a low level of 64 μs second. The specific form of the initialization sequence in the embodiments of the present application is not fixed, and may be flexibly adjusted according to the rated clock frequency of the slave device that communicates with the master device (where the rated clock frequency is to distinguish from the actually detected clock frequency). After the initialization timing transmission is completed, the master device releases the bus, so that the slave device transmits a low level with a preset width to the master device. Specifically, the slave device, upon detecting that the master device releases the bus, is ready to send a low level of a preset width, specifically, a low level of an internal clock length of the preset width (internal clock of the slave device) to the master device. During the low level transmission, the bus is pulled low. For example, the value of the preset width may be 256. In practical applications, the value of the preset width is not fixed either, and flexible adjustment can be performed according to the rated clock frequency of the slave device communicating with the master device. It should be further noted that, in the embodiment of the present application, the connection manner of the master device and the slave device is as shown in fig. 4: the master device and the slave device are connected through a bus, and an output interface is opened and leaked, and the interface is connected with a pull-up resistor R, so that the bus can always keep a high-level state under the condition that the master device and the slave device do not drive the bus. Thus, after the master releases the bus, the bus is in a high state and is pulled low when the slave sends a low.
In step S103, the master device detects whether the slave device pulls down the bus in order to determine when the slave device starts transmitting a low level of a preset width. In practical applications, the slave device does not immediately transmit a low level of a preset width after releasing the bus, but has a waiting period, which is a period in which the slave device receives an initialization timing of the master device and is ready to transmit a low level, and which is determined by the performance of the slave device itself. Therefore, after the master device releases the bus, it is required to continuously detect whether the slave device pulls down the bus, so as to determine the start time of the slave device transmitting the low level.
For example, fig. 5 is an initialization timing diagram corresponding to an initialization mode provided in the embodiment of the present application, where a master device sends a low level of 128 μs, a high level of 32 μs, a low level of 96 μs, a high level of 64 μs, and a low level of 64 μs; then a wait period (wait slave) followed by a low level of 256 internal clock lengths sent from the device.
If the detection result of step S103 is yes, step S104 is executed. In step S104, the master device starts counting in units of its own clock cycle, specifically, the master device counts at the start of the slave device transmitting the low level according to its own clock cycle, and after the slave device releases the bus according to step S105, the master device stops counting to determine how many cycles the slave device transmits the low level is equivalent to, that is, determine the cycle count value. If the detection result in step S103 is no, the release of the bus is continuously maintained, and whether the slave device pulls down the bus is continuously detected.
In step S106, the ratio M of the clock frequency of the master device to the clock frequency of the slave device is calculated according to the following formula:
m=cycle count/preset width
In step S107, the preset single-wire communication coding scheme is a coding scheme in which the clock cycle of the slave device is 1 count unit, and bits "1" and "0" are specifically set. Fig. 6 is a schematic diagram illustrating a preset single-wire communication coding scheme, where the coding of the bit "1" is: a low level of 5 periods followed by a high level of 9 periods; the encoding of bit "0" is: 10 cycles of low level followed by 4 cycles of high level. The coding mode only needs to detect the level in the 7 th, 8 th and 9 th periods to judge: if more than two low levels occur, a bit "0" is received; if more than two high levels occur, a bit "1" is received. Corresponding to the coding mode in FIG. 6, the clock frequency of the slave device is assumed to be in the range of 500KHz to 2MHz, and when the clock frequency of the slave device is 500KHz, the communication rate under the coding is about 35Kbit/s; the communication rate under this code is about 142Kbit/s when the slave clock frequency is 2 MHz. It can be seen that the communication rate of the single-wire communication mode in the embodiment of the application is related to the clock frequency of the slave device, and the communication rate can be adjusted by adjusting the clock frequency of the slave device. Compared with the existing single bus communication mode, the method is more flexible.
The principle that the main equipment determines the coding mode of the main equipment according to the ratio and the preset single-wire communication coding mode is as follows: the master device sends low level of M clocks which is equal to low level of 1 period in a preset single-wire communication coding mode; similarly, the master device sends M clocks with high level equal to 1 period in the preset single-wire communication coding mode. For example, the encoding modes of the master device corresponding to the preset single-wire communication encoding modes in fig. 6 are: with the clock period of the master device being 1 count unit, the encoding of bit "1" is: a low level of 5×m cycles, followed by a high level of 9×m cycles; the encoding of bit "0" is: 10×m cycles of low level followed by 4×m cycles of high level.
From the above description, it can be seen that the embodiment of the present application can enable the master device to encode through a simple counter, and control is relatively simple.
The specific format of the communication frame in step S108 is: one communication frame contains 22 codes, one code corresponds to 1 bit, and the 22 codes are in turn: the method comprises the steps of 1 bit starting bit sent by a master device, 1 bit response bit returned by a slave device, 7 bit address bits sent by the master device, 1 bit read-write indicating bit sent by the master device, 1 bit first even check bit sent by the master device, 1 bit first response bit returned to check by the slave device, 8 bit data bit sent by the master device, 1 bit second even check bit sent by the master device and 1 bit second response bit returned to check by the slave device. Wherein each communication frame is started by the master device transmitting a start bit of "0", and the slave device replies with a "0" indicating that the slave device is ready. If the slave does not reply, it is representative that the slave has not been initialized. The 7-bit address bit represents an address that the master wants to access, the read/write indication bit "0" represents a master write, and "1" represents a master read. The first response bit and the second response bit are both obtained by comparing the received check code with the check code calculated internally by the slave device, and if the check code is consistent with the check code, the response bit is '0', the check is passed, and if the check code is inconsistent with the check code, the response bit is '1', the check is failed. According to the format of the communication frame in the embodiment of the application, even verification can be performed on every 8-bit data, so that the communication accuracy is improved.
The single-wire communication between the master device and the slave device according to the respective corresponding coding modes and the format of the communication frame is specifically as follows: in the active mode, the master device communicates with the slave device in units of communication frames, and the start of each frame is initiated by the master device. Specifically, the communication frames include a write communication frame and a read communication frame, and a schematic diagram of the write communication frame and the read communication frame is shown in fig. 7. Wherein one write communication frame (DAT (wr)) includes:
a) The master device sends a start bit of "0";
b) Replying a response bit of "0" from the device;
c) The master device sends 7-bit address add [6:0], and the lowest bit is sent first; then, a read-write bit (corresponding to the read-write indication bit in the foregoing) is sent, and a "0" is sent to represent writing;
d) The master device transmits even parity bits PAR (corresponding to the first even parity bit in the foregoing);
e) The slave device replies a check response bit ACK (corresponding to the first response bit in the foregoing), the check passes the reply of "0", and the check does not pass the reply of "1";
f) If the reply bit of the slave device is '0', the master device continues to send 8-bit data [7:0], and the lowest bit is sent first; if the reply response bit of the slave device is 1, the master device needs to end the communication;
g) The master device transmits even parity bits PAR (corresponding to the second even parity bits in the foregoing);
h) The slave replies a check reply bit ACK (corresponding to the second reply bit in the foregoing), the check passes the reply of "0", and the check does not pass the reply of "1".
A read communication frame (DAT (rd)) includes:
a) The master device sends a start bit of "0";
b) Replying a response bit of "0" from the device;
c) The master device sends 7-bit address add [6:0], and the lowest bit is sent first; then, sending a read-write bit, and sending a 1 to represent reading;
d) The master device transmits even parity bits PAR (corresponding to the first even parity bit in the foregoing);
e) The slave device replies a check response bit ACK (corresponding to the first response bit in the foregoing), the check passes the reply of "0", and the check does not pass the reply of "1";
f) Waiting for the slave to prepare the data that the master needs to read (corresponding to wait read finish in FIG. 7), and then sending 8 bits of data [7:0], the lowest order first;
g) Transmitting an even parity bit PAR (corresponding to the second even parity bit in the foregoing) from the device;
h) The master replies a check reply bit ACK (corresponding to the second reply bit in the foregoing), the check passes the reply of "0", and the check does not pass the reply of "1".
From the above description, it can be seen that in the method for single-wire communication according to the embodiment of the present application, the master device and the slave device are initialized before communication, and the master device sends an initialization timing sequence during the initialization process to initialize the slave device, and accurately determines the clock frequency of the slave device by counting according to the low level of the preset width sent by the slave device; and then the master equipment can accurately encode according to the frequency ratio of the master clock and the slave clock in the single-wire communication of the master equipment and the slave equipment, compared with the existing single-bus communication mode, different delay parameters are not required to be set in the whole process, and the problems that the delay is inaccurate, communication abnormality occurs and communication efficiency is influenced due to complex parameters can be effectively avoided. And the check bit is set in the format of the communication frame, so that the communication accuracy can be better ensured.
In order to further improve efficiency of single-wire communication, the embodiment of the application further includes: in the single-wire communication process, the main equipment judges whether communication abnormality occurs or not; if communication abnormality occurs, the master device sends a reset time sequence to the slave device so as to reset the slave device. That is, in the single-wire communication method of the embodiment of the present application, there is an abnormal recovery mechanism, and after the occurrence of a communication abnormality, the master device may reset the slave device by sending a recovery command, so that the communication is re-performed after re-initialization. By way of example, fig. 8 shows a schematic diagram of a reset sequence, which may specifically be a low level of 256 mus. In practical applications, the specific form of the reset timing may also be flexibly adjusted, which is not limited herein. DAT (NACK) in fig. 7 indicates that the first response bit is "1", in this case, NACK is used to indicate that the communication is abnormal, and after reinitialization, the communication is performed again. It should be noted that, after the normal communication is ended, a reset timing is also sent to the slave device to end the communication.
Further, the master device determining whether the communication abnormality occurs includes: if the number of times of the continuous occurrence of the first response bit or the second response bit, which indicates that the verification fails, exceeds the preset number of times, determining that communication abnormality occurs; and if the first response bit and the second response bit both indicate that the verification passes, determining that the communication abnormality does not occur. Wherein the preset times are determined by the master device.
In order to further improve the stability of communication, an analog filter can be arranged in the main equipment to filter nanosecond burrs on a single line, so that the stability of communication is improved.
Further, as shown in fig. 9, there is also provided a flowchart of a method applied to single-wire communication on the master device side, including the steps of: starting, judging whether the clock of the slave device is stable, entering an initialization mode if the clock of the slave device is stable, waking up the clock of the slave device by the master device if the clock is unstable, judging whether the clock is stable, waiting until the clock of the slave device is stable, entering the initialization mode (corresponding to step S101), transmitting an initialization time sequence by the master device (corresponding to step S102), judging whether the initialization time sequence is transmitted completely, and continuing transmitting the initialization time sequence if the initialization time sequence is not completed; if so, the master device releases the bus, detects whether the slave device pulls down the bus (corresponding to step S103), and if not, continues to maintain the state of releasing the bus; if yes, the master counts (corresponding to step S104) → detects whether the slave releases the bus→ if not, the count is continued; if yes, the master device stops counting (corresponding to step S105), exits the initialization mode, enters the active mode, and communicates with the master device, wherein 1 communication frame is 1 communication (corresponding to step S108), judges whether the communication is abnormal (corresponding to the process of single-wire communication, the master device judges whether the communication is abnormal) or needs to be ended, and if not, continues to communicate; if so, the master transmits a reset timing, and restarts (corresponding to "master transmits a reset timing to the slave to reset the slave").
According to an embodiment of the present application, there is provided a method of single-wire communication, which is applied to a slave device, as shown in fig. 10, and includes the following steps S201 to S205: s201, after the master device confirms that the internal clock of the slave device is stable and enters an initialization mode, the slave device receives an initialization time sequence sent by the master device; s202, after the initialization time sequence is received, the slave device detects whether the bus is released by the master device; if the low level is released, S203 is executed, and the slave device sends a low level with a preset width to the master device; s204, after low-level transmission with preset width is completed, releasing the bus from the equipment; s205, the slave device enters an active mode after releasing the bus, and the slave device and the master device carry out single-wire communication according to the corresponding coding modes and the format of the communication frame.
First, it should be noted that the single-wire communication method in this embodiment is identical to the single-wire communication method in fig. 3-9, except that fig. 3 is described with the master device as the execution subject, and fig. 10 is described with the slave device as the execution subject. The relevant implementation of the single wire communication method of fig. 10 can therefore be referred to the corresponding descriptions of fig. 3-9.
Specifically, after the master device confirms that the internal clock of the slave device is stable, and enters the initialization mode, the slave device receives the initialization timing sequence sent by the master device, and the description of the specific initialization timing sequence may be referred to the corresponding descriptions in the embodiments of fig. 3-9, which are not repeated herein. After the initialization timing is received, the slave device needs to detect whether the bus is released by the master device, and if so, the slave device can send a low level with a preset width to the master device. Specifically, for a description of the low level of the preset width, reference may be made to the corresponding descriptions in the embodiments of fig. 3 to 9, which are not repeated here. The master starts counting in units of its own clock cycles after detecting that the slave pulls down the bus. The slave device releases the bus after completing low-level transmission with a preset width, so that the master device stops counting after the slave device releases the bus to obtain a period count value, and the ratio of the clock frequency of the master device to the clock frequency of the slave device is calculated according to the period count value and the preset width. And the main equipment determines the coding mode of the main equipment according to the ratio and a preset single-wire communication coding mode. Specifically, the ratio calculation, the preset single-wire communication coding mode, and the determination of the coding mode of the master device may be described in the embodiments of fig. 3 to 9, which are not repeated here. In addition, the coding mode of the slave equipment is a preset single-wire communication coding mode. After the coding modes of the master device and the slave device are determined, the slave device and the master device carry out single-wire communication according to the corresponding coding modes and the format of the communication frame. The format of the specific communication frame can be referred to in the embodiments of fig. 3-9, and will not be described herein.
In addition, in order to improve the communication efficiency, the slave device and the master device perform single-wire communication according to the respective corresponding coding modes and according to the format of the communication frame, and further include: in the communication process, the slave device judges whether a reset time sequence is received, wherein the reset time sequence is sent after the master device judges that communication abnormality occurs; and if the reset time sequence is received, the slave device resets according to the reset time sequence. The determination of communication abnormality, the reset timing and the description of the reset can be referred to the corresponding descriptions in the embodiments of fig. 3-9, and will not be repeated here.
From the above description, it can be seen that, in the method for single-wire communication according to the embodiment of the present application, the slave device and the master device are initialized before communication, and the master device transmits an initialization timing sequence during the initialization process to initialize the slave device, and accurately determines the clock frequency of the slave device by counting according to the low level of the preset width transmitted by the slave device; and then the master equipment can accurately encode according to the frequency ratio of the master clock and the slave clock in the single-wire communication of the master equipment and the slave equipment, compared with the existing single-bus communication mode, different delay parameters are not required to be set in the whole process, and the problems that the delay is inaccurate, communication abnormality occurs and communication efficiency is influenced due to complex parameters can be effectively avoided. And the check bit is set in the format of the communication frame, so that the communication accuracy can be better ensured.
Further, as shown in fig. 11, there is also provided a flowchart of a method applied to single-wire communication from the device side, including the steps of: start- > enter initialization mode (corresponding to step S201) → receive initialization timing from device (corresponding to step S201) → determine whether the initialization timing is received complete- > if not, continue to receive initialization timing; if so, waiting for the master to release the bus, judging whether the bus is released (corresponding to step S202), and if not, continuing to keep the state of waiting for the master to release the bus; if yes, the slave device sends a clock low level with a preset width (corresponding to step S203), releases a bus from the slave device (corresponding to step S204), exits an initialization mode, enters an active mode, and communicates with the master device, wherein 1 communication frame is 1 communication (corresponding to step S205), judges whether a reset time sequence is received (corresponding to the slave device judging whether the reset time sequence is received), and if not, continues to communicate; if so, it is restarted (corresponding to "slave device reset according to reset timing").
It should be noted that the steps illustrated in the flowcharts of the figures may be performed in a computer system such as a set of computer executable instructions, and that although a logical order is illustrated in the flowcharts, in some cases the steps illustrated or described may be performed in an order other than that illustrated herein.
There is further provided, according to an embodiment of the present application, an apparatus 200 for single-wire communication for implementing the method of fig. 3 to 9, as shown in fig. 12, where the apparatus is located on a master device side, and the apparatus includes: a confirmation unit 21 for the master device to enter an initialization mode after confirming that the internal clock of the slave device is stable; a first transmitting unit 22 for the master device to transmit an initialization timing to the slave device and to release the bus after the transmission is completed, so that the slave device transmits a low level of a preset width to the master device; a first detecting unit 23, configured to detect, by the master device, whether the slave device pulls down the bus; a counting unit 24, configured to start counting in units of self clock cycles if the bus is pulled down; a stopping unit 25, configured to stop counting by the master device after the slave device releases the bus, and obtain a cycle count value; a calculating unit 26, configured to calculate, by the master device, a ratio of a clock frequency of the master device to a clock frequency of the slave device according to the period count value and the preset width, end the initialization mode, and enter an active mode; a determining unit 27, configured to determine, by the master device, an encoding mode of the master device according to the ratio and a preset single-wire communication encoding mode, where the preset single-wire communication encoding mode uses a clock period of the slave device as 1 count unit; the first communication unit 28 is configured to perform single-wire communication according to the respective corresponding coding modes and according to the format of the communication frame, where the coding mode of the slave device is a preset single-wire communication coding mode.
Specifically, the specific process of implementing the functions of each unit and module in the apparatus of the embodiment of the present application may refer to the related description in the method embodiment, which is not repeated herein.
From the above description, it can be seen that, in the single-wire communication apparatus according to the embodiment of the present application, the master device and the slave device are initialized before communication, and in the initialization process, the master device sends an initialization timing sequence to initialize the slave device, and accurately determines the clock frequency of the slave device by counting according to the low level of the preset width sent by the slave device; and then the master equipment can accurately encode according to the frequency ratio of the master clock and the slave clock in the single-wire communication of the master equipment and the slave equipment, compared with the existing single-bus communication mode, different delay parameters are not required to be set in the whole process, and the problems that the delay is inaccurate, communication abnormality occurs and communication efficiency is influenced due to complex parameters can be effectively avoided.
Further, the format of the communication frame is that one communication frame comprises 22 codes, one code corresponds to 1 bit, and the 22 codes are in turn: the method comprises the steps of 1 bit starting bit sent by a master device, 1 bit response bit returned by a slave device, 7 bit address bits sent by the master device, 1 bit read-write indicating bit sent by the master device, 1 bit first even check bit sent by the master device, 1 bit first response bit returned to check by the slave device, 8 bit data bit sent by the master device, 1 bit second even check bit sent by the master device and 1 bit second response bit returned to check by the slave device.
Further, the first communication unit 28 further includes: a first judging module 281, configured to judge, by the master device, whether a communication abnormality occurs during a single-wire communication; the sending module 282 is configured to send, by the master device, a reset timing to the slave device to reset the slave device if the communication abnormality occurs.
Further, the first determining module 281 is configured to: if the number of times of the continuous occurrence of the first response bit or the second response bit, which indicates that the verification fails, exceeds the preset number of times, determining that communication abnormality occurs; and if the first response bit and the second response bit both indicate that the verification passes, determining that the communication abnormality does not occur.
Specifically, the specific process of implementing the functions of each unit and module in the apparatus of the embodiment of the present application may refer to the related description in the method embodiment, which is not repeated herein.
There is further provided, according to an embodiment of the present application, an apparatus 300 for single-wire communication for implementing the method of fig. 10 to 11, as shown in fig. 13, where the apparatus is located on a slave device side, and the apparatus includes: a receiving unit 31 for receiving, from the device, an initialization timing transmitted by the master device; a second detecting unit 32 for detecting, by the slave device, whether the bus is released by the master device after the completion of the initialization timing reception; a second transmitting unit 33, configured to transmit a low level with a preset width to the master device by the slave device if the bus is released by the master device, so that the master device starts counting in units of its own clock period after detecting that the slave device pulls down the bus; a releasing unit 34, configured to release the bus from the slave device after the low-level transmission with the preset width is completed, so that the master device stops counting after the slave device releases the bus, obtain a period count value, and calculate a ratio of the clock frequency of the master device to the clock frequency of the slave device according to the period count value and the preset width; the second communication unit 35 is configured to enter an active mode after the slave device releases the bus, where the slave device and the master device perform single-wire communication according to respective corresponding coding modes and according to a format of a communication frame, where the coding mode of the master device is determined by the master device according to a ratio and a preset single-wire communication coding mode, and the preset single-wire communication coding mode uses a clock period of the slave device as 1 count unit, and the coding mode of the slave device is the preset single-wire communication coding mode.
Specifically, the specific process of implementing the functions of each unit and module in the apparatus of the embodiment of the present application may refer to the related description in the method embodiment, which is not repeated herein.
From the above description, it can be seen that, in the single-wire communication apparatus according to the embodiment of the present application, the slave device and the master device are initialized before communication, and the master device transmits an initialization timing sequence during the initialization process to initialize the slave device, and accurately determines the clock frequency of the slave device by counting according to the low level of the preset width transmitted by the slave device; and then the master equipment can accurately encode according to the frequency ratio of the master clock and the slave clock in the single-wire communication of the master equipment and the slave equipment, compared with the existing single-bus communication mode, different delay parameters are not required to be set in the whole process, and the problems that the delay is inaccurate, communication abnormality occurs and communication efficiency is influenced due to complex parameters can be effectively avoided.
Further, the format of the communication frame is that one communication frame comprises 22 codes, one code corresponds to 1 bit, and the 22 codes are in turn: the method comprises the steps of 1 bit starting bit sent by a master device, 1 bit response bit returned by a slave device, 7 bit address bits sent by the master device, 1 bit read-write indicating bit sent by the master device, 1 bit first even check bit sent by the master device, 1 bit first response bit returned to check by the slave device, 8 bit data bit sent by the master device, 1 bit second even check bit sent by the master device and 1 bit second response bit returned to check by the slave device.
Further, the second communication unit 35 further includes: a second judging module 351, configured to, during a communication process, judge whether a reset timing sequence is received by the slave device, where the reset timing sequence is sent after the master device judges that a communication abnormality occurs; and the reset module 352 is configured to reset the slave device according to the reset timing if the reset timing is received.
According to an embodiment of the present application, there is further provided a single-wire communication system, where the system includes a master device, a slave device, where the master device and the slave device are connected by a bus and are connected in an open-drain output manner, and the master device is configured to perform the method of single-wire communication in fig. 3 to 9; a slave device for performing the method of single wire communication of any of the preceding figures 10-11. A schematic diagram of the connection between the master and slave devices in a single-wire communication system is shown in fig. 4.
Specifically, a communication flow of the single-wire communication system includes the following steps: the method comprises the steps that a master device judges whether a slave device clock is stable, if so, an initialization mode is entered, if not, the master device wakes up the slave device clock, judges whether the clock is stable, waits until the slave device clock is stable, enters the initialization mode, the master device sends an initialization time sequence, the slave device receives the initialization time sequence, the master device judges whether the initialization time sequence is sent to be completed, and if not, the initialization time sequence is sent continuously; if so, the master device releases the bus, the slave device judges whether the initialization time sequence is received to be finished, and if not, the slave device continues to receive the initialization time sequence; if so, the master device waits for the master device to release the bus and then sends a clock low level with a preset width, the master device starts counting after detecting that the slave device pulls down the bus, the slave device releases the bus, the master device stops counting after detecting that the slave device releases the bus, the master device exits an initialization mode, enters an active mode, the master device communicates, the master device judges whether communication abnormality occurs, if so, a reset time sequence is sent, the slave device receives the reset time sequence, and the slave device restarts. It should be noted that, in practical application, the above steps are performed simultaneously in the master device and the slave device, and are not limited to the above sequence.
From the above description, it can be seen that in the single-wire communication system of the embodiment of the present application, the slave device and the master device are initialized before communication, and the master device transmits an initialization timing sequence during the initialization process to initialize the slave device, and accurately determines the clock frequency of the slave device by counting according to the low level of the preset width transmitted by the slave device; and then the master equipment can accurately encode according to the frequency ratio of the master clock and the slave clock in the single-wire communication of the master equipment and the slave equipment, compared with the existing single-bus communication system, different delay parameters are not required to be set in the whole process, and the problems that the delay is inaccurate, communication abnormality occurs and the communication efficiency is influenced due to the fact that the parameters are complex can be effectively avoided. And the system also has an abnormal recovery mechanism and a verification function, so that the communication efficiency can be further improved.
According to an embodiment of the present application, there is further provided a computer readable storage medium, where the computer readable storage medium stores computer instructions for causing a computer to perform the method for single-wire communication in the above method embodiment.
According to an embodiment of the present application, there is also provided an electronic device including: at least one processor; and a memory communicatively coupled to the at least one processor; the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor, so that the at least one processor performs the method of single-wire communication in the above method embodiment.
It will be apparent to those skilled in the art that the modules or steps of the application described above may be implemented in a general purpose computing device, they may be centralized on a single computing device, or distributed across a network of computing devices, or they may alternatively be implemented in program code executable by computing devices, such that they may be stored in a memory device and executed by computing devices, or individually fabricated as individual integrated circuit modules, or multiple modules or steps within them may be fabricated as a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the same, but rather, various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims (10)

1. A method of single-wire communication, the method comprising:
after the master device confirms that the internal clock of the slave device is stable, entering an initialization mode;
The master device sends an initialization time sequence to the slave device, and releases a bus after the completion of the sending, so that the slave device sends a low level with a preset width to the master device;
the master device detects whether the slave device pulls down a bus;
if the bus is pulled down, the master device starts counting by taking the clock cycle of the master device as a unit;
after the slave device releases the bus, the master device stops counting to obtain a period count value;
the master device calculates the ratio of the clock frequency of the master device to the clock frequency of the slave device according to the period count value and the preset width, and the initialization mode is ended and the active mode is entered;
the master device determines the coding mode of the master device according to the ratio and a preset single-wire communication coding mode, wherein the preset single-wire communication coding mode uses the clock period of the slave device as 1 counting unit;
the master device and the slave device perform single-wire communication according to the respective corresponding coding modes and the format of the communication frame, and the coding mode of the slave device is the preset single-wire communication coding mode.
2. The method of single-wire communication according to claim 1, wherein the format of the communication frame is such that one communication frame contains 22 codes, one code corresponds to 1 bit, and the 22 codes are in turn:
The master device sends 1-bit initial bit, the slave device replies 1-bit response bit, the master device sends 7-bit address bits, the master device sends 1-bit read-write indicating bit, the master device sends 1-bit first even check bit, the slave device replies 1-bit first response bit for check, the master device sends 8-bit data bit, the master device sends 1-bit second even check bit, and the slave device replies 1-bit second response bit for check.
3. The method according to claim 1, wherein the master device and the slave device perform single-wire communication according to respective corresponding coding modes and according to a format of a communication frame, further comprising:
in the single-wire communication process, the main equipment judges whether communication abnormality occurs or not;
and if communication abnormality occurs, the master device sends a reset time sequence to the slave device so as to reset the slave device.
4. The method according to claim 2, wherein the master device determining whether a communication abnormality occurs comprises:
if the number of times of the continuous occurrence of the first response bit or the second response bit, which indicates that the verification fails, exceeds the preset number of times, determining that communication abnormality occurs;
And if the first response bit and the second response bit both indicate that the verification is passed, determining that no communication abnormality occurs.
5. A method of single-wire communication, the method comprising:
after the master device confirms that the internal clock of the slave device is stable and enters an initialization mode, the slave device receives an initialization time sequence sent by the master device;
after the initialization time sequence is received, the slave device detects whether the bus is released by the master device;
if the slave device is released, the slave device sends a low level with a preset width to the master device, so that the master device starts counting by taking a clock cycle of the slave device as a unit after detecting that the slave device pulls down a bus; and, in addition, the processing unit,
after low-level transmission with preset width is completed, the slave device releases the bus so that the master device stops counting after the slave device releases the bus to obtain a period count value, and the ratio of the clock frequency of the master device to the clock frequency of the slave device is calculated according to the period count value and the preset width;
the slave device enters an active mode after releasing the bus, the slave device and the master device perform single-wire communication according to respective corresponding coding modes and according to a format of a communication frame, the coding mode of the master device is determined by the master device according to the ratio and a preset single-wire communication coding mode, the preset single-wire communication coding mode is 1 counting unit in terms of clock cycle of the slave device, and the coding mode of the slave device is the preset single-wire communication coding mode.
6. The method of single-wire communication according to claim 5, wherein the format of the communication frame is such that one communication frame contains 22 codes, one code corresponds to 1 bit, and the 22 codes are in turn:
the master device sends 1-bit initial bit, the slave device replies 1-bit response bit, the master device sends 7-bit address bits, the master device sends 1-bit read-write indicating bit, the master device sends 1-bit first even check bit, the slave device replies 1-bit first response bit for check, the master device sends 8-bit data bit, the master device sends 1-bit second even check bit, and the slave device replies 1-bit second response bit for check.
7. The method according to claim 5, wherein the single-wire communication between the slave device and the master device according to the respective corresponding coding modes and according to the format of the communication frame further comprises:
in the communication process, the slave device judges whether a reset time sequence is received or not, and the reset time sequence is sent after the master device judges that communication abnormality occurs;
and if the reset time sequence is received, the slave device resets according to the reset time sequence.
8. An apparatus for single-wire communication, the apparatus comprising:
a confirmation unit, configured to enter an initialization mode after the master device confirms that the internal clock of the slave device is stable;
a first transmitting unit, configured to transmit an initialization timing sequence to the slave device by using the master device, and release a bus after transmission is completed, so that the slave device transmits a low level with a preset width to the master device;
the first detection unit is used for detecting whether the slave device pulls down a bus or not by the master device;
the counting unit is used for starting counting by taking the clock cycle of the master equipment as a unit if the bus is pulled down;
the stopping unit is used for stopping counting by the master device after the slave device releases the bus to obtain a period count value;
the calculating unit is used for calculating the ratio of the clock frequency of the master device to the clock frequency of the slave device according to the period count value and the preset width, ending the initialization mode and entering an active mode;
the determining unit is used for determining the encoding mode of the master equipment according to the ratio and a preset single-wire communication encoding mode, wherein the preset single-wire communication encoding mode uses the clock period of the slave equipment as 1 counting unit;
The first communication unit is used for carrying out single-wire communication on the master equipment and the slave equipment according to the respective corresponding coding modes and the format of the communication frame, and the coding mode of the slave equipment is the preset single-wire communication coding mode.
9. An apparatus for single-wire communication, the apparatus comprising:
a receiving unit, configured to receive, from a slave device, an initialization timing sequence sent by a master device;
the second detection unit is used for detecting whether the bus is released by the master device or not by the slave device after the initialization time sequence is received;
the second sending unit is used for sending a low level with a preset width to the master device by the slave device if the bus is released by the master device, so that the master device starts counting by taking a clock cycle of the slave device as a unit after detecting that the slave device pulls down the bus;
the release unit is used for releasing the bus by the slave device after the low-level transmission with the preset width is completed, so that the master device stops counting after the slave device releases the bus to obtain a period count value, and calculating the ratio of the clock frequency of the master device to the clock frequency of the slave device according to the period count value and the preset width;
The second communication unit is used for enabling the slave device to enter an active mode after the slave device releases the bus, the slave device and the master device perform single-wire communication according to respective corresponding coding modes and according to a communication frame format, the coding mode of the master device is determined by the master device according to the ratio and a preset single-wire communication coding mode, the preset single-wire communication coding mode is 1 counting unit in terms of clock cycle of the slave device, and the coding mode of the slave device is the preset single-wire communication coding mode.
10. A single-wire communication system is characterized in that the system comprises a master device and a slave device, wherein the master device and the slave device are connected through a bus and are connected in a leakage output mode,
wherein the master device is configured to perform the method of single-wire communication of any one of the preceding claims 1 to 4;
the slave device for performing the method of single-wire communication according to any of the preceding claims 5 to 7.
CN202311515619.1A 2023-11-14 2023-11-14 Single-wire communication method, device and system Pending CN117573586A (en)

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Application Number Priority Date Filing Date Title
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