CN101764670A - CRC code check method in data sending process - Google Patents

CRC code check method in data sending process Download PDF

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Publication number
CN101764670A
CN101764670A CN200810237268A CN200810237268A CN101764670A CN 101764670 A CN101764670 A CN 101764670A CN 200810237268 A CN200810237268 A CN 200810237268A CN 200810237268 A CN200810237268 A CN 200810237268A CN 101764670 A CN101764670 A CN 101764670A
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CN
China
Prior art keywords
crc
data
sign indicating
indicating number
send
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Pending
Application number
CN200810237268A
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Chinese (zh)
Inventor
刘渝新
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chongqing Chuanyi Automation Co Ltd
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Chongqing Chuanyi Automation Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Chongqing Chuanyi Automation Co Ltd filed Critical Chongqing Chuanyi Automation Co Ltd
Priority to CN200810237268A priority Critical patent/CN101764670A/en
Publication of CN101764670A publication Critical patent/CN101764670A/en
Pending legal-status Critical Current

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Abstract

The invention relates to the URAT asynchronous communication field, in particular to a CRC code check method in data sending process. The technical scheme of the invention includes that: data to be sent and CRC codes from an FIFO module are received; the data is sent bit by bit and the CRC codes are calculated; and the CRC codes obtained through calculation are sent. In the invention, while sending information frame byte by byte, CRC check code is automatically calculated, when the information frame is sent, the CRC check code can be automatically calculated, after data sending is carried out, the CRC check code automatically generated by hardware can be sent out automatically, so as to omit the process of calculating and sending CRC codes by CPU and reduce CPU data preparation time.

Description

CRC code check method in the data transmission procedure
Technical field
The present invention relates to URAT asynchronous communication field, the CRC code check method in particularly a kind of data transmission procedure.
Background technology
The common control chip of universal asynchronous communication has 16C450,16C550,16C750 etc.Interfaces such as 3 bit address buses, 8 bit address buses, read-write control bus can realize that baud rate setting, position of rest number are provided with, the setting of data bit number, have the various functions that report an error simultaneously.Universal asynchronous communication control chip traffic rate per second up to the number megabit, can be realized high-speed communication.
Existing asynchronous communication is applied in the multi-computer communication network of RS485 interface, adopts CRC sign indicating number (cyclic redundancy check (CRC) code) check when sending data, needs to calculate earlier the CRC check sign indicating number of this frame, sends data then.Computational process also needs to expend time in, and is particularly when frame is than long and high-speed communication, this consuming time more obvious, had a strong impact on data transmission efficiency.
Summary of the invention
The present invention has overcome above-mentioned shortcoming, provides that a kind of control procedure is simple, the CRC code check method in the high data transmission procedure of efficient.
The present invention solves the technical scheme that its technical problem takes: the CRC code check method in a kind of data transmission procedure comprises the steps:
Receive the data that will send from fifo module;
Send data by turn, and calculate the CRC sign indicating number;
The CRC sign indicating number that transmission obtains by aforementioned calculation.
In the described data step that sends by turn, after the process circulation reaches a byte, send parity check bit.
Describedly receive before the data and CRC sign indicating number that to send, also comprise the CRC sign indicating number is carried out initialized step from fifo module.
The described reception from fifo module before data that will send and the step that sends the CRC sign indicating number also comprises and judges that whether fifo module is empty step, if fifo module is empty, then receives the CRC sign indicating number by turn.
The described step that receives the CRC sign indicating number by turn is specially and sends CRC sign indicating number low byte earlier, and then sends upper byte.
The present invention is by calculating the CRC check sign indicating number automatically in byte-by-byte transmission information frame, automatically calculate the CRC check sign indicating number when sending information frame, data send the automatic CRC check sign indicating number that generates of back hardware that finishes and are sent automatically, save CPU and calculate to have sent data CRC sign indicating number process, reduced cpu data time.
Description of drawings
Fig. 1 is the applied sending module block diagram of the present invention;
Fig. 2 is a control flow chart of the present invention.
Embodiment
The present invention can be applicable in as shown in fig. 1 the sending module, and sending module sends by 9 and keeps storage FIFO and serial to send control module constituting, send data and comprise that parity check bit deposits among the FIFO.When FIFO is not empty and serial sends control module when empty, the data among the FIFO are written into serial and send control module, and check parity check bit affirmation transmission course is correct in the process that writes.Serial sends control module and sends to the SOUT port after the parallel data serialization.Wherein, the function declaration of each signal end is as follows:
RESET: reset signal;
16XCLK: 16 times of clock signals of baud rate;
SOUT: serial data output signal;
WDf: write the FIFO control signal;
The DAt:9 bit data bus:
The Wtf:FIFO data write the write control signal that serial sends control module;
The Dt:9 bit data bus;
Based on said structure, carry out detailed process that Frame sends as shown in Figure 2.
Step 201 after the initialization, detects whether begin to send information frame.If after having started the transmission information frame, then change step 202 over to;
Step 202, initialization CRC sign indicating number (being CRC sign indicating number calculator);
Step 203 judges that whether fifo module is empty, is then to change step 212 over to, otherwise changes step 204 over to;
Step 204 judges whether send control module is empty;
Step 205, when FIFO is not empty, when the transmission control module is empty, FIFO transmits a byte data to sending control module, beginning converts parallel 8 bit data to serial data, sends according to start bit (step 206), data bit (step 207), parity check bit (step 211), position of rest (step 217) order.
Step 208 judge to send in the data procedures, transmission whether be the CRC sign indicating number, if then directly jump to step 210, otherwise forward step 209 to;
Step 209 is calculated the CRC sign indicating number in process of transmitting;
Step 210, whether 8 bit data of judging current byte send and finish, thus circulation sends 8 bit data positions and carries out the CRC yardage and calculate;
Step 212 if FIFO is empty, after wait serial transmission control module also is sky, changes step 213 over to;
Step 213~216 send CRC sign indicating number low byte to sending control module, and then send upper byte from CRC sign indicating number calculator.In sending CRC sign indicating number process, stop the CRC yardage and calculate.This step is used for acceptance inspection at the CRC sign indicating number of data heel with this data set.Send out low byte, send out upper byte again, transmission makes things convenient for the hardware decoding like this.
After the position of rest transmission (step 217) of data finishes, if FIFO is not sky then continues to send other data.
According to said process as can be known, in byte-by-byte transmission information frame, calculate the CRC check sign indicating number automatically, data send the CRC check sign indicating number that the back hardware that finishes generates automatically, and along with the transmission of data is sent automatically, save CPU and calculate to have sent data CRC sign indicating number process, reduced cpu data time.In addition, adopt 9 bit data bus between CPU and the asynchronous communication controller, wherein the 9th promptly is to send the data parity check position, thereby improves the reliability of data and CPU parallel transmission.
More than the CRC code check method in the data transmission procedure provided by the present invention is described in detail, used specific case herein principle of the present invention and execution mode are set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, the part that all can change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.

Claims (5)

1. the CRC code check method in the data transmission procedure is characterized in that: comprise the steps:
Receive the data that will send from fifo module;
Send data by turn, and calculate the CRC sign indicating number;
The CRC sign indicating number that transmission obtains by aforementioned calculation.
2. the CRC code check method in the data transmission procedure according to claim 1 is characterized in that: in the described data step that sends by turn, after the process circulation reaches a byte, send parity check bit.
3. the CRC code check method in the data transmission procedure according to claim 1, it is characterized in that: describedly receive before the data step that to send from fifo module, also comprise and judge that whether fifo module is empty step, if fifo module is empty, then prepares to enter CRC sign indicating number transmit status.
4. the CRC code check method in the data transmission procedure according to claim 3 is characterized in that: the described step that sends the CRC sign indicating number by turn is specially and sends CRC sign indicating number low byte earlier, and then sends upper byte.
5. according to the CRC code check method in each described data transmission procedure in the claim 1~4, it is characterized in that: describedly receive the data that to send and send before the CRC sign indicating number, also comprise the CRC sign indicating number is carried out initialized step from fifo module.
CN200810237268A 2008-12-21 2008-12-21 CRC code check method in data sending process Pending CN101764670A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200810237268A CN101764670A (en) 2008-12-21 2008-12-21 CRC code check method in data sending process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200810237268A CN101764670A (en) 2008-12-21 2008-12-21 CRC code check method in data sending process

Publications (1)

Publication Number Publication Date
CN101764670A true CN101764670A (en) 2010-06-30

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CN200810237268A Pending CN101764670A (en) 2008-12-21 2008-12-21 CRC code check method in data sending process

Country Status (1)

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CN (1) CN101764670A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102447599A (en) * 2011-11-28 2012-05-09 广东工业大学 Control system and control method for short-distance home communication protocol based on FSM (Finite State Machine)
CN106911646A (en) * 2015-12-23 2017-06-30 重庆川仪自动化股份有限公司 Communications protocol and communication system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102447599A (en) * 2011-11-28 2012-05-09 广东工业大学 Control system and control method for short-distance home communication protocol based on FSM (Finite State Machine)
CN106911646A (en) * 2015-12-23 2017-06-30 重庆川仪自动化股份有限公司 Communications protocol and communication system

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Application publication date: 20100630