JP3433279B2 - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JP3433279B2
JP3433279B2 JP29129995A JP29129995A JP3433279B2 JP 3433279 B2 JP3433279 B2 JP 3433279B2 JP 29129995 A JP29129995 A JP 29129995A JP 29129995 A JP29129995 A JP 29129995A JP 3433279 B2 JP3433279 B2 JP 3433279B2
Authority
JP
Japan
Prior art keywords
heat sink
semiconductor device
insulating plate
nozzle
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP29129995A
Other languages
Japanese (ja)
Other versions
JPH09134983A (en
Inventor
平吉 桑原
敦 鈴木
當範 武曽
博久 山村
信男 藤枝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
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Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP29129995A priority Critical patent/JP3433279B2/en
Publication of JPH09134983A publication Critical patent/JPH09134983A/en
Application granted granted Critical
Publication of JP3433279B2 publication Critical patent/JP3433279B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【発明の属する技術分野】本発明は、半導体モジュール
にヒートシンクを装着してなる半導体装置の冷却構造に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device cooling structure in which a heat sink is mounted on a semiconductor module.

【０００２】[0002]

【従来の技術】特願平４−１７６４９７号に、代表的な
従来技術としての半導体装置の冷却構造が記載されてい
る。モジュール基板に、例えば窒化アルミニウムの絶縁
層をはさんで半導体チップが半田付けされて、半導体モ
ジュールが構成される。モジュール基板とこの基板の裏
面に設置されたヒートシンクとの間には熱伝導グリース
を封入して、半導体モジュールとヒートシンクをボルト
などで締め付けている。ヒートシンクはヒートパイプ方
式の場合もあるが、水通路を設けた水冷方式、あるい
は、フィンを設けた空冷方式などの場合もある。2. Description of the Related Art Japanese Patent Application No. 4-176497 describes a typical conventional cooling structure for a semiconductor device. A semiconductor chip is soldered on the module substrate with an insulating layer of, for example, aluminum nitride sandwiched therebetween to form a semiconductor module. Thermal conductive grease is sealed between the module board and the heat sink installed on the back surface of the board, and the semiconductor module and the heat sink are fastened with bolts or the like. The heat sink may be a heat pipe type, but may also be a water cooling type with a water passage or an air cooling type with fins.

【０００３】半導体チップは作動時に発熱し、その熱
は、半導体チップから半田層、絶縁層を介してモジュー
ル基板に伝わる。モジュール基板では熱が拡散される。
拡散された熱は、熱伝導グリースを介してヒートシンク
へと伝熱される。このようにして半導体チップは、ヒー
トシンクにより冷却されて、許容値（例えば１００℃、
または１５０℃など）以下になるように放熱される。The semiconductor chip generates heat during operation, and the heat is transmitted from the semiconductor chip to the module substrate via the solder layer and the insulating layer. Heat is diffused in the module substrate.
The diffused heat is transferred to the heat sink via the heat conductive grease. In this way, the semiconductor chip is cooled by the heat sink, and the allowable value (for example, 100 ° C.,
(Or 150 ° C., etc.)

【０００４】[0004]

【発明が解決しようとする課題】このような半導体装置
の場合、例えば半導体チップはシリコンで、絶縁層は窒
化アルミニウム（ＡｌＮ）で、モジュール基板は銅で製
作されている。シリコン、ＡｌＮ、銅の線膨張係数が異
なるため、シリコン製の半導体チップが発熱した場合、
それぞれ膨張する長さが異なり、そして半導体チップと
絶縁層間に介在する半田層に応力が発生する。発生応力
が大きいと、半田層に亀裂が生じて、半導体モジュール
の破損を招く。一方、応力を低減する方法として、絶縁
層あるいはモジュール基板を薄くする方法がある。例え
ば、従来、厚さ１０ｍｍ程度であった銅製のモジュール
基板を厚さ３ｍｍ程度に減少させる。あるいは絶縁層、
モジュール基板の材料をシリコンに近づける。例えば、
３ｍｍ厚の銅のモジュール基板に代えて、３ｍｍ厚のモ
リブデン基板を用いる。あるいは絶縁層とモジュール基
板をひとつの材料として、例えばＡｌＮの３ｍｍ厚さと
する。さらに薄くしてＡｌＮ厚さを１ｍｍ、０．５ｍｍ
とする方法である。In the case of such a semiconductor device, for example, the semiconductor chip is made of silicon, the insulating layer is made of aluminum nitride (AlN), and the module substrate is made of copper. Since silicon, AlN, and copper have different linear expansion coefficients, when a silicon semiconductor chip generates heat,
The expansion lengths are different from each other, and stress is generated in the solder layer interposed between the semiconductor chip and the insulating layer. If the generated stress is large, a crack is generated in the solder layer, which causes damage to the semiconductor module. On the other hand, as a method of reducing stress, there is a method of thinning an insulating layer or a module substrate. For example, the thickness of the module board made of copper, which has been about 10 mm in the past, is reduced to about 3 mm. Or an insulating layer,
Bring the material of the module substrate closer to silicon. For example,
A 3 mm thick molybdenum substrate is used instead of the 3 mm thick copper module substrate. Alternatively, the insulating layer and the module substrate are made of one material, for example, AlN having a thickness of 3 mm. Further thin the AlN thickness to 1mm, 0.5mm
Is the method.

【０００５】ところで、このように絶縁層、モジュール
基板の材料の膨張係数がシリコンに近くなると、各部材
の熱伝導率も小さくなる。さらに応力低減のため、その
厚さを薄くすると、半導体チップから伝わった熱を拡が
らせる効果が低減する。By the way, when the coefficient of expansion of the material of the insulating layer and the module substrate becomes closer to that of silicon, the thermal conductivity of each member also decreases. Further, if the thickness is reduced to reduce the stress, the effect of spreading the heat transmitted from the semiconductor chip is reduced.

【０００６】一方、絶縁層、モジュール基板が薄くなる
と、モジュール基板とヒートシンク間に封入される熱伝
導グリースの厚さも厚くなってしまう。すなわち、一般
にモジュール基板の縁部にボルトを挿入する穴を設け
て、ボルトで締め付けるから、絶縁層、モジュール基板
が厚ければ、熱伝導グリースを十分に押し付けるので、
熱伝導グリースの厚さは薄くなる。しかし、絶縁層、モ
ジュール基板が薄くなると、縁部をボルトで締め付けて
も、これら板部材が撓むために、中央部の熱伝導グリー
スの層が厚くなってしまう。On the other hand, when the insulating layer and the module substrate become thinner, the thickness of the heat conductive grease sealed between the module substrate and the heat sink also becomes thicker. That is, generally, a hole for inserting a bolt is provided at the edge of the module board and tightened with the bolt, so if the insulating layer and the module board are thick, the thermal grease can be sufficiently pressed.
The thickness of the thermal grease decreases. However, when the insulating layer and the module substrate are thin, even if the edges are tightened with bolts, these plate members are bent, so that the layer of the heat conductive grease in the central portion becomes thick.

【０００７】つまり、応力低減を図るため、絶縁層、モ
ジュール基板をシリコンに近い膨張係数の材質にする、
あるいは厚さを薄くすると、熱の拡がりが悪くなり、さ
らに熱伝導グリースが厚くなると、モジュール基板から
ヒートシンク側への伝熱が悪くなる。つまり半導体チッ
プからヒートシンクへの熱の伝わりが悪くなり、半導体
チップの温度上昇を招くおそれがある。That is, in order to reduce the stress, the insulating layer and the module substrate are made of a material having an expansion coefficient close to that of silicon.
Alternatively, if the thickness is reduced, the spread of heat becomes worse, and if the thermal conductive grease becomes thicker, the heat transfer from the module substrate to the heat sink side becomes worse. That is, the heat transfer from the semiconductor chip to the heat sink becomes poor, which may cause the temperature of the semiconductor chip to rise.

【０００８】本発明では、絶縁層とモジュール基板とを
同一の絶縁性材料で一体化した基板(該一体化した基板
を絶縁板と称する)を用いる半導体装置における熱伝導
性の向上を図る。According to the present invention, the thermal conductivity of a semiconductor device using a substrate in which an insulating layer and a module substrate are integrated with the same insulating material (the integrated substrate is referred to as an insulating plate) is improved.

【０００９】本発明が解決しようとする第１の課題は、
半導体装置において、絶縁板が薄くなった場合でも、熱
伝導グリースを薄くして、半導体チップからヒートシン
クへの伝熱を良好にすることにある。さらに第２の課題
はヒートシンク内の伝熱において、半導体チップに相対
する部分の伝熱特性を良好にすることにある。The first problem to be solved by the present invention is
In the semiconductor device, even if the insulating plate becomes thin, the heat conducting grease is made thin so as to improve the heat transfer from the semiconductor chip to the heat sink. A second problem is to improve the heat transfer characteristics of the portion of the heat sink that faces the semiconductor chip.

【００１０】[0010]

【課題を解決するための手段】上記第１の課題を解決す
るために、本発明の第１の半導体装置は、複数の半導体
チップを上面に搭載し下面に金属膜が形成された絶縁板
と、この絶縁板の下面側に配置されたヒートシンクと、
金属膜とヒートシンク間に装填された熱伝導グリースと
を備え、絶縁板がヒートシンクに締め付けられて構成さ
れる半導体装置であって、熱伝導グリースは、半導体チ
ップそれぞれに相対する領域およびその近傍に、島状に
装填されていることを特徴とする。In order to solve the first problem, a first semiconductor device of the present invention is an insulating plate having a plurality of semiconductor chips mounted on the upper surface and a metal film formed on the lower surface. , A heat sink arranged on the lower surface side of this insulating plate,
A semiconductor device comprising a heat conductive grease loaded between a metal film and a heat sink, the insulating plate being fastened to the heat sink, wherein the heat conductive grease is provided in a region facing each semiconductor chip and in the vicinity thereof. Characterized by being loaded in an island shape.

【００１１】そして熱伝導グリースの島状領域は半導体
チップの平面積の４〜８倍とするのが好ましい。熱伝導
グリースを島状に形成する理由は、絶縁板とヒートシン
ク間全面に熱伝導グリースを設けるよりも、熱伝導グリ
ースを薄くすることができ、熱伝導性を向上させること
ができるからである。また絶縁板をヒートシンクに締め
付けて、熱伝導グリースの島状領域を半導体チップの平
面積の４倍に拡げると、絶縁板とヒートシンク間の熱抵
抗が熱伝導グリースを介在された場合の最低値近くまで
低下し、８倍を超えて拡げても熱抵抗がそれ以上低下し
ないからである。The island area of the heat conductive grease is preferably 4 to 8 times the plane area of the semiconductor chip. The reason why the thermal conductive grease is formed in an island shape is that the thermal conductive grease can be made thinner and the thermal conductivity can be improved than when the thermal conductive grease is provided on the entire surface between the insulating plate and the heat sink. When the insulating plate is fastened to the heat sink and the island area of the heat conducting grease is expanded to 4 times the plane area of the semiconductor chip, the thermal resistance between the insulating plate and the heat sink is close to the minimum value when the heat conducting grease is interposed. This is because the thermal resistance does not decrease any more even if the heat resistance is reduced to 8 times or more and spreads more than 8 times.

【００１２】また、上記第１の課題を解決するために、
本発明の第２の半導体装置は、複数の半導体チップを上
面に搭載し下面に金属膜を形成された四角形の絶縁板、
この絶縁板の上面側を、半導体チップを含めて覆う樹脂
及びこの樹脂の側面を囲むケースからなるモジュール
と、このモジュールの絶縁板の下面側に配置された四角
形板状のヒートシンクと、絶縁板の金属膜とヒートシン
ク間に装填された熱伝導グリースとを備え、モジュール
をヒートシンクに締め付けて構成される半導体装置であ
って、樹脂中で隣合う半導体チップ間の適宜箇所及びケ
ースの壁の適宜箇所に上下に穿設した穴にそれぞれ挿入
したバネと、このバネの上端を押圧し、ヒートシンクと
の間にモジュールを挟んでヒートシンクの４角にボルト
を介して締め付けられた押さえ板とを設け、かつ熱伝導
グリースは、半導体チップそれぞれに相対する領域およ
びその近傍に、島状に装填されていることを特徴とす
る。In order to solve the above first problem,
A second semiconductor device of the present invention is a rectangular insulating plate on which a plurality of semiconductor chips are mounted on the upper surface and a metal film is formed on the lower surface.
A module including a resin covering the upper surface side of the insulating plate including the semiconductor chip and a case surrounding the side surface of the resin, a rectangular heat sink arranged on the lower surface side of the insulating plate of the module, and a module of the insulating plate. What is claimed is: 1. A semiconductor device comprising a metal film and a heat conductive grease loaded between heatsinks, the module being clamped to a heatsink, wherein the semiconductor device is provided at appropriate locations between adjacent semiconductor chips in resin and at appropriate locations on a wall of a case. A spring inserted into each of the upper and lower holes, and a pressing plate that presses the upper end of the spring and sandwiches the module between the spring and the heat sink and is fastened to the four corners of the heat sink with bolts, The conductive grease is characterized in that it is charged in an island shape in a region facing each semiconductor chip and in the vicinity thereof.

【００１３】そして、第２の半導体装置においては、熱
伝導グリースの島状領域は半導体チップの平面積の４〜
８倍とするのがよい。この４〜８倍の理由は、上記第１
の半導体装置の説明で述べたとおりである。Further, in the second semiconductor device, the island-shaped region of the heat conductive grease is 4 to 4 of the plane area of the semiconductor chip.
8 times is good. The reason for this 4-8 times is the first
This is as described in the description of the semiconductor device.

【００１４】また上記第１、第２の各半導体装置におい
て、押さえ板をヒートシンクに締め付けるボルト近傍
で、押さえ板とヒートシンクの間にスペーサを設け、こ
のスペーサにより上記バネの圧縮量を規定することが好
ましい。さらにこれらバネは、モジュールの相対する２
辺にそれぞれ沿って配列された２群と、これら２群の配
列の中央でこれら２群の配列に直交して挟まれるように
配列された１群とから構成するのがよい。さらに上記１
群のばねのばね定数は、他の２群のばねのそれより大き
くすることがこのましい。上記３つの群の配列（Ｈ形配
列）と各群のバネ定数は、絶縁板をヒートシンクに均一
に押圧する上でこのましい。その理由は、発明の実施の
形態の項で図２により説明する。In each of the first and second semiconductor devices, a spacer may be provided between the pressing plate and the heat sink near the bolt for fastening the pressing plate to the heat sink, and the spacer may regulate the compression amount of the spring. preferable. In addition, these springs are located on opposite sides of the module.
It is preferable to be composed of two groups arranged along the sides and one group arranged so as to be sandwiched in the center of the arrangement of these two groups orthogonally to the arrangement of these two groups. Further above 1
The spring constant of the group of springs is preferably greater than that of the other two groups of springs. The arrangement of the three groups (H-shaped arrangement) and the spring constant of each group are preferable for uniformly pressing the insulating plate against the heat sink. The reason will be described with reference to FIG. 2 in the section of the embodiment of the invention.

【００１５】上記第２の課題を解決するために、第１、
第２の半導体装置において、ヒートシンクは、内部に、
並行する複数の流路と、該流路の両端に形成されたヘッ
ダとからなる冷却手段を設けるとよい。In order to solve the above second problem, the first,
In the second semiconductor device, the heat sink is internally
It is preferable to provide a cooling means including a plurality of parallel flow paths and headers formed at both ends of the flow paths.

【００１６】また別の冷却手段として、ヒートシンク内
部に、隔壁を介して仕切られた上下２室と、２室のうち
の下室に冷却媒体を導入する流入口と、隔壁で半導体チ
ップに相対する位置に形成され下室からの冷却媒体を通
す孔と、２室のうちの上室から冷却媒体を排出し流入口
とは反対側に位置する排出口とを設けて冷却手段を構成
してもよい。また隔壁の孔に円形のノズルを装着し、こ
のノズルが向く上室の天井部分に凹みを設けるのがよ
い。これにより上室の天井部の厚さが減少して、半導体
チップから発生し絶縁板を通じて伝わる熱がヒートシン
クに吸収されやすくなる。さらに、凹みでノズルの対向
する領域から外側に放射状にフィンを取り付ければ、な
おさら、冷媒による冷却性能を向上させることができ
る。また上記円形のノズルの代わりに、長円形のノズル
を装着し、このノズルが向く上室の天井部分に凹みを設
け、この凹みでノズルの開口に対向する領域から外側に
長円形に対して交叉する方向に延びるフィンを各長辺に
そって並列して設けてもよい。As another cooling means, two upper and lower chambers partitioned by a partition wall inside the heat sink, an inlet for introducing a cooling medium into the lower chamber of the two chambers, and the partition wall facing the semiconductor chip. Even if the cooling means is configured, a hole formed at a position for passing the cooling medium from the lower chamber and a discharge port for discharging the cooling medium from the upper chamber of the two chambers and located on the opposite side of the inflow port are provided. Good. Further, it is preferable that a circular nozzle is attached to the hole of the partition wall, and a recess is provided in the ceiling portion of the upper chamber to which the nozzle faces. This reduces the thickness of the ceiling of the upper chamber, and the heat generated from the semiconductor chip and transmitted through the insulating plate is easily absorbed by the heat sink. Furthermore, if the fins are radially attached to the outside of the region where the nozzles face each other by the recesses, the cooling performance by the refrigerant can be further improved. Further, instead of the circular nozzle, an oval nozzle is attached, and a recess is provided in the ceiling portion of the upper chamber to which the nozzle faces, and the recess intersects the oval from the area facing the nozzle opening to the outside. The fins extending in the direction may be provided in parallel along each long side.

【００１７】また上記第１の課題を解決するために、本
発明の第３の半導体装置は、上記第２の半導体装置にお
ける絶縁板の下面全面に設けた金属膜に代わって、金属
膜を半導体チップそれぞれに相対する領域に形成し、こ
の金属膜とヒートシンク上面間に熱伝導グリースを島状
に装填し、さらに第２の半導体装置のヒートシンクに冷
却構造を設けたものである。In order to solve the above first problem, in a third semiconductor device of the present invention, instead of the metal film provided on the entire lower surface of the insulating plate in the second semiconductor device, a metal film is used as a semiconductor. It is formed in a region facing each of the chips, a thermal conductive grease is charged in an island shape between the metal film and the upper surface of the heat sink, and a cooling structure is provided on the heat sink of the second semiconductor device.

【００１８】第３の半導体装置におけるヒートシンクの
冷却構造は、上記第１、第２の半導体装置に備えるもの
と同様に構成するとよい。すなわち、この冷却構造はヒ
ートシンク内部に複数の流路とヘッダを設けて構成する
とよい。また、同様に別の冷却手段として、ヒートシン
ク内部に、隔壁を介して仕切られた上下２室と、下室に
冷却媒体を導入する流入口と、隔壁に形成された孔と、
上室から冷却媒体を排出する排出口とを設けて冷却手段
を構成してもよい。また同様に、隔壁の孔に円形のノズ
ルを装着し、上室の天井部分に凹みを形成し、凹みの放
射状にフィンを取り付けて冷却構造を構成する、または
円形のノズルの代わりに長円形のノズルを用い、上室の
天井部分に凹みに長円形の各長辺にそってフィンを設け
て冷却構造を構成するのがよい。The cooling structure of the heat sink in the third semiconductor device may be constructed in the same manner as that provided in the first and second semiconductor devices. That is, this cooling structure may be configured by providing a plurality of flow paths and headers inside the heat sink. Similarly, as another cooling means, two upper and lower chambers partitioned by a partition wall inside the heat sink, an inlet for introducing a cooling medium into the lower chamber, and a hole formed in the partition wall,
The cooling means may be configured by providing a discharge port for discharging the cooling medium from the upper chamber. Similarly, a circular nozzle is installed in the hole of the partition wall, a recess is formed in the ceiling part of the upper chamber, and fins are attached radially to the recess to form a cooling structure, or instead of the circular nozzle, an oval shape is formed. It is preferable that the cooling structure is configured by using nozzles and providing fins along the long sides of the oval in a recess in the ceiling portion of the upper chamber.

【００１９】ここで、半導体装置が作動して、半導体チ
ップが発熱した場合の熱の伝熱経路について説明する。
絶縁板の熱伝導率が小さく、かつ厚さが薄いため、半導
体チップからの熱は、ほとんど拡がることがなく、半導
体チップが占める面積のみ伝熱される。従って絶縁板か
らヒートシンクに熱伝導グリースを介して伝熱される場
合、半導体チップに相対する面から離れた箇所にある熱
伝導グリースは伝熱にあまり寄与しない。Here, a heat transfer path of heat when the semiconductor device operates and the semiconductor chip generates heat will be described.
Since the insulating plate has a low thermal conductivity and a small thickness, the heat from the semiconductor chip hardly spreads, and only the area occupied by the semiconductor chip is transferred. Therefore, when heat is transferred from the insulating plate to the heat sink via the heat conductive grease, the heat conductive grease located at a position away from the surface facing the semiconductor chip does not contribute much to the heat transfer.

【００２０】一方、熱伝導グリースはヒートシンク面の
全面に塗布して、締め付けると熱伝導グリースが抜けき
れず、熱伝導グリースの薄肉化に限界がある。半導体チ
ップに相対する面積部のみに塗布すると、締め付けた場
合に熱伝導グリースが塗られていない面積の方へ流れや
すくなるため、熱伝導グリースが薄くなる。On the other hand, when the heat conductive grease is applied to the entire surface of the heat sink and tightened, the heat conductive grease cannot be completely removed, and there is a limit to the thinning of the heat conductive grease. If applied only to the area facing the semiconductor chip, the heat conducting grease will easily flow to the area where the heat conducting grease is not applied when tightened, and the heat conducting grease will be thin.

【００２１】さらに、絶縁板が薄くなると、絶縁板を端
部から締め付けても特に中央部において締め付け力が弱
く、グリースを薄くできない。モジュールの適宜箇所に
バネを配することによって、モジュールをヒートシンク
に締め付ける際に、絶縁板の端部から中央部まで、グリ
ースが薄くなり、絶縁板およびモジュール基板が薄い時
に、さらに熱伝導グリースを薄くでき、熱伝導上の効果
は大きくなる。Further, when the insulating plate is thin, even if the insulating plate is tightened from the end, the tightening force is weak especially in the central part, and the grease cannot be thinned. By arranging springs at appropriate places on the module, when tightening the module to the heat sink, the grease becomes thin from the edge to the center of the insulating plate. It is possible, and the effect on heat conduction becomes large.

【００２２】また、ヒートシンクに冷却手段を設け、半
導体チップに相対する面積のみ高効率に冷却することに
より、さらに一層半導体チップ温度を下げることが可能
となる。Further, the temperature of the semiconductor chip can be further reduced by providing the heat sink with the cooling means and cooling the area facing the semiconductor chip with high efficiency.

【００２３】[0023]

【発明の実施の形態】以下、本発明の実施の形態を図面
を使って説明する。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

【００２４】図１は本発明の一実施の形態を示す断面図
である。図２、図３はそれぞれ図１のII−II矢視図、II
I−III矢視図である。複数の半導体チップ１が絶縁板２
の上に搭載されている。絶縁板２の材質は例えば窒化ア
ルミニウム（ＡｌＮ）である。絶縁板２の表面（半導体
チップを搭載する側の面）にはスパッター、蒸着などの
方法で半導体チップの搭載領域や配線部に金属膜３ａが
形成され、また絶縁板２の裏面には同様の方法で全面に
金属膜３ｂが形成されている。表面側では、この金属膜
３ａと半導体チップ１が半田層４によって半田付され
る。半導体チップ１はアルミニウムなどのワイヤ５によ
って配線部分の金属膜３ａと接続され、各接続部は半田
あるいは銀ロウで接合されている。半導体チップ１と絶
縁板２で構成される部分及び次に述べる充填樹脂、樹脂
ケースを含めてモジュール６と称す。FIG. 1 is a sectional view showing an embodiment of the present invention. 2 and 3 are views taken along arrows II-II and II in FIG. 1, respectively.
It is an I-III arrow line view. The plurality of semiconductor chips 1 are insulating plates 2
It is mounted on. The material of the insulating plate 2 is, for example, aluminum nitride (AlN). A metal film 3a is formed on the front surface of the insulating plate 2 (the surface on which the semiconductor chip is mounted) by a method such as sputtering or vapor deposition on the mounting area of the semiconductor chip or in the wiring portion. The metal film 3b is formed on the entire surface by the method. On the front surface side, the metal film 3a and the semiconductor chip 1 are soldered by the solder layer 4. The semiconductor chip 1 is connected to the metal film 3a in the wiring portion by a wire 5 made of aluminum or the like, and the respective connection portions are joined by solder or silver solder. A portion including the semiconductor chip 1 and the insulating plate 2 and a filling resin and a resin case described below are referred to as a module 6.

【００２５】モジュール６の構成においては、半導体チ
ップ１およびその周囲をカバーするように充填樹脂７が
充填され、そして充填樹脂７はその側面が樹脂ケース８
で囲われて保護されている。樹脂ケース８、充填樹脂７
の各所には穴９が設けてあり、これら穴９の中にコイル
ばね１０が挿入される。モジュール６とこのモジュール
６の下に取り付けるヒートシンク１４を結合するため
に、モジュール６の上面側には押さえ板として支持治具
１１が設置される。支持治具１１は、モジュール６を挟
み、４角でヒートシンク１４にボルト１３により締め付
けられる。支持治具１１の下面でコイルばね１０と当接
する箇所に突起１２を設け、これがコイルばね１０の穴
に差し込まれる。ヒートシンク１４は、冷却フィンが装
着されたり、内部に水などの流路が設けられたり、ヒー
トパイプなどが設けられ冷却の役目をする。In the structure of the module 6, the filling resin 7 is filled so as to cover the semiconductor chip 1 and its periphery, and the side surface of the filling resin 7 is the resin case 8.
It is surrounded by and protected. Resin case 8, filling resin 7
Holes 9 are provided in each of the positions, and the coil spring 10 is inserted into these holes 9. In order to connect the module 6 and the heat sink 14 attached below the module 6, a support jig 11 is installed as a pressing plate on the upper surface side of the module 6. The support jig 11 sandwiches the module 6 and is fastened to the heat sink 14 at the four corners with bolts 13. Protrusions 12 are provided on the lower surface of the support jig 11 at positions where they come into contact with the coil spring 10, and these are inserted into the holes of the coil spring 10. The heat sink 14 is provided with cooling fins, a flow path for water or the like is provided therein, a heat pipe or the like is provided, and serves as a cooling.

【００２６】絶縁板２の裏面に形成された金属膜３ｂと
ヒートシンク１４上面との間には、絶縁板２を挟んで半
導体チップ１とほぼ相対する領域に、熱伝導グリース１
５が塗布されており、支持治具１１をボルト１３により
ヒートシンク１４に締め付けるときに、熱伝導グリース
１５が締め付けられる。ボルト１３の締め付け量は、支
持治具１１とヒートシンク１４間にあってボルト１３の
周囲に配置した円筒状のスペーサ１６で決める。このと
き、コイルばね１０の長さがある設定値に設定され、絶
縁板２をばね力でヒートシンク１４に押し付ける押し付
け力が一定値に設定される。一方、熱伝導グリース１５
は押し付け力により薄くなるが、はじめに（押し付ける
前に）塗布された広さよりも広がって同時に薄くなる。
図２に示すように、絶縁板２表面に形成された配線部の
金属膜３ａ間は他のワイヤ５ｂにより接続され、最終的
には電極１７ａ、１７ｂ、１７ｃ、１７ｄと半導体チッ
プ１とが電気的に接続されることになる。Between the metal film 3b formed on the back surface of the insulating plate 2 and the upper surface of the heat sink 14, a heat conductive grease 1 is formed in a region substantially facing the semiconductor chip 1 with the insulating plate 2 interposed therebetween.
5 is applied, and when the support jig 11 is fastened to the heat sink 14 with the bolt 13, the thermal conductive grease 15 is fastened. The tightening amount of the bolt 13 is determined by a cylindrical spacer 16 which is located between the support jig 11 and the heat sink 14 and is arranged around the bolt 13. At this time, the length of the coil spring 10 is set to a certain set value, and the pressing force for pressing the insulating plate 2 against the heat sink 14 by the spring force is set to a constant value. On the other hand, the thermal grease 15
Is thinned by the pressing force, but it spreads out more than the area originally applied (before pressing) and becomes thin at the same time.
As shown in FIG. 2, the metal film 3a of the wiring portion formed on the surface of the insulating plate 2 is connected by another wire 5b, and finally the electrodes 17a, 17b, 17c, 17d and the semiconductor chip 1 are electrically connected. Will be connected.

【００２７】なお、コイルばね１０、ボルト１３の数は
任意に選べるが、本実施の形態では図２に示すように、
コイルばね１０は樹脂ケース８の前辺部(図２で上側)に
３個(１０ａ)、後辺部(図２で下側)に３個(１０ｂ)並
び、中央部に縦に３個(１０ｃ）並ぶ。ボルト１３は支
持治具１１の４角に４個設けられる。中央部のコイルば
ね１０ｃはなくてもよいが設けた方が熱伝導グリース１
５をより薄くできる。その場合、コイルばね１０ａ、１
０ｂのばね定数を、コイルばね１０ｃのばね定数よりも
大きくなるようにすると良い。ボルト１３を締め付ける
とき、先にコイルばね１０ａ、１０ｂ側、つまり樹脂ケ
ース８の前辺側と後辺側が加圧され、後でコイルばね１
０ｃ、つまり中央部が加圧されることになる。先に樹脂
ケース８の前辺側と後辺側が加圧されると、半導体チッ
プ１に絶縁板２を挟んで相対する面に塗布された熱伝導
グリース１５はほぼ均一に加圧され、次に中央部側が加
圧されて、さらに一層熱伝導グリース１５が均一に加圧
され、一様な薄い厚さに制御される。ところが逆の場
合、つまり、先に中央部側すなわちコイルばね１０ｃが
加圧されると、コイルばね１０ｃの中央部をはさんで左
右の熱伝導グリース１５ａ、１５ｂの厚みが異なる。左
側の熱伝導グリース１５ａが薄くなると、右側の熱伝導
グリース１５ｂが厚くなり、左側の熱伝導グリース１５
ａが厚くなると、右側の熱伝導グリース１５ｂが薄くな
る。この状態から前辺側と後辺側のコイルばね１０ａ、
１０ｂの締め付けが始まるとコイルばね１０ａ、１０ｂ
が締め付けられる前の熱伝導グリース１５ａ、１５ｂの
厚さの影響を受けて熱伝導グリース１５ａ、１５ｂの厚
さを均一に薄くすることができない。このような作用を
もたせるため、図３に示すように支持治具１１はアルフ
ァベットのＨの形状をしている。Although the numbers of the coil springs 10 and the bolts 13 can be arbitrarily selected, in the present embodiment, as shown in FIG.
Three coil springs 10 (10a) are arranged on the front side (upper side in FIG. 2) of the resin case 8, three (10b) are arranged on the rear side (lower side in FIG. 2), and three are arranged vertically in the center ( 10c) Line up. Four bolts 13 are provided at four corners of the support jig 11. The central coil spring 10c may be omitted, but it is better to provide the coil spring 10c.
5 can be made thinner. In that case, the coil springs 10a, 1
The spring constant of 0b may be made larger than that of the coil spring 10c. When tightening the bolt 13, the coil springs 10a, 10b side, that is, the front side and the rear side of the resin case 8 are pressed first, and the coil spring 1 is pressed later.
0c, that is, the central portion is pressurized. When the front side and the rear side of the resin case 8 are pressed first, the heat conductive grease 15 applied to the opposite surfaces of the semiconductor chip 1 with the insulating plate 2 interposed therebetween is pressed almost uniformly, and The central portion side is pressed, and the heat conductive grease 15 is further pressed uniformly to control the thickness to be uniform. However, in the opposite case, that is, when the central portion side, that is, the coil spring 10c is first pressurized, the thicknesses of the left and right thermal conductive greases 15a and 15b sandwich the central portion of the coil spring 10c are different. When the left side heat conducting grease 15a becomes thin, the right side heat conducting grease 15b becomes thicker, and the left side heat conducting grease 15a
As a becomes thicker, the heat conducting grease 15b on the right side becomes thinner. From this state, the coil springs 10a on the front side and the rear side,
When tightening of 10b starts, coil springs 10a, 10b
The thickness of the heat conductive greases 15a and 15b cannot be made uniform due to the influence of the thickness of the heat conductive greases 15a and 15b before being tightened. In order to have such an action, the supporting jig 11 is in the shape of the letter H as shown in FIG.

【００２８】なお、図１では、モジュール６をヒートシ
ンク１４に締め付けた半導体装置を示すが、この他に別
の半導体装置として、モジュール６をＣｕ製モジュール
基板上に構成してこれをヒートシンク１４に締め付けた
ものもある。この別の半導体装置では、モジュール基板
とヒートシンク１４間に熱伝導グリース１５が入ってい
る。Although FIG. 1 shows a semiconductor device in which the module 6 is fastened to the heat sink 14, another semiconductor device, in which the module 6 is formed on a Cu module substrate, is fastened to the heat sink 14. There are also things. In this other semiconductor device, the heat conductive grease 15 is contained between the module substrate and the heat sink 14.

【００２９】熱伝導グリース１５を塗布し、それから締
め付け加圧により熱伝導グリースの付着面積を拡がらす
場合の望ましい範囲を示す。熱伝導グリースを薄く付着
させることが可能ならば、モジュール基板あるいは絶縁
板全面に拡げても良いが、全面に拡げようとすると熱伝
導グリースの厚みが厚くなってしまう。熱伝導グリース
を塗布する面積はチップ面積とほぼ同じであることが製
作上望ましい。The desirable range in the case where the heat conductive grease 15 is applied and then the adhesion area of the heat conductive grease is expanded by tightening and pressing is shown. If the thermal conductive grease can be thinly adhered, it may be spread over the entire surface of the module substrate or the insulating plate, but if the thermal conductive grease is attempted to be spread over the entire surface, the thickness of the thermal conductive grease becomes thick. It is desirable in manufacturing that the area to which the thermal grease is applied is almost the same as the chip area.

【００３０】図４、図５にモジュール基板、絶縁板にお
ける加圧による熱伝導グリースの付着面積の拡がり率
（グリース面積拡がり率）と熱抵抗の関係を示す。グリ
ース面積拡がり率（Ａ）は、最初のグリース塗布面積：
Ｓ0、加圧で拡がったグリース付着面積：Ｓとして、Ｓ
／Ｓ0と定義する。熱抵抗は、塗布した熱伝導グリース
を加圧して順次に付着面積を拡大する度に熱抵抗を測定
し、その抵抗値がそれ以下に低下しない最小抵抗値を基
準値１として、基準値に対する割合（Ｂ）で示した。図
４、５で、グリース面積拡がり率（Ａ）を横軸に、熱抵
抗の割合Ｂを縦軸に示す。図４は、モジュール基板が銅
で厚さが３ｍｍの場合の例であり、グリース面積拡がり
率が８、すなわち元の塗布面積から８倍程度拡大した時
に熱抵抗は最小値に達する。図５は絶縁板が窒化アルミ
ニウムで厚さが０．５ｍｍの場合の例であり、グリース
面積拡がり率が４、すなわち元の塗布面積から４倍程度
拡大した時に熱抵抗は最小値に達する。FIGS. 4 and 5 show the relationship between the spread rate of the adhesion area of the heat conductive grease (grease area spread rate) due to the pressure on the module substrate and the insulating plate and the thermal resistance. The grease area spread ratio (A) is the first grease application area:
S 0 , grease adhesion area spread by pressure: S, S
/ S 0 . The thermal resistance is measured by measuring the thermal resistance each time the applied thermal conductive grease is pressed and the adhesion area is expanded in sequence, and the minimum resistance value at which the resistance value does not drop below that is set as the reference value 1, and the ratio to the reference value. It is shown in (B). 4 and 5, the grease area spread rate (A) is shown on the horizontal axis, and the thermal resistance ratio B is shown on the vertical axis. FIG. 4 shows an example in which the module substrate is made of copper and has a thickness of 3 mm, and the thermal resistance reaches the minimum value when the grease area expansion rate is 8, that is, when the original application area is expanded by about 8 times. FIG. 5 shows an example in which the insulating plate is made of aluminum nitride and has a thickness of 0.5 mm, and the thermal resistance reaches the minimum value when the grease area expansion ratio is 4, that is, when the original application area is expanded by about 4 times.

【００３１】図６は、図１に示した半導体モジュール６
を３個、ひとつのヒートシンク１４上に並べたものであ
る。半導体モジュール６がＩＧＢＴ（絶縁ゲート型バイ
ポーラトランジスター）などのパワー素子の場合には電
力用モータの回転数などを制御するのでＵ、Ｖ、Ｗ相の
３相分が必要になる。FIG. 6 shows the semiconductor module 6 shown in FIG.
3 are arranged on one heat sink 14. When the semiconductor module 6 is a power element such as an IGBT (insulated gate bipolar transistor), the number of U, V, and W phases is required because the rotation speed of the power motor is controlled.

【００３２】図７に、熱伝導グリースの塗布に用いる型
板を示す。型板は半導体チップ１の配列と同じように、
開口１９を設けた、厚みが薄い金属板（テンプレート１
８と称する）である。このテンプレート１８をモジュー
ル基板面、あるいはヒートシンク面に当てて、熱伝導グ
リースを塗布する。その後に、テンプレート１８を取り
除くと図７の開口１９に相当する部分にのみ熱伝導グリ
ースを残すことができる。このテンプレートは薄いほど
良いが、実用的には０．５〜０．０５ｍｍの厚みが良
い。特に０．０５〜０．１５ｍｍが最適である。テンプ
レート１８の材質は金属でなくても、固体物の板状のも
ので良い。FIG. 7 shows a template used for applying the heat conductive grease. The template is the same as the arrangement of the semiconductor chips 1,
A thin metal plate with an opening 19 (template 1
8). The template 18 is applied to the surface of the module substrate or the surface of the heat sink, and thermal conductive grease is applied. After that, when the template 18 is removed, the heat conductive grease can be left only in the portion corresponding to the opening 19 in FIG. The thinner this template is, the better, but practically, the thickness is preferably 0.5 to 0.05 mm. Especially, 0.05 to 0.15 mm is optimal. The material of the template 18 is not limited to metal, but may be a solid plate.

【００３３】図８は本発明の他の実施の形態となる半導
体装置を示す。この半導体装置は、図１に示す半導体装
置のように絶縁板２の裏面全面に金属膜３ｂを設けるの
ではなく、絶縁板２の裏面で、半導体チップに相対する
領域のみに金属膜３ｂを設ける。この場合には、熱伝導
グリース１５ａ、１５ｂが加圧されて拡がったとき、金
属膜３ｂを設けていない部分へ熱伝導グリースが拡がっ
ていく空間があるため、金属膜３ｂのところの熱伝導グ
リース１５ａ、１５ｂをより一層薄くすることができ
る。FIG. 8 shows a semiconductor device according to another embodiment of the present invention. In this semiconductor device, the metal film 3b is not provided on the entire back surface of the insulating plate 2 unlike the semiconductor device shown in FIG. 1, but the metal film 3b is provided only on the area on the back surface of the insulating plate 2 facing the semiconductor chip. . In this case, when the thermal conductive greases 15a and 15b are spread by being pressurized, there is a space where the thermal conductive grease spreads to a portion where the metal film 3b is not provided, so that the thermal conductive grease at the metal film 3b is present. The thickness of 15a and 15b can be made even thinner.

【００３４】図９、図１０は本発明のさらに他の実施の
形態を示す。モジュール６の３相分が、熱伝導グリース
１５を介してヒートシンク１４の上に搭載されている。
その場合のヒートシンク１４の構造を示している。図１
０は、図９に示すヒートシンク１４のＸ−Ｘ断面図であ
る。ヒートシンク１４内には、矩形状の複数の流路２０
が並行に設けられ、複数流路２０の両端にはヘッダ２１
ａ、２１ｂが設けられ、さらにヘッダ２１ａには冷媒２
４の流入口２２が、ヘッダ２１ｂには流路２０を流れた
冷媒２４の流出口２３が設けられている。流入口２２か
ら入った冷媒２４がヘッダ２１ａにおいて、各流路２０
に分かれて流れ、ヘッダ２１ｂでまとめられ、流出口２
３から出ていく。モジュール６から熱伝導グリース１５
を伝わった熱は、先ずヒートシンク１４に伝わり、最終
的には冷媒２４に伝わり流出口２３から流出される。冷
媒２４は、水、あるいは不凍液であるパーフロロカーボ
ン液、エチレングリコール水溶液などを用いると良い。9 and 10 show another embodiment of the present invention. Three phases of the module 6 are mounted on the heat sink 14 via the heat conductive grease 15.
The structure of the heat sink 14 in that case is shown. Figure 1
0 is a cross-sectional view of the heat sink 14 shown in FIG. Inside the heat sink 14, a plurality of rectangular flow paths 20 are provided.
Are provided in parallel, and headers 21 are provided at both ends of the plurality of flow paths 20.
a and 21b are provided, and the header 21a further includes the refrigerant 2
4 and an outlet 23 for the refrigerant 24 flowing through the flow path 20 are provided in the header 21b. In the header 21a, the refrigerant 24 that has entered from the inflow port 22 passes through each of the flow paths 20.
Flow into two parts, which are combined by the header 21b and the outlet 2
Go out from 3. Module 6 to thermal grease 15
The heat transmitted to the heat sink 14 is first transmitted to the heat sink 14, and finally to the refrigerant 24 to be discharged from the outlet 23. As the refrigerant 24, it is preferable to use water, a perfluorocarbon liquid which is an antifreezing liquid, an ethylene glycol aqueous solution, or the like.

【００３５】図１１は本発明のさらに他の実施の形態を
示す。ヒートシンク１４の構造に関する。今までの説明
のように、半導体チップ１からの熱は、あまり拡がらず
に熱伝導グリース１５を通過してヒートシンク１４へ伝
えられる。従って冷却効率を上げようとすると半導体チ
ップ１に相対する部分の伝熱を良くすれば良い。図１１
の構造は半導体チップ１と相対するところにノズル２５
を設けて冷媒２４を噴流状に衝突させ伝熱性能を向上さ
せる。ヒートシンク１４は表裏厚さ方向に区画された２
つの室を有し、一つは裏側に位置する外側の室２６で、
他は表側に位置しモジュール６が設置される内側の室２
７である。室２６と室２７間の隔壁には半導体チップ１
の配置と相対するところに開口が設けられて、この開口
でノズル２５を形成する。外側の室２６の側壁には冷媒
２４を導入する流入口２２が、内側の室２７の側壁に流
出口２３が設けられ、流入口２２から流入した冷媒２４
は、流出口２３から流出する。冷媒２４は、外側の室２
６からノズル２５を通過するとき、ノズル２５でしぼら
れるため高速流となる。この高速流の冷媒２４は、内側
の室２７でモジュール６側の壁面２８に噴流２９となっ
て衝突するため、壁面２８の半導体チップ１に相対する
面積部に高い伝熱性能が得られる。さらに本実施の形態
では、壁面２８で半導体チップ１の配列と相対する部位
には凹部３０を設ける。これを設けることにより噴流２
９の流れがスムーズに行われる。さらに、この凹部３０
でヒートシンク１４の壁が薄くなるため、熱伝導グリー
ス１５から噴流２９までの伝熱が一層向上する。FIG. 11 shows still another embodiment of the present invention. It relates to the structure of the heat sink 14. As described above, the heat from the semiconductor chip 1 is transferred to the heat sink 14 through the heat conductive grease 15 without spreading much. Therefore, in order to increase the cooling efficiency, the heat transfer in the portion facing the semiconductor chip 1 should be improved. Figure 11
The structure of the nozzle 25
To improve the heat transfer performance by colliding the refrigerant 24 in a jet shape. The heat sink 14 is divided into the front and back thickness directions.
There are two chambers, one is the outer chamber 26 located on the back side,
The other is the inner chamber 2 located on the front side and in which the module 6 is installed
7 The semiconductor chip 1 is provided on the partition wall between the chambers 26 and 27.
An opening is provided at a position opposite to the arrangement described above, and the nozzle 25 is formed by this opening. An inlet 22 for introducing the refrigerant 24 is provided on a side wall of the outer chamber 26, and an outlet 23 is provided on a side wall of the inner chamber 27, so that the refrigerant 24 flowing in from the inlet 22 is provided.
Flows out of the outlet 23. The refrigerant 24 is in the outer chamber 2
When passing through the nozzle 25 from the nozzle 6, the nozzle 25 squeezes the nozzle to provide a high-speed flow. The high-speed refrigerant 24 collides with the wall surface 28 on the module 6 side in the inner chamber 27 as a jet flow 29, so that high heat transfer performance can be obtained in the area portion of the wall surface 28 facing the semiconductor chip 1. Further, in the present embodiment, the recess 30 is provided in the portion of the wall surface 28 that faces the arrangement of the semiconductor chips 1. By providing this, jet 2
The flow of 9 is performed smoothly. Furthermore, this recess 30
Since the wall of the heat sink 14 is thinned, heat transfer from the heat conductive grease 15 to the jet 29 is further improved.

【００３６】図１２および図１３に、図１１に示すもの
とは異なるヒートシンクの他の構造を示す。図１３は図
１２のXIII−XIII断面図である。このヒートシンクは、
外側の室２６と内側の室２７間の隔壁に形成した開口部
に、室２７側からノズル３３をねじこみ、ノズル３３に
より噴流２９を生ずる構造とする。さらに凹部３０の壁
厚の薄い部位３１には中央部に空間を設け、中央部から
放射状に冷却フィン３２を取り付ける。中央部には噴流
２９が直接に衝突する。この構造にすることにより、噴
流効果が大きくなり、さらに冷却フィン３２の取り付け
により伝熱性能が向上する。12 and 13 show another structure of the heat sink different from that shown in FIG. FIG. 13 is a sectional view taken along line XIII-XIII in FIG. This heat sink
The nozzle 33 is screwed into the opening formed in the partition wall between the outer chamber 26 and the inner chamber 27 from the chamber 27 side, and a jet 29 is generated by the nozzle 33. Further, a space is provided in the central portion of the recess 31 where the wall thickness is thin, and cooling fins 32 are attached radially from the central portion. The jet 29 directly collides with the central portion. With this structure, the jet effect is increased and the heat transfer performance is improved by attaching the cooling fins 32.

【００３７】図１４、図１５にヒートシンクのさらに別
の構造を示す。図１５は図１４のXV-XV矢視図である。
図１２の場合と同様に内側の室２７側からノズル３３を
ねじこむ構造であるが、このノズル３３は噴流２９が流
出するノズル先端部３４の断面が長円形状である。そし
て、冷却フィン３２は複数個が平行に並んでいる。ノズ
ル先端部３４がフィン間に差し込まれる構造となり、長
円形のノズル先端部の長軸を軸にして、左右にフィン列
３５ａ、３５ｂが並んでいる。ノズル先端部３４から出
た噴流２９は左右に分かれて３５ａ、３５ｂのフィン列
の間を流れる。半導体チップ１は一般に正方形、長方形
などの矩形状をしているため、冷媒で冷却する面も矩形
状が良く、ノズル先端部３４を長円形状にしてフィン列
３５ａ、３５ｂを平行フィン形状の列にすることによ
り、矩形状で高い冷却性能面が得られる。14 and 15 show another structure of the heat sink. FIG. 15 is a view on arrow XV-XV in FIG.
As in the case of FIG. 12, the structure is such that the nozzle 33 is screwed in from the inner chamber 27 side, but the nozzle tip portion 34 from which the jet 29 flows out has an oval cross section. A plurality of cooling fins 32 are arranged in parallel. The nozzle tip portion 34 is inserted between the fins, and fin rows 35a and 35b are arranged on the left and right with the long axis of the oval nozzle tip portion as an axis. The jet 29 discharged from the nozzle tip portion 34 is divided into right and left and flows between the fin rows of 35a and 35b. Since the semiconductor chip 1 is generally in the shape of a rectangle such as a square or a rectangle, the surface to be cooled by the coolant is also preferably in a rectangular shape, and the nozzle tip portion 34 has an elliptical shape, and the fin rows 35a and 35b have parallel fin shapes. By this, a rectangular shape and a high cooling performance surface can be obtained.

【００３８】[0038]

【発明の効果】本発明によれば、モジュールの絶縁板と
ヒートシンクとの間に設ける熱伝導グリースの厚みを均
一で、しかも薄く塗布することが可能となる。熱伝導グ
リースが薄くなるため、半導体チップからヒートシンク
までの熱抵抗を小さくできる。これにより絶縁板、モジ
ュール基板の材質を、半導体チップの材料であるシリコ
ンの線膨張係数に近い材質に選ぶことが可能となる。こ
れに相当する材料は窒化アルミニウム、銅モリブデンな
どであるが、これらは熱伝導率が小さく、熱の伝わりが
悪いが、前述のように熱伝導グリース部の熱抵抗を小さ
くできるため、材質を任意に選べることになる。また、
熱応力を小さくするため、絶縁板、モジュール基板の厚
みを小さくしたいが、厚みが小さいと従来技術では熱伝
導グリースが厚くなってしまう。本発明により熱伝導グ
リースを薄くでき、絶縁板、モジュール基板の厚みを薄
くすることが可能になる。According to the present invention, it is possible to apply the heat conducting grease provided between the insulating plate of the module and the heat sink with a uniform thickness and a thin thickness. Since the thermal conductive grease becomes thin, the thermal resistance from the semiconductor chip to the heat sink can be reduced. This makes it possible to select the material of the insulating plate and the module substrate as a material having a linear expansion coefficient close to that of silicon, which is the material of the semiconductor chip. Materials equivalent to this are aluminum nitride, copper molybdenum, etc., but these have low thermal conductivity and poor heat transfer, but as mentioned above, the thermal resistance of the thermal grease part can be reduced, so the material can be selected arbitrarily. You will be able to choose. Also,
In order to reduce the thermal stress, it is desired to reduce the thickness of the insulating plate and the module substrate, but if the thickness is small, the thermal conductive grease will be thick in the conventional technique. According to the present invention, the heat conductive grease can be thinned, and the insulating plate and the module substrate can be thinned.

【００３９】また、ヒートシンクに冷却手段を設けるこ
とにより、ヒートシンク側の伝熱促進を図れるため、全
体として半導体チップと冷媒との間の熱抵抗を小さくで
きる。このことは、モジュールを構成する各部の温度を
小さくできることを示しており、これと各部の熱応力を
小さくできることの２つの要因は、モジュールの破損を
小さく押さえることを可能とし、モジュールの長寿命化
（長い期間の使用）を可能にする。Further, by providing the heat sink with the cooling means, heat transfer on the heat sink side can be promoted, so that the thermal resistance between the semiconductor chip and the coolant can be reduced as a whole. This indicates that the temperature of each part constituting the module can be reduced, and the two factors of this and the reduction of the thermal stress of each part are that the damage of the module can be suppressed to be small and the life of the module can be extended. (Use for a long period of time).

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の一実施の形態なる半導体装置の断面図
である。FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

【図２】図１のII−II 矢視図である。FIG. 2 is a view taken along the line II-II in FIG.

【図３】図１のIII−III 矢視図である。FIG. 3 is a view taken along the line III-III in FIG.

【図４】Ｃｕ板における熱伝導グリースの付着面積と熱
抵抗の特性を示す図である。FIG. 4 is a diagram showing characteristics of an adhesion area of thermal conductive grease and thermal resistance on a Cu plate.

【図５】ＡｌＮ板における熱伝導グリースの付着面積と
熱抵抗の特性を示す図である。FIG. 5 is a diagram showing characteristics of an adhesion area of heat conductive grease and heat resistance on an AlN plate.

【図６】ヒートシンク上に設けた３個の半導体モジュー
ルの配列を示す平面図である。FIG. 6 is a plan view showing an arrangement of three semiconductor modules provided on a heat sink.

【図７】熱伝導グリース塗布用の型板を示す図である。FIG. 7 is a view showing a template for applying heat conductive grease.

【図８】本発明の他の実施の形態である半導体装置の断
面図である。FIG. 8 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図９】本発明のさらに他の実施の形態である半導体装
置の断面図である。FIG. 9 is a sectional view of a semiconductor device according to still another embodiment of the present invention.

【図１０】図９のX−X断面図である。10 is a sectional view taken along line XX of FIG.

【図１１】本発明のさらに他の実施の形態である半導体
装置の断面図である。FIG. 11 is a sectional view of a semiconductor device according to still another embodiment of the present invention.

【図１２】ヒートシンクの冷却構造を示す断面図であ
る。FIG. 12 is a cross-sectional view showing a cooling structure of a heat sink.

【図１３】図１２のXIII−XIII 矢視図である。FIG. 13 is a view on arrow XIII-XIII in FIG.

【図１４】ヒートシンクの他の冷却構造を示す断面図で
ある。FIG. 14 is a cross-sectional view showing another cooling structure of the heat sink.

【図１５】図１４のXV−XV 断面図である。15 is a sectional view taken along line XV-XV in FIG.

【符号の説明】[Explanation of symbols]

１ 半導体チップ ２ 絶縁板 ３ａ、３ｂ 金属膜 ４ 半田層 ５ａ、５ｂ ワイヤ ６ モジュール ７ 充填樹脂 ８ 樹脂ケース ９ 穴 １０ コイルばね １１ 支持治具 １２ 突起 １３ ボルト １４ ヒートシンク １５ 熱伝導グリース １６ スペーサ １７ａ、１７ｂ、１７ｃ、１７ｄ 電極 １８ テンプレート １９ 開口 ２０ 流路 ２１ａ、２１ｂ ヘッダ ２２ 流入口 ２３ 流出口 ２４ 冷媒 ２５ ノズル ２６ 外側の室 ２７ 内側の室 ２８ 壁面 ２９ 噴流 ３０ 凹部 ３１ 薄壁の部位 ３２ 冷却フィン ３３ ノズル ３４ ノズル先端部 ３５ａ、３５ｂ フィン列 1 semiconductor chip 2 insulating plate 3a, 3b Metal film 4 Solder layer 5a, 5b wire 6 modules 7 Filling resin 8 resin case 9 holes 10 coil spring 11 Support jig 12 protrusions 13 volt 14 heat sink 15 Thermal grease 16 spacers 17a, 17b, 17c, 17d electrodes 18 templates 19 opening 20 flow paths 21a, 21b header 22 Inlet 23 Outlet 24 Refrigerant 25 nozzles 26 Outer chamber 27 Inner chamber 28 walls 29 jets 30 recess 31 Thin-walled part 32 cooling fins 33 nozzles 34 Nozzle tip 35a, 35b fin row

───────────────────────────────────────────────────── フロントページの続き (72)発明者 山村 博久 茨城県ひたちなか市大字高場2520番地 株式会社 日立製作所 自動車機器事業 部内 (72)発明者 藤枝 信男 茨城県土浦市神立町502番地 株式会社 日立製作所 機械研究所内 (56)参考文献 特開 平５−90487（ＪＰ，Ａ) 特開 平８−236667（ＪＰ，Ａ) 特開 平７−211825（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 23/36 H01L 25/07 H01L 25/18 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hirohisa Yamamura 2520 Takaba, Hitachinaka City, Ibaraki Prefecture Hitachi, Ltd. Automotive Equipment Division (72) Inventor Nobuo Fujieda 502 Kintatemachi, Tsuchiura City, Ibaraki Hitachi, Ltd. (56) References JP-A-5-90487 (JP, A) JP-A-8-236667 (JP, A) JP-A-7-211825 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/36 H01L 25/07 H01L 25/18

Claims (18)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 複数の半導体チップを上面に搭載し下面
に金属膜が形成された絶縁板と、該絶縁板の下面側に配
置されたヒートシンクと、前記金属膜と前記ヒートシン
ク間に装填された熱伝導グリースとを備え、前記絶縁板
が前記ヒートシンクに締め付けられて構成される半導体
装置において、 前記熱伝導グリースは、前記半導体チップそれぞれに相
対する領域およびその近傍に、島状に装填されているこ
とを特徴とする半導体装置。1. An insulating plate having a plurality of semiconductor chips mounted on the upper surface thereof and a metal film formed on the lower surface thereof, a heat sink arranged on the lower surface side of the insulating plate, and a heat sink mounted between the metal film and the heat sink. In a semiconductor device comprising a heat conductive grease and the insulating plate being fastened to the heat sink, the heat conductive grease is loaded in an island shape in a region facing each of the semiconductor chips and in the vicinity thereof. A semiconductor device characterized by the above. 【請求項２】 前記熱伝導グリースの島状領域は前記半
導体チップの平面積の４〜８倍としたことを特徴とする
請求項１記載の半導体装置。2. The semiconductor device according to claim 1, wherein the island area of the heat conductive grease is 4 to 8 times the plane area of the semiconductor chip. 【請求項３】 複数の半導体チップを上面に搭載し下面
に金属膜を形成された四角形の絶縁板、該絶縁板の上面
側を、前記半導体チップを含めて覆う樹脂及び該樹脂の
側面を囲むケースからなるモジュールと、該モジュール
の絶縁板の下面側に配置された四角形板状のヒートシン
クと、前記絶縁板の金属膜と前記ヒートシンク間に装填
された熱伝導グリースとを備え、前記モジュールを前記
ヒートシンクに締め付けて構成される半導体装置におい
て、 前記樹脂中で隣合う前記半導体チップ間の適宜箇所及び
前記ケースの壁の適宜箇所に上下に穿設した穴にそれぞ
れ挿入したバネと、該バネの上端を押圧し、前記ヒート
シンクとの間に前記モジュールを挟んで前記ヒートシン
クの４角にボルトを介して締め付けられた押さえ板とを
設け、かつ前記熱伝導グリースは、前記半導体チップそ
れぞれに相対する領域およびその近傍に、島状に装填さ
れていることを特徴とする半導体装置。3. A rectangular insulating plate having a plurality of semiconductor chips mounted on the upper surface and a metal film formed on the lower surface, a resin covering the upper surface of the insulating plate including the semiconductor chips, and a side surface of the resin. The module comprising a case, a rectangular plate-shaped heat sink arranged on the lower surface side of the insulating plate of the module, and a heat conductive grease loaded between the metal film of the insulating plate and the heat sink, In a semiconductor device configured to be fastened to a heat sink, springs inserted respectively into appropriate holes between adjacent semiconductor chips in the resin and holes provided at appropriate places on a wall of the case, and upper ends of the springs. And pressing plates which are clamped with bolts at four corners of the heat sink with the module sandwiched between the heat sink and the front, and Thermal grease, the on opposite region and the vicinity thereof in the semiconductor chip, respectively, and wherein a loaded in the islands. 【請求項４】 前記熱伝導グリースの島状領域は前記半
導体チップの平面積の４〜８倍としたことを特徴とする
請求項３記載の半導体装置。4. The semiconductor device according to claim 3, wherein the island-shaped region of the thermal conductive grease is 4 to 8 times the plane area of the semiconductor chip. 【請求項５】 前記ボルト近傍で前記押さえ板と前記ヒ
ートシンク間にスペーサを設け、該スペーサにより前記
バネの圧縮量を規定したことを特徴とする請求項３また
は４に記載の半導体装置。5. The semiconductor device according to claim 3, wherein a spacer is provided between the pressing plate and the heat sink near the bolt, and the amount of compression of the spring is defined by the spacer. 【請求項６】 前記バネは、前記モジュールの相対する
２辺にそれぞれ沿って配列された２群と、該２群の配列
の中央で該２群の配列に直交して挟まれるように配列さ
れた１群からなることを特徴とする請求項３または４に
記載の半導体装置。6. The spring is arranged so as to be sandwiched between two groups arranged along two opposite sides of the module and at a center of the array of the two groups so as to be orthogonal to the array of the two groups. 5. The semiconductor device according to claim 3, wherein the semiconductor device comprises one group. 【請求項７】 前記１群のばねのばね定数は、前記２群
のばねのそれより大きいことを特徴とする請求項６の記
載の半導体装置。7. The semiconductor device according to claim 6, wherein a spring constant of the first group of springs is larger than that of the second group of springs. 【請求項８】 前記ヒートシンクは、内部に、並行する
複数の流路と、該流路の両端に形成されたヘッダとから
なる冷却手段を有することを特徴とする請求項１ないし
４いずれかに記載の半導体装置。8. The heat sink has a cooling means therein, which comprises a plurality of parallel flow passages and headers formed at both ends of the flow passages. The semiconductor device described. 【請求項９】 前記ヒートシンクは、該内部に、隔壁を
介して仕切られた上下２室と、該下室に冷却媒体を導入
する流入口と、前記隔壁で前記半導体チップに相対する
位置に形成され前記下室からの冷却媒体を通す孔と、前
記上室から前記冷却媒体を排出し前記流入口とは反対側
に位置する排出口とからなる冷却手段を有することを特
徴とする請求項１ないし４いずれかに記載の半導体装
置。9. The heat sink is formed inside the upper and lower chambers partitioned by a partition wall, an inlet for introducing a cooling medium into the lower chamber, and the partition wall at a position facing the semiconductor chip. 2. A cooling means comprising a hole for passing a cooling medium from the lower chamber and an outlet for discharging the cooling medium from the upper chamber and located on the opposite side of the inlet. 5. The semiconductor device according to any one of 4 to 4. 【請求項１０】 前記隔壁の孔に円形のノズルを装着
し、該ノズルが向く前記上室の天井部分に凹みを設けた
ことを特徴とする請求項９記載の半導体装置。10. The semiconductor device according to claim 9, wherein a circular nozzle is attached to the hole of the partition wall, and a recess is provided in a ceiling portion of the upper chamber facing the nozzle. 【請求項１１】 前記凹みで前記ノズルの対向する領域
から外側に放射状にフィンを取り付けたことを特徴とす
る請求項１０記載の半導体装置。11. The semiconductor device according to claim 10, wherein fins are radially attached to the outside of the region where the nozzles face each other in the recesses. 【請求項１２】 前記隔壁の孔に開口形状が長円形のノ
ズルを装着し、該ノズルが向く前記上室の天井部分に凹
みを設け、該凹みで前記ノズルの開口に対向する領域か
ら外側に前記長円形に対して交叉する方向に延びるフィ
ンを該各長辺にそって並列して設けたことを特徴とする
請求項９記載の半導体装置。12. A nozzle having an elliptical opening shape is attached to a hole of the partition wall, and a recess is provided in a ceiling portion of the upper chamber to which the nozzle faces, and an outside is provided from a region facing the opening of the nozzle by the recess. 10. The semiconductor device according to claim 9, wherein fins extending in a direction intersecting with the oval are provided in parallel along the respective long sides. 【請求項１３】 複数の半導体チップを上面に搭載し下
面に金属膜を形成された四角形の絶縁板、該絶縁板の上
面側を前記半導体チップを含めて覆う樹脂及び該樹脂の
側面を囲むケースからなるモジュールと、該モジュール
の絶縁板の下面側に配置された四角形板状のヒートシン
クと、前記絶縁板の金属膜と前記ヒートシンク間に装填
された熱伝導グリースとを備え、前記モジュールを前記
ヒートシンクに締め付けて構成される半導体装置におい
て、 前記樹脂中で隣合う前記半導体チップ間の適宜箇所及び
前記ケースの壁の適宜箇所に上下に穿設した穴にそれぞ
れ挿入したバネと、該バネの上端を押圧し、前記ヒート
シンクとの間に前記モジュールを挟んで前記ヒートシン
クの４角にボルトを介して締め付けられた押さえ板とを
設け、かつ前記絶縁板下面の金属膜を前記半導体チップ
それぞれに相対する領域に形成し、該金属膜とヒートシ
ンク上面間に前記熱伝導グリースが島状に装填され、前
記ヒートシンクは冷却構造を有することを特徴とする半
導体装置。13. A rectangular insulating plate having a plurality of semiconductor chips mounted on the upper surface and a metal film formed on the lower surface, a resin covering the upper surface of the insulating plate including the semiconductor chips, and a case surrounding a side surface of the resin. A heat sink having a rectangular plate shape arranged on the lower surface side of an insulating plate of the module, and a heat conductive grease loaded between the metal film of the insulating plate and the heat sink. In a semiconductor device configured by being tightened to, a spring inserted respectively into appropriate holes between the adjacent semiconductor chips in the resin and appropriate holes on the wall of the case, and springs respectively inserted into the holes, and the upper end of the spring. A pressing plate which is pressed and is clamped with bolts at four corners of the heat sink with the module sandwiched between the heat sink and the front; A metal film on the lower surface of the insulating plate is formed in a region facing each of the semiconductor chips, the thermal conductive grease is charged in an island shape between the metal film and the upper surface of the heat sink, and the heat sink has a cooling structure. Semiconductor device. 【請求項１４】 前記冷却構造は、前記ヒートシンク内
部に互いに並行する複数の流路と、該流路の両端に形成
されたヘッダとからなることを特徴とする請求項１３に
記載の半導体装置。14. The semiconductor device according to claim 13, wherein the cooling structure includes a plurality of flow paths that are parallel to each other inside the heat sink, and headers formed at both ends of the flow paths. 【請求項１５】 前記冷却構造は、前記ヒートシンク内
部で、隔壁を介して仕切られた上下２室と、該下室に冷
却媒体を導入する流入口と、前記隔壁で前記半導体チッ
プに相対する位置に形成され前記下室からの冷却媒体を
通す孔と、前記上室から前記冷却媒体を排出し前記流入
口とは反対側に位置する排出口とからなることを特徴と
する請求項１３記載の半導体装置。15. The cooling structure comprises, in the heat sink, two upper and lower chambers partitioned by a partition, an inlet for introducing a cooling medium into the lower chamber, and a position of the partition facing the semiconductor chip. 14. The hole according to claim 13, wherein the hole is formed in the lower chamber for allowing the cooling medium from the lower chamber to pass therethrough, and the discharge port for discharging the cooling medium from the upper chamber is located on the opposite side of the inflow port. Semiconductor device. 【請求項１６】 前記隔壁に形成した孔に円形のノズル
を装着し、該ノズルが向く前記上室の天井部分に凹みを
設けたことを特徴とする請求項１５記載の半導体装置。16. The semiconductor device according to claim 15, wherein a circular nozzle is attached to a hole formed in the partition wall, and a recess is provided in a ceiling portion of the upper chamber facing the nozzle. 【請求項１７】 前記凹みで前記ノズルの対向する領域
から外側に放射状にフィンを取り付けたことを特徴とす
る請求項１６記載の半導体装置。17. The semiconductor device according to claim 16, wherein fins are radially attached to the outside of the region where the recesses face the nozzles. 【請求項１８】 前記隔壁の孔に開口形状が長円形のノ
ズルを装着し、該ノズルが向く前記上室の天井部分に凹
みを設け、該凹みで前記ノズルの対向する領域から外側
に前記長円形に対して交叉する方向に延びるフィンを該
各長辺にそって並列して設けたことを特徴とする請求項
１５記載の半導体装置。18. A nozzle having an elliptical opening shape is attached to a hole of the partition wall, and a recess is provided in a ceiling portion of the upper chamber facing the nozzle, and the recess extends to the outside from a region facing the nozzle. 16. The semiconductor device according to claim 15, wherein fins extending in a direction intersecting with the circle are provided in parallel along each of the long sides.
JP29129995A 1995-11-09 1995-11-09 Semiconductor device Expired - Fee Related JP3433279B2 (en)

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