JP3365972B2 - Semiconductor manufacturing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device characterized by a step of forming a buried layer.

[0002]

2. Description of the Related Art p ⁺ in semiconductor devices such as semiconductor ICs.
The buried layer is formed by the up-down-isolation method, that is, when the isolation region is re-diffused not only from the surface of the epitaxial layer but also from below the epitaxial layer (that is, from the substrate side). so,
It is provided for the purpose of suppressing the lateral spread of the isolation (p-diffusion) region by shortening the isolation time and reducing the chip area and improving the breakdown voltage by reducing the upward diffusion such as n ⁺ .

When an npn-type transistor is taken as an example of a semiconductor device having a buried layer, the steps of manufacturing the buried layer in the method of manufacturing this transistor are as shown in FIGS. First, in Step 1 shown in FIG. 5, an oxide film mask 12 made of SiO ₂ is provided on a p-type substrate 11 made of silicon or the like so that the surface of the substrate 11 in a region where a buried layer is formed is exposed. Substrate 11 without mask 12
Is defined as a window region W.

Next, in step 2 of FIG. 6, for example, boron (B) as a p-type impurity is ion-implanted into the substrate 11 from the window region W to form an ion-implanted region 13 in the substrate 11.
In Step 3 of FIG. 7, the entire substrate 11 is heated to a temperature of about 800 to 1300 ° C. in an oxidizing atmosphere such as dry oxygen or water vapor. As a result, the p-type impurity is diffused into substrate 11, and ap ⁺ region 14 ′ is formed below window region W as a diffusion region. During diffusion, the window area W of the substrate 11
Is also formed with a SiO ₂ oxide film 15.

In step 4 of FIG. 8, the SiO ₂ mask 12 and S
The SiO ₂ oxide film 15 is removed, and p ⁺
A region 14 ′ appears, which is referred to as a p ⁺ buried layer 14. The removal of the oxide film 15 causes a step 14a to occur in the portion of the p ⁺ buried layer 14 corresponding to the periphery of the window region W. The obtained semiconductor is subjected to the next step in order to complete an npn-type transistor. For example, as shown in step 5 of FIG.
Grow.

[0006]

According to the above-described buried layer manufacturing process, in order to form the buried layer 14, ions are implanted in step 2 of FIG. 6 and heat treatment is performed in step 3 of FIG. Has been given. When the ion implantation is performed in Step 2, the surface of the window region W of the substrate 11 is greatly damaged. When heat treatment is performed in the next step 3 to form the p ⁺ region 14 ′ while the surface is damaged, when the p ⁺ region 14 ′ is changed to the p ⁺ buried layer 14 in the step 4 in FIG. Then, surface defects appear in the buried layer 14. This is not preferable because it causes a structural defect in a transistor as a product.

[0007] Further, the most unfavorable reason is that the diffusion reaches the surface of the substrate 1 by the heat treatment in step 3 of FIG.
Auto doping occurs during epitaxial growth. Therefore, an object of the present invention is to solve the above problems,
It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of producing a buried layer which does not cause auto doping on a substrate surface serving as a region where a buried layer is formed, damages the surface as much as possible, and has no surface defects.

[0008]

According to the present invention, there is provided a method for forming a mask having an opening for forming a buried layer on a semiconductor substrate, the method comprising the steps of: Implanting impurities into the semiconductor substrate; removing the mask ;
Adjusting the non-oxidizing atmosphere by replacing with an oxidizing gas;
In the growth furnace, the OSF (Oxide
Induced Stacking Fault) so as not to give rise to, before
The ion implantation was performed by annealing the semiconductor substrate.
Activating the impurities sufficiently;
After completion, further followed, the growth furnace to 1000 ° C.
The temperature is gradually increased to remove the impurities in the non-oxidizing atmosphere.
It is diffused to form the buried layer, the epitaxial growth temperature
Reaching, and the buried layer is formed on the surface of the semiconductor substrate.
At that point, switch to epitaxial growth and
Forming an epitaxial growth layer on the surface of the semiconductor substrate
A step, characterized in that it comprises a step of forming a more transistors to form an impurity region of a predetermined conductivity type in the epitaxial growth layer.

According to this manufacturing method, a buried layer is formed.
In the process, ion injection used in the conventional manufacturing method
Non-oxidizing atmosphere after ion implantation without combining with heat treatment
Anneal in the air and raise the temperature
When the extension does not reach the substrate surface
Switch to epitaxial growth at the point
Start the length. For this reason, it becomes a region for forming a buried layer.
There is little damage to the substrate surface, and automatic
No pinging and no buried layer surface defects
So that the occurrence of structural defects in the transistor
Can be reduced.

After the mask is removed, the semiconductor substrate is removed.
A step of cleaning the plate may be included. Such a configuration
According to the above, prior to the formation of the epitaxial growth layer , the substrate
Since the surface is cleaned to an extremely good condition, the film quality is improved.
It is possible to obtain an epitaxial growth layer excellent in
You.

[0011] as an impurity is ion-implanted in the production method of the present invention, because it forms a p ⁺ buried layer is not particularly limited as long as p-type conductivity type, boron (B), aluminum (Al) is exemplified Is done. According to the annealing performed after the ion implantation, the implanted impurity ions are activated and diffused at the same time, and the p ⁺ region, which is the ion implantation region, is expanded to some extent. Since this diffusion is performed in a non-oxidizing atmosphere, oxidation (occurrence of the oxide film 15 in FIG. 7) that occurs in the conventional manufacturing method does not occur. There is no particular limitation on the gas used as the atmosphere during the annealing as long as it is non-oxidizing. For example, there are H ₂ gas, N ₂ gas, Ar gas, and He gas.

After annealing, the p ⁺ region diffused by annealing is further expanded. This expansion is performed by gradually increasing the temperature of the substrate to a temperature (about 1000 ° C.) at which the epitaxial growth performed after the buried layer is formed. However, it is important that p ⁺ region extends the p ⁺ region so as not to reach the substrate surface. In other words, the activation may be performed to such an extent that the implanted ions enter the lattice points.
Then, when the expansion is completed, the epitaxial growth is started, and the epitaxial crystal is grown on the substrate.

In the manufacturing method of the present invention, a step of forming a buried layer (including a step of growing an epitaxial layer)
In the subsequent steps, a semiconductor device provided with a buried layer (and an epitaxial partial layer) is completed as a semiconductor device by using a manufacturing process similar to the conventional one.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a semiconductor device according to the present invention will be described with reference to embodiments. In the present embodiment, in order to clarify the difference between the present invention and the related art in comparison with the manufacturing method disclosed in the related art, an npn transistor will be described as an example similarly to the related art.

FIGS. 1 to 4 show the steps (steps 1 to 4) of forming the buried layer. First, as shown in step 1 of FIG.
On the p-type substrate 1 made of silicon or the like, a region for forming the p ⁺ buried layer is opened and the surface is covered with the resist 2. An opening of the substrate 1 where the resist 2 is not provided is defined as a window region W. Note that an SiO ₂ film may be provided on the substrate 1, and in practice, an SiO ₂ film of about 1000 ° exists on the substrate 1. S
The iO ₂ film can further reduce damage.

Next, in step 2 shown in FIG. 2, for example, boron (B) as a p-type impurity is ion-implanted into the substrate 1 from the window region W, and an ion-implanted region (p ⁺ region) 3 is formed in the substrate 1. Form. Then, in step 3 of FIG. 3, the resist 2 is removed. Here, before moving to the next step 4, the substrate 1 is chemically cleaned, and then the substrate 1 is placed in an epitaxial growth furnace. If there is an SiO ₂ film, it is removed by etching.

Then, in step 4 of FIG. 4, oxygen present in the growth furnace is purged with N ₂ gas to remove oxygen. Next, H ₂ gas is introduced into the growth furnace and the N ₂ gas in the furnace is exhausted, and the N ₂ gas is completely (100%) replaced with H ₂ gas. As a result, H
Fill with ₂ gases and prepare a non-oxidizing atmosphere. This H ₂
In a gas atmosphere, the substrate 1 is annealed to activate and diffuse boron ions. In this spread,
As long as boron ions are activated, the spread of the p ⁺ region 3 may not be large. When the boron ions are sufficiently activated, the annealing is terminated.

After annealing, the temperature in the growth furnace is gradually increased to a temperature (about 1000 ° C.) at which epitaxial growth to be performed after the formation of the buried layer is started, so that the p ⁺ region 3 in the substrate 1 becomes a window region on the surface of the substrate 1. Be careful not to reach W
⁺ Region 3 is further extended to form p ⁺ buried layer 4. p ⁺
When the region 3 does not reach the window region W on the surface of the substrate 1, the temperature is further raised to a temperature (1000 ° C. or higher) at which an epitaxial crystal is deposited, and then the epitaxial layer 5 is grown on the substrate 1. Before the epitaxial growth, HCl gas was flowed into the growth furnace to make the surface of the substrate 1 extremely thin (1000 ° C.).
It is more preferable to perform cleaning by etching. However, the p ⁺ region 3 is changed to the substrate 1 by etching.
It is important that they do not appear on the surface.

The semiconductor provided with the p ⁺ buried layer 4 in this manner may be completed as an npn transistor by using a normal semiconductor manufacturing process. In the above embodiment, an npn-type transistor is described as a semiconductor device. However, it is needless to say that the manufacturing method of the present invention is not limited to this, and can be applied to any semiconductor device having a buried layer. be able to. In the above embodiment, the p-type substrate is used. However, the same operation can be performed with an n-type substrate, and the operation and effect are comparable to those of the p-type substrate.

Further, the manufacturing method of the present invention can be applied to an n ⁺ buried layer made of an n-type impurity (As or Sb). In this case, high energy ion implantation or double implantation may be used.

[0021]

As described above, in the method of manufacturing a semiconductor device according to the present invention, the step of forming the buried layer and the step of growing the epitaxial layer are performed in the same furnace. The following effects (1) to (3) can be obtained as compared with the case where is performed in a separate furnace (compared to the conventional manufacturing method in which the heat treatment and the epitaxial layer growth are performed separately). (1) In the process of forming a buried layer and the process of growing an epitaxial layer, the substrate is less affected by a temperature cycle caused by a temperature increase / decrease (to room temperature) when the substrate is taken in and out of a furnace. And crystal defects due to thermal stress can be significantly reduced. (2) It can be performed without lowering the temperature in the middle to room temperature, so that the manufacturing time can be shortened and the manufacturing process can be simplified. (3) Since annealing is performed in a non-oxidizing atmosphere after ion implantation, crystal defects such as OSF (Oxide induced Stacking Fault) are not generated.

According to the invention of claim 2, in addition to the effects (1) to (3), the following effects (4) and (5) are further obtained.
Can be obtained. (4) Since the implanted impurity does not appear on the substrate surface at the time of starting the epitaxial layer, auto doping does not occur, and the impurity profile of epitaxial growth can be controlled with high accuracy. (5) A buried layer free from surface defects can be formed with little damage to the window region on the substrate surface, which is a region where the buried layer is formed.

[Brief description of the drawings]

FIG. 1 is a view for explaining Step 1 of a buried layer forming process in a manufacturing method of the present invention.

FIG. 2 is a view for explaining Step 2 of a buried layer forming process in the manufacturing method of the present invention.

FIG. 3 is a view for explaining Step 3 of a buried layer forming process in the manufacturing method of the present invention.

FIG. 4 is a view for explaining Step 4 of the buried layer forming step in the manufacturing method of the present invention.

FIG. 5 is a view for explaining stage 1 of a buried layer forming process in a conventional manufacturing method.

FIG. 6 is a view for explaining stage 2 of a buried layer forming process in a conventional manufacturing method.

FIG. 7 is a view for explaining step 3 of a buried layer forming process in a conventional manufacturing method.

FIG. 8 is a view for explaining Step 4 of the buried layer forming process in the conventional manufacturing method.

FIG. 9 is a view for explaining step 5 of the next step of the conventional buried layer forming step.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 p-type substrate 2 resist 3 ion-implanted region (p ⁺ region) 4 p ⁺ buried layer 5 epitaxial layer

Claims (2)

(57) [Claims] 1. A step of forming a mask having an opening for forming a buried layer on a semiconductor substrate, a step of ion-implanting impurities into the semiconductor substrate through the opening, and removing the mask . Adjust the non-oxidizing atmosphere by replacing the process and the inside of the growth furnace with a non-oxidizing gas
A step of, said in a non-oxidizing atmosphere in the growth furnace, OSF (Oxi
de Induced Stacking Fault)
To, the ion implantation and annealing the semiconductor substrate
After the step of fully activating the impurities and the annealing , further continued at 1000 ° C
The temperature inside the growth furnace is gradually increased until the non-oxidizing atmosphere
In the middle, a buried layer is formed by diffusing the impurity, Epita
The step of reaching the axial growth temperature, and at the time the buried layer does not reach the surface of the semiconductor substrate,
Switch to epitaxial growth and apply
The method of manufacturing a semiconductor device which comprises a step of forming an epitaxial growth layer, and forming a more transistors to form an impurity region of a predetermined conductivity type in the epitaxial growth layer. 2. The method according to claim 1, further comprising a step of cleaning the semiconductor substrate after removing the mask.