JP3363973B2 - Liquid crystal display device and manufacturing method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring material in an active matrix type liquid crystal display device using a metal-insulator-metal structure (hereinafter referred to as MIM) or a thin film transistor (hereinafter referred to as TFT) as a switching element. The present invention relates to a structure and a manufacturing method of a portion where a transparent conductor such as a tantalum (hereinafter referred to as Ta) film and an indium tin oxide film (hereinafter referred to as ITO) are laminated.

[0002]

2. Description of the Related Art Today, TFTs, diodes, MIM elements and the like are used as switching elements in active matrix type liquid crystal display devices capable of obtaining high quality images. A Ta film, which can easily form a high-quality insulating film by an anodic oxidation method, is often used for the gate electrode and wiring material of the TFT and the electrode and wiring material of the MIM element.

By the way, when indium tin oxide used as a pixel electrode and a wiring material is heat-treated by laminating it on Ta by a sputtering method or the like, oxygen has a high affinity for Ta and oxygen diffuses from ITO to Ta. .
Therefore, at the interface between Ta and ITO, an insulating tantalum oxide layer is formed on the Ta side, and the contact resistance increases. on the other hand,
On the ITO side, oxygen is deficient in the vicinity of the interface, so a deposited layer of indium or a lower oxide layer of indium is formed.
The adhesion between the film and the ITO film decreases. So Ta wiring and I
To connect the TO wiring, another metal is provided as a barrier layer between the Ta layer and the ITO layer, or a tantalum oxide layer is formed by a method such as anodic oxidation treatment. Capacitance coupling is performed by sandwiching.

[0004]

However, in the method of providing another metal as a barrier layer between the Ta film and the ITO film, the barrier layer patterning step is required and the manufacturing process becomes complicated. In addition, the method of connecting by capacitive coupling across the oxide layer has a disadvantage that it is difficult to perform DC bias (offset) driving for correcting the asymmetry of the MIM element, for example. An object of the present invention is to solve this problem and to eliminate Ta film and ITO without complicated manufacturing processes.
It is an object of the present invention to provide a structure and a manufacturing method of a wiring connection portion capable of improving the adhesion of the film and reducing the resistance of the Ta film and the ITO film to perform direct current coupling.

[0005]

In order to achieve the above object, in the present invention, a nitride layer is formed on the surface or the lower layer of the Ta film in the laminated portion of the Ta film and the ITO film in the liquid crystal display device, An ITO film is laminated on the ITO film, and the Ta film and the ITO film are electrically connected via this nitride layer. Furthermore, in the structure in which the nitride layer is formed under the Ta film,
There is also a structure in which an upper surface of a Ta film is anodized to form an insulator, and an ITO film is laminated thereon.

The method of manufacturing a structure in which a nitride layer is provided on the surface of a Ta film is performed by a step of forming a metal of Ta on a glass substrate by a sputtering method, a step of forming a nitride layer on the metal surface, and a photoetching treatment. A step of patterning the nitride layer and the metal, a step of forming an insulator on the element part by applying resist to the connection part of the metal and the transparent conductor and performing anodic oxidation on the element part without applying resist, and The process includes the step of forming a conductor. The step of forming the nitride layer on the metal surface may be performed by covering the display area of the substrate with a resist mask. Further, the order of the step of forming the nitride layer on the metal surface and the step of patterning the nitride layer and the metal by photoetching may be interchanged.

A method of manufacturing a structure in which a nitride layer is provided under a Ta film is as follows: a step of forming a nitride layer on a glass substrate; a step of forming a metal of Ta by a sputtering method; The step of patterning a metal, the step of forming an insulator on the element part by applying a resist to the connection part of the metal and the transparent conductor and performing anodization on the element part without applying a resist, and the transparent conductor It consists of the process of forming. Further, when an insulator is provided on the upper surface of the metal, anodization is performed after forming the metal to form the insulator, and then patterning is performed by photoetching.

In the above manufacturing method, the method for forming the nitride layer on the metal surface is performed by a nitrogen plasma treatment, a reactive sputtering method in which nitrogen gas is introduced, a sputtering method in which tantalum nitride is a target, or a nitrogen atmosphere. It is a heat treatment or an ion implantation method using N2 as a doping gas.

[0009]

Embodiments of a liquid crystal display device according to the present invention will be described with reference to the drawings. FIG. 1 is a schematic diagram of an active substrate 1 of a liquid crystal display device of the present invention, in which a large number of signal lines, switching elements and pixel electrodes are formed in a display area 3 surrounded by a broken line, and the signal lines are formed on a substrate by wiring 15. It is connected to the driving IC (16) mounted in. FIG. 2 shows the periphery of one pixel electrode in the display area 3 of FIG. The signal line 2 is a metal having an insulating layer formed on a part of its surface. In the embodiment of the present invention, tantalum (Ta) is used as a material, and it is a pixel electrode via the MIM element portion surrounded by a broken line 11. It is connected to the transparent conductor 10. FIG. 3 is an enlarged view of the MIM element part. FIG. 4 shows the Ta / ITO connection part in the wiring 15 of FIG. 1, the broken line part is metal Ta, and the solid line part is transparent conductor ITO. The connection part as shown in FIG.
In the middle of each line of the group, the display area 3 side from the connection
Wiring with metal signal lines, the driving IC (16) side is transparent
The wiring is made of the conductor 10. In this way wiring 15
When connecting different types of conductors, metal signal lines are not
A natural oxide film is generated, and drive IC (16) and flexible circuit
These circuit parts are not suitable for connecting road boards, etc.
Is it normal to connect the product to ITO, which is a stable conductor?
It is. In Figure 4, the connections are not necessarily local,
It may also extend over a considerable length along line 15. In addition,
The square part in Fig. 2 is also the transparent conductor 10, but this is
The element is a transparent electrode 10 of the wiring in FIG.
Although the same material is formed at the same time in the same process,
This is a separate part from the wiring. In addition, in FIG.
It ’s labeled “6,7 or 6,7,11”
Corresponds to the description below. In each of the following examples, referring to the cross-sectional views of the MIM element portion in the order of steps taken along the line AA in FIG. 3 and the Ta / ITO connection portions in the order of the steps taken along the line BB of FIG. explain.

First, regarding the first embodiment of the present invention, FIGS. 5A to 5E are sectional views of the MIM element portion taken along the line AA of FIG. 3 in the order of steps. 6 is a cross-sectional view of the Ta / ITO connection portion of the wiring along the line BB in FIG. 4 in the order of steps.
It shows in (a)-(e).

In the first embodiment, the Ta / ITO connection has the structure shown in FIG. 6 (e). The Ta of the metal 6 on the glass substrate 5 is patterned by providing a nitride layer 7 of tantalum nitride (TaNx) on the upper surface, and the ITO of the transparent conductor 10 covers it.

According to this structure, Ta of the metal 6 is bonded to the ITO of the transparent conductor 10 with the nitride layer 7 sandwiched on the upper surface,
Bond directly to the ITO on the sides. Metal 6 and IT on the side
An oxide film is formed on the interface of O, and the resistance becomes high. However, since an oxide film is not formed on the upper surface through the nitride layer 7, the junction has a sufficiently low resistance.

Next, a manufacturing method for obtaining the above structure will be described. As shown in FIGS. 5A and 6A, Ta is formed as a metal 6 on the glass substrate 5 to a thickness of 250 nm by a sputtering method.

Next, the metal 6 is subjected to a nitrogen plasma treatment under the following conditions, and as shown in FIGS. 5 (b) and 6 (b), the metal 6 is treated.
A nitride layer 7 of tantalum nitride is formed on the Ta surface of. The nitrogen plasma treatment may be performed without breaking the vacuum after the Ta film of the metal 6 is formed, or may be performed after it is once exposed to the atmosphere. Gas type: Nitrogen gas gas pressure: 1 mTorr Rf Input power: 0.08 W / cm2 Treatment time: 1 to 30 min Treatment temperature: Room temperature (not particularly heated)

Next, as shown in FIGS. 5 (c) and 6 (c), a metal 6 is formed by a normal photolithography process and a reactive ion etching (hereinafter abbreviated as RIE) process.
Ta and the nitride layer 7 are simultaneously patterned. Here, since the thickness of the nitride layer 7 is as thin as several nm to several tens of nm,
It does not affect the patterning process of metal 6.

Next, as shown in FIGS. 6 (d) and 5 (d), the Ta / ITO connection portion is covered with a resist 8 and MI.
Without applying a resist to the M element portion, a voltage of 35 V was applied in a 0.1% aqueous solution of citric acid to carry out anodization, and
As shown in (d), tantalum pentoxide (Ta2 O5) of insulator 9 is formed on the surface of metal 6 to a thickness of 70 nm. In this case, since the nitride layer 7 is sufficiently thin as described above, it does not affect the formation of the insulator 9.

Next, after removing the resist 8 at the Ta / ITO connection portion, as shown in FIGS. 5 (e) and 6 (e), ITO is used as a transparent conductor 10 to a thickness of 2 by a sputtering method.
It is formed to a thickness of 00 nm, heat treatment is performed, and ITO is patterned by a normal photoetching treatment to complete the device.

FIG. 7 is a graph showing the relationship between the treatment time of the nitrogen plasma treatment of the metal 6 under the above nitriding conditions and the peeling load of Ta / ITO. The peeling load was obtained by a scratch test using a scratch tester SST-101 (manufactured by Shimadzu Corporation). The test was conducted under the following conditions. Ta film thickness: 250 nm ITO film thickness: 200 nm Test method: Constant speed load test Cartridge tip diameter: 15 μm Load speed: 1 μm / s Amplitude: 50 μm Feed speed: 20 μm

In the graph of FIG. 7, the horizontal axis is the nitrogen plasma treatment time and the vertical axis is the peeling load. Processing time 0 here
min is the data of the sample not subjected to the nitrogen plasma treatment. As can be seen from the graph, the load that causes peeling is increased by performing the nitrogen plasma treatment, and the peeling load is increased as the treatment time is lengthened.
That is, the nitrogen plasma treatment is effective in improving the adhesion of Ta / ITO.

As shown in FIG. 9, the metal 6 and the transparent conductor 1
The contact resistance of Ta / ITO was evaluated under the following conditions using monitor patterns provided so that 0 overlapped in an area of 20 × 20 μm 2. Ta film thickness: 250 nm ITO film thickness: 200 nm Monitor shape: 46 Ta / ITO laminated pattern of 20 × 20 μm 2 series connection resistance measurement: Resistance value when a voltage of 10 V is applied to the monitor pattern

FIG. 8 is a graph showing the relationship between the nitrogen plasma processing time and the contact resistance of Ta / ITO performed without breaking the vacuum after forming the Ta film. The horizontal axis represents the nitrogen plasma treatment time, and the vertical axis represents the resistance value in logarithm. As can be seen from the graph, the resistance value is reduced by about 5 digits in the plasma processing time of about 1 min.

As a second embodiment, the nitride layer 7 shown in FIGS. 5 and 6 was formed under the following conditions by the reactive sputtering method in which nitrogen gas was introduced. In this case as well, the same effect as in Example 1 was obtained. Gas pressure: 1 mTorr Nitrogen gas flow rate: 12-24 sccm Temperature: 300 ° C.

FIG. 10 is a graph showing the results of evaluating the contact resistance of Ta / ITO in Example 2 using the monitor pattern of FIG. The evaluation conditions are the same as in Example 1. The horizontal axis of the graph represents the amount of nitrogen gas introduced, and the vertical axis represents the resistance value of the monitor resistance in logarithm. As can be seen from the graph, the flow rate of introduced nitrogen gas is about 20 scc.
At m, the resistance value is reduced by about 6 digits.

When a nitride layer is formed on Ta of metal by the reactive sputtering method of introducing nitrogen gas, MI
In order to improve only the contact resistance of the Ta / ITO connection portion without affecting the characteristics of the M element, the film thickness of the nitride layer 7 is set to several n.
It is necessary to make it m to several tens of nm.

As a third embodiment, the nitride layer 7 shown in FIGS. 5 and 6 was formed by the sputtering method using a tantalum nitride (TaN) target under the following conditions. Also in this case, the same effects as those of the above-mentioned respective examples were obtained. Gas type: Argon gas pressure: 1 mTorr Temperature: 300 ° C

As a fourth embodiment, the nitride layer 7 shown in FIGS. 5 and 6 was formed by heat-treating Ta of the metal 6 in a nitrogen atmosphere under the following conditions. Also in this case, the same effects as those of the above-mentioned respective examples were obtained. Gas pressure: 5 atm Temperature: 500 ° C. Processing time: 1 hr

Further, the nitride layer 7 may be formed by an ion implantation method using N2 as a doping gas. Typical examples of conditions are as follows. Accelerating voltage: 50 kV Dose amount: 1 × 10 16 ion / cm 2

In the fifth embodiment, the nitrogen plasma treatment used in the first embodiment is carried out after the patterning of Ta which is a metal, and the same effect as that of the first embodiment is obtained. . 11A to 11C are sectional views of the fifth embodiment in the order of steps of the MIM element portion taken along the line AA in FIG.
It shows in (e). 12A is a sectional view of the Ta / ITO connection portion of the wiring along the line BB in FIG. 4 in the order of steps.
~ (E).

In the fifth embodiment, the Ta / ITO connection has the structure shown in FIG. After patterning, Ta of the metal 6 on the glass substrate 5 has a nitride layer 7 of tantalum nitride (TaNx) formed on the entire surface, and ITO of the transparent conductor 10 covers the nitride layer 7.

According to this structure, Ta of the metal 6 is laminated on the ITO of the transparent conductor 10 with the nitride layer 7 interposed therebetween, so that an oxide film is not formed at the junction and the resistance becomes sufficiently low.
The wiring width of the metal 6 is several μm or less, and the transparent conductor 10
The structure of this embodiment is particularly effective when oxygen diffusion from ITO of the ITO occurs through the side surface.

Next, a manufacturing method for obtaining the above structure will be described. As shown in FIGS. 11A and 12A,
As the metal 6, Ta is formed on the glass substrate 5 by sputtering to have a thickness of 250 nm.

Next, as shown in FIGS. 11B and 12B, Ta of the metal 6 is patterned by the ordinary photolithography process and RIE process.

Next, as shown in FIGS. 11C and 12C, the metal 6 is subjected to nitrogen plasma treatment under the same conditions as in the first embodiment, and the nitride layer 7 is formed on the Ta surface of the metal 6. To form.

Next, as shown in FIGS. 12 (d) and 11 (d), the Ta / ITO connection portion is covered with a resist 8,
Without applying a resist to the MIM element part, citric acid 0.1
% Solution in 35% aqueous solution to perform anodic oxidation,
As shown in FIG. 11D, Ta2 of the insulator 9 is formed on the surface of the metal 6.
O5 is formed to a thickness of 70 nm. In this case, the nitride layer 7 is sufficiently thin so that it does not affect the formation of the insulator 9.

Next, after removing the resist 8 at the Ta / ITO connection portion, as shown in FIGS. 11E and 12E, ITO is formed as a transparent conductor 10 to a thickness of 200 nm by a sputtering method. Then, the device is completed by patterning by a normal photo-etching process.

As a sixth embodiment, FIG. 11 and FIG.
The nitride layer 7 was formed by heat-treating Ta of the metal 6 under the same conditions as in the fourth embodiment in a nitrogen atmosphere. Also in this case, the same effects as those of the above-mentioned respective examples were obtained.

In the first or fifth embodiment, when the tantalum surface is subjected to nitrogen plasma treatment in order to form a nitride layer on the tantalum electrode surface of the wiring connecting portion, as shown in FIG.
As shown in FIG. 11C and FIG. 11C, the nitride layer 7 is also formed on the surface of the metal electrode 6 in the MIM element part. As described above, since the nitride layer 7 is usually sufficiently thin, it does not affect the formation of the insulator 9 by the anodic oxidation treatment in the next step. However, Ta seen in FIG. 6 (e) or FIG. 12 (e)
In the case where the degree of nitriding is strengthened by emphasizing the improvement of the characteristics of the / ITO connection portion, the characteristics of the completed MIM element are insufficient due to the formation of the nitride layer 7 on the surface of the metal electrode 6 of the MIM element portion. It can happen. To avoid such a problem, the display area 3 shown in FIG.
A resist mask is applied to and then nitriding is performed. Then, nitriding is performed only on the surface of the tantalum electrode in the wiring connection portion, and the MIM element portion is not affected, and Ta / I
The best nitriding conditions for the TO connection can be chosen. Since the resist mask need only cover the display portion, a complicated mask is unnecessary.

Next, as in each of the above-described embodiments, the nitride layer is treated with T.
A structure in which a nitride layer is provided on the substrate instead of being provided on the surface of the a film will be described. 13A to 13D are sectional views of the seventh embodiment having such a structure in the order of steps of the MIM element portion taken along the line AA in FIG. Also,
14A to 14D are cross-sectional views in the order of steps of the ITO / Ta connection portion of the wiring on the line BB in FIG.

In the seventh embodiment, the Ta / ITO connection has the structure shown in FIG. 14 (d). Ta of the metal 6 is laminated and patterned on the nitride layer 7 made of tantalum nitride (TaNx) on the glass substrate 5, and the ITO of the transparent conductor 10 covers it.

According to this structure, Ta of the metal 6 is bonded to the ITO of the transparent conductor 10 on the upper and side surfaces, and is bonded to the nitride layer 7 on the lower surface. Then, the nitride layer 7 is joined to the transparent conductor 10 at the side surface. At the direct bonding surface 12 between the metal 6 and the transparent conductor 10, an oxide film is formed at the bonding interface, and the resistance becomes high. On the other hand, since no oxide film is formed on the side surface of the nitride layer 7 and the bonding surface 14 of the transparent conductor 10, the resistance becomes low. Further, the bonding surface 13 between the metal 6 and the nitride layer 7 is also a laminate of materials exhibiting metal conductivity, and thus has low resistance. Therefore, Ta of metal 6
The main current path of the transparent conductor 10 is the metal 6 / nitride layer 7 / transparent conductor 10 and an electrically low resistance connection is obtained.

Next, a manufacturing method for obtaining the above structure will be described. As shown in FIGS. 13A and 14A, a nitride layer 7 made of tantalum nitride (TaNx) is formed on a glass substrate 5 to a thickness of 50 nm by a reactive sputtering method of Ta introducing nitrogen gas. Form. The formation of this nitride layer 7 is performed under the following conditions. Introduced gas: Argon + nitrogen total pressure: 1.0 mTorr Nitrogen partial pressure: 0.3 mTorr Substrate heating temperature: 300 ° C. Input power: 1.7 kW

Next, T is formed on the nitride layer 7 under the following conditions.
The metal 6 made of a is formed to a film thickness of 200 nm. Introduced gas: Argon total pressure: 1.0 mTorr Substrate heating temperature: 300 ° C. Input power: 1.7 kW

Next, as shown in FIGS. 13B and 14B, the nitride layer 7 and the Ta of the metal 6 are simultaneously patterned by ordinary photolithography and RIE.

Next, as shown in FIGS. 14 (c) and 13 (c), the Ta / ITO connection portion is covered with a resist 8,
Without applying a resist to the MIM element part, citric acid 0.1
% Solution in 35% aqueous solution to perform anodic oxidation,
As shown in FIG. 13C, tantalum pentoxide (Ta2 O5) of insulator 9 is formed on the surfaces of metal 6 and nitride layer 7 to a thickness of 70 nm.

Next, after removing the resist 8 at the Ta / ITO connection portion, as shown in FIGS. 13D and 14D, ITO is formed as a transparent conductor 10 to a thickness of 200 nm by a sputtering method. Then, heat treatment is performed, and ITO is patterned by ordinary photoetching to complete the device.

Using the monitor pattern shown in FIG. 9, the connection resistance was evaluated under the following conditions. TaNx film thickness: 50 nm Ta film thickness: 200 nm ITO film thickness: 200 nm Monitor shape: 20 × 20 μm 2 TaNx / Ta / I
Forty-six TO-series patterns are connected in series. However, conduction is mainly taken by the TaNx / ITO portion on the side wall. Resistance measurement: Resistance value when a voltage of 10 [V] is applied to the monitor

The resistance value measured by this measurement was about 100 kΩ. Without forming a TaNx layer, the Ta film thickness is 250 nm, I
It was found that compared with the resistance value in the same monitor pattern of the Ta / ITO structure in which the TO film thickness was 250 nm, it was reduced by about 5 digits.

As an eighth embodiment, FIG. 13 and FIG.
The nitride layer 7 was formed by sputtering using a tantalum nitride (TaN) target under the following conditions. Also in this case, the same effect as in Example 7 was obtained. Gas type: Argon gas pressure: 1 mTorr Temperature: 300 ° C

Next, with respect to the ninth embodiment, FIG. 1 is a sectional view showing the steps of the MIM element portion along the line AA in FIG.
5 (a)-(d). 16A to 16D are cross-sectional views in the order of steps of the ITO / Ta connection portion of the wiring on the line BB in FIG.

In the ninth embodiment, the Ta / ITO connection has the structure shown in FIG. 16 (d). The Ta of the metal 6 is laminated on the nitride layer 7 made of tantalum nitride (TaNx) on the glass substrate 5, the second insulator 11 is further laminated and patterned, and the transparent conductor 10 is formed on the second insulator 11.
Covered with ITO.

According to this structure, Ta of the metal 6 is bonded to the ITO of the transparent conductor 10 through the second insulator 11 on the upper surface, directly bonded to the transparent conductor 10 on the side surface, and nitrided on the lower surface. Bond to layer 7. Then, the nitride layer 7 is joined to the transparent conductor 10 at the side surface. Since the second insulator 11 is provided between the upper surface of the metal 6 and the transparent conductor 10, the resistance becomes high. Further, the direct bonding surface 12 between the metal 6 and the transparent conductor 10 has an oxide film at the bonding interface. Is formed and has a high resistance. On the other hand, since no oxide film is formed on the side surface of the nitride layer 7 and the bonding surface 14 of the transparent conductor 10, the resistance becomes low. Further, the bonding surface 13 between the metal 6 and the nitride layer 7 also has a low resistance because it is a stack of materials exhibiting metal conductivity. Therefore, the main current path between Ta of the metal 6 and the transparent conductor 10 is the metal 6 / nitride layer 7 / transparent conductor 10 and an electrically low resistance connection portion is obtained.

Next, a manufacturing method for obtaining the above structure will be described. As shown in FIGS. 15A and 16A, a nitride layer 7 made of tantalum nitride (TaNx) is formed on the glass substrate 5 to a thickness of 50 nm by a reactive sputtering method of Ta introducing nitrogen gas. Form. The conditions for forming the nitride layer 7 are the same as those in the seventh embodiment.

Next, in the same manner as in Example 7, the metal 6 made of Ta is formed to a thickness of 200 nm on the nitride layer 7.

Next, a voltage of 5 V is applied in a 0.1% aqueous solution of citric acid to perform anodic oxidation, and tantalum pentoxide (Ta2 O5) as a second insulator 11 is formed on the Ta surface of the metal 6 to a thickness of It is formed to 10 nm.

Next, as shown in FIGS. 15B and 16B, the tantalum nitride of the nitride layer 7, Ta of the metal 6 and the second insulator 11 are removed by ordinary photolithography and RIE. Pattern at the same time.

Next, as shown in FIGS. 16C and 15C, the Ta / ITO connection portion is covered with a resist 9,
Without applying resist to the element portion, a voltage of 35 V was applied in a 0.1% aqueous solution of citric acid to perform anodic oxidation, and the result shown in FIG.
As shown in (c), T of the insulator 9 is formed on the surface of the nitride layer 7 and the metal 6.
Form a2 O5 to a thickness of 70 nm. Since the second insulator 11 is anodized at a voltage lower than that of the insulator 9, the characteristics of the insulator 9 are not affected.

Next, after removing the resist 8 at the Ta / ITO connection portion, as shown in FIGS. 15D and 16D, ITO is formed as a transparent conductor 10 to a thickness of 200 nm by a sputtering method. Then, heat treatment is performed, and ITO is patterned by ordinary photoetching to complete the device.

Using the monitor pattern shown in FIG. 9, the connection resistance was evaluated under the following conditions. TaNx film thickness: 50 nm Ta film thickness: 200 nm ITO film thickness: 200 nm Monitor shape: 20 × 20 μm 2 TaNx / Ta / T
Forty-six a2 O5 / ITO laminated patterns are connected in series. However, conduction is mainly taken at the TaNx / ITO portion on the side wall. Resistance measurement: Resistance value when a voltage of 10 [V] is applied to the monitor

The resistance value measured by this measurement was about 100 kΩ as in the case of Example 7. T without the TaNx layer
a T having a film thickness of 250 nm and an ITO film thickness of 250 nm
It was found that the resistance value of the a / ITO structure was smaller by about 5 digits compared to the resistance value of the same monitor pattern.

Further, in the ninth embodiment, the T of the second insulator 11 is provided between Ta / ITO above the metal / transparent conductor connecting portion.
An a2 O5 layer is formed. Therefore, the adhesion between Ta and ITO is improved. Previously, in the section of [Prior Art], it has been described that a lower oxide layer of indium or the like is conventionally formed at the Ta / ITO bonding interface, and the adhesion between the Ta film and the ITO film is reduced. In each of the above embodiments, Ta / ITO
A nitride layer is provided at the boundary to prevent the formation of the lower oxide layer, thereby enhancing the adhesion. In Example 9, if the adhesion is improved by providing the second insulator 11 that is an oxide layer, it may give the impression that the influence of the oxide layer is different from the above description. However, although the principle has not been fully clarified yet, the properties of the lower oxide layer secondarily generated in the Ta / ITO connection portion and the oxide layer intentionally formed by anodic oxidation as in Example 9 have characteristics. Unlike, the former is Ta
It has been clarified by the inventors' experiments that the adhesion strength of the / ITO connection part is weakened, but the latter is strengthened. The barrier effect of the oxide layer due to anodic oxidation prevents the formation of the lower oxide layer and increases the adhesion.

The peeling load of ITO in Example 9 was determined by a scratch test using the scratch tester SST-101 described above. The test was conducted under the following conditions. Ta film thickness: 200 nm Ta2 O5 film thickness: 50 nm ITO film thickness: 200 nm Test method: Constant speed load test Cartridge tip diameter: 15 μm Load speed: 1 μm / s Amplitude: 50 μm Feed speed: 20 μm

As a result of this measurement, the peeling load above the metal / transparent conductor connecting portion was 40 [gf] or more, and Ta film thickness was 250 [nm] and ITO film thickness was 200 [nm].
A significant improvement in the adhesion force of 80 times or more was observed as compared with the peeling load of 0.5 [gf] under the same measurement conditions for the sample in which / ITO was directly laminated.

As a tenth embodiment, FIG. 15 and FIG.
The nitride layer 7 of No. 6 was formed by the sputtering method using a tantalum nitride target under the same conditions as in the case of the third embodiment. In this example, the same effect as that of Example 9 was obtained.

The manufacturing process described in each of the above embodiments is based on MI
It is needless to say that the present invention can be applied to a wiring part using a TFT instead of the M element. The metal Ta film serving as the base of the nitride layer may be nitrogen-added tantalum, tantalum nitride, or an alloy of Ta and another metal. Further, it is also effective when a metal having a high oxygen affinity other than Ta, for example, Nb is used as the metal used for the wiring. In addition to ITO, In2O3, SnO2, ZnO can be used as the transparent conductor.
The production method of the present invention is also effective when an oxide such as

[0065]

As is apparent from the above description, according to the present invention, a nitride layer is interposed at a metal / transparent conductor connecting portion in the formation of a driving element or wiring of a liquid crystal display device. The contact resistance between the metal and the transparent conductor is reduced without complicating the manufacturing process and without significantly affecting the device characteristics. Further, in the structure in which the nitride layer or the insulator is present on the bonding surface of the metal and the transparent conductor, the adhesion between the two is significantly improved, and an active matrix type liquid crystal display device having excellent display quality can be obtained.

[Brief description of drawings]

FIG. 1 is a schematic plan view of an active substrate of a liquid crystal display device of the present invention.

FIG. 2 is a plan view of the periphery of a pixel electrode of the liquid crystal display device of the present invention.

FIG. 3 is an enlarged plan view of a MIM element part of the liquid crystal display device of the present invention.

FIG. 4 shows Ta / I in wiring of the liquid crystal display device of the present invention.
It is the top view which expanded the TO connection part.

FIG. 5 is a cross-sectional view showing a manufacturing process of the MIM element portion of the first to fourth embodiments of the liquid crystal display device of the present invention.

FIG. 6 is a cross-sectional view showing the manufacturing process of the Ta / ITO connection portion of the first to fourth embodiments of the liquid crystal display device of the present invention.

FIG. 7 is a graph showing the relationship between the plasma processing time and the peeling load in the method for manufacturing a liquid crystal display device of the present invention.

FIG. 8 is a graph showing the relationship between the plasma processing time and the resistance value in the method for manufacturing a liquid crystal display device of the present invention.

FIG. 9 is a monitor pattern used for measuring the resistance value of the wiring on the substrate.

FIG. 10 is a graph showing the relationship between the amount of nitrogen introduced and the resistance value in the method for manufacturing a liquid crystal display device of the present invention.

FIG. 11 is a cross-sectional view showing the manufacturing process of the MIM element portion of the fifth and sixth embodiments of the liquid crystal display device of the present invention.

FIG. 12 is a cross-sectional view showing the manufacturing process of the Ta / ITO connection portion of the fifth and sixth embodiments of the liquid crystal display device of the present invention.

FIG. 13 is a cross-sectional view showing the structure and manufacturing process of the MIM element portion of the seventh and eighth embodiments of the liquid crystal display device of the present invention.

FIG. 14 is a cross-sectional view showing the structure and manufacturing process of the Ta / ITO connection portion of the seventh and eighth embodiments of the liquid crystal display device of the present invention.

FIG. 15 is a cross-sectional view showing the structure and manufacturing process of the MIM element portion of the ninth and tenth embodiments of the liquid crystal display device of the present invention.

FIG. 16 is a cross-sectional view showing the structure and manufacturing process of the Ta / ITO connection part of the ninth and tenth embodiments of the liquid crystal display device of the present invention.

[Explanation of symbols]

5 glass substrates 6 metal 7 Nitride layer 8 resist 9 insulator 10 Transparent conductor 11 Second insulator

Claims (10)

(57) [Claims] 1. A connection portion between a metal forming a wiring and a transparent conductor is constituted by a metal made of tantalum on a glass substrate, a nitride layer formed on a metal surface, and a transparent conductor covering the metal and the nitride layer. Then, the liquid crystal display device is characterized in that the metal and the transparent conductor are electrically connected through the nitride layer. 2. A method of manufacturing the liquid crystal display device according to claim 1.
A method of forming a metal made of tantalum on a glass substrate, a step of forming a nitride layer on the metal surface, a step of patterning the nitride layer and the metal by photoetching, and a resist applied to the wiring part. A method for manufacturing a liquid crystal display device, comprising: a step of forming an insulator on an element portion by performing anodization by means of anodization; and a step of forming a transparent conductor. 3. The method of manufacturing a liquid crystal display device according to claim 2, wherein a step of forming a nitride layer on the metal surface and a step of patterning the nitride layer and the metal by photoetching are interchanged. Method for manufacturing liquid crystal display device. 4. The method for manufacturing a liquid crystal display device according to claim 2 or 3, wherein the step of forming the nitride layer on the metal surface is performed by nitrogen plasma treatment or a reactive sputtering method of introducing nitrogen gas, or A method for manufacturing a liquid crystal display device, which is a sputtering method using tantalum nitride as a target, a heat treatment in a nitrogen atmosphere, or an ion implantation method using N2 as a doping gas. 5. The method of manufacturing a liquid crystal display device according to claim 4, wherein the step of forming a nitride layer on a metal surface is a nitrogen plasma treatment, wherein the step of forming a nitride layer is performed using a resist mask on a display region of a substrate. A method for manufacturing a liquid crystal display device, which is characterized by being covered with a. 6. A nitride layer made of tantalum nitride on a glass substrate, wherein a connection portion between a metal forming a wiring and a transparent conductor is formed.
A liquid crystal display device characterized by comprising a metal made of tantalum on a nitride layer, a nitride layer and a transparent conductor covering the metal, and electrically connecting the metal and the transparent conductor through the underlying nitride layer. . 7. A method of manufacturing a liquid crystal display device according to claim 6.
A method of forming a nitride layer on a glass substrate,
A step of forming a metal made of tantalum, a step of patterning the nitride layer and the metal by photoetching, a step of forming an insulator on the element portion by applying resist to the wiring portion and performing anodic oxidation, and a transparent conductor A method of manufacturing a liquid crystal display device, comprising the step of forming. 8. A nitride layer made of tantalum nitride on a glass substrate, wherein a connection portion between a metal forming a wiring and a transparent conductor is formed.
It is composed of a metal made of tantalum on the nitride layer, an insulator made of tantalum oxide on the metal, and a transparent conductor covering the nitride layer, the metal, and the insulator, and the metal and the transparent conductor are interposed through the lower nitride layer. A liquid crystal display device, characterized in that the electric connection of the liquid crystal display device is obtained. 9. A method of manufacturing a liquid crystal display device according to claim 8.
A method of forming a nitride layer on a glass substrate,
A step of forming a metal made of tantalum, a step of forming an insulator by anodizing, a step of patterning the nitride layer, the metal and the insulator by a photoetching process, and a step of applying a resist to the wiring portion to perform the anodizing. A method for manufacturing a liquid crystal display device, which comprises a step of forming an insulator on the element portion and a step of forming a transparent conductor. 10. The method of manufacturing a liquid crystal display device according to claim 7, wherein in the step of forming the nitride layer on the glass substrate, a reactive sputtering method of introducing nitrogen gas or a target of tantalum nitride is used. A method for manufacturing a liquid crystal display device, which is a sputtering method.