JP3324954B2 - Liquid crystal display panel drive - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wide-format 16: 9 aspect video signal for television broadcasting and the like.
The present invention relates to a liquid crystal display panel driving device for displaying on a liquid crystal display panel screen for a 4: 3 aspect video signal.

[0002]

2. Description of the Related Art In recent years, a liquid crystal display panel (hereinafter, referred to as a liquid crystal panel) has been widely used for display such as a liquid crystal television and a car navigation system. It is also necessary to display an image on a liquid crystal panel for an aspect video signal (hereinafter referred to as a normal signal). In addition, a clock pulse, which is a reference signal for sampling display data to a liquid crystal panel, secures a sampling time and performs EMI (electromagnetic interference) such as interference and radiation.
For example, a three-phase clock pulse is frequently used because of ease of sampling corresponding to each color of RGB for reasons such as reduction of the level of rence.

Hereinafter, a liquid crystal panel driving device using such a three-phase clock pulse, which is a conventional liquid crystal display panel driving device for displaying a wide signal on a liquid crystal panel surface for a normal signal, will be described with reference to the drawings. I will explain while.

FIG. 4 is a schematic diagram showing an example of a display image when a wide signal is displayed on a liquid crystal panel surface in a conventional liquid crystal display panel driving device. FIG. 4 (a) shows a display on a wide signal liquid crystal panel. If an image P ₁₀ of, shows that the circle is normally displayed as a circle. 4 (b) is an image P ₂₀ when viewed in the liquid crystal panel for normal signals, indicates that it is ellipse circle extending longitudinally, and FIG. 4 (c) for normal signal an image display portion in the liquid crystal panel vertically reduced to 3/4, the circle is an image P ₃₀ multiplied by the correction to be normally displayed as a circle, a liquid crystal panel upper bottom of each 1/8 It has a part in the black display B _10, B _20. The function of shrinking the image in the vertical direction and displaying the upper and lower parts in black is generally called a letterbox function. The most common method for realizing this function is a thinning method, in which a video signal is divided into one horizontal cycle every four horizontal cycles. Is not displayed.

[0005] In this way, conventional liquid crystal display panel driving apparatus, when displaying the wide signal to the liquid crystal panel screen for normal signals, so as not to image deformation as images P ₃₀ shown in FIG. 4 (c) Using the letterbox function, the circle was configured to be displayed normally as a circle.

[0006]

However, in such a conventional configuration, the image display area is reduced by 3/4 in the vertical direction, so that the image display area is reduced by 25%, and thinning is performed. Therefore, there is a problem in that the display quality of the image is impaired.

The present invention solves the above-mentioned conventional problems. When a wide signal using a three-phase clock pulse is displayed on a liquid crystal panel for a normal signal, an image display area is not reduced and an image is not displayed. An object of the present invention is to provide a liquid crystal display panel driving device that does not impair display quality.

[0008]

According to the liquid crystal display panel driving apparatus of the present invention, when displaying a wide signal on a liquid crystal display panel for a normal signal, the frequency of a three-phase clock pulse for sampling a video signal is set to 4/3. This is an image which is displayed at a magnification of twice and stretched in the horizontal direction. According to the present invention, it is possible to obtain a liquid crystal display panel driving device in which an image display area does not change and a display quality of an image does not deteriorate.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a liquid crystal display panel driving apparatus according to an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes an inverter for oscillating an original oscillation pulse; Three pulses Φ divided by 3 and phases differing by 120 °
1, a divide-by-3 circuit that generates Φ2, Φ3, 3 is a divide-by-4 circuit that divides the original oscillation pulse from the inverter 1 by 4, and 4 is an output of the divide-by-4 circuit 3 that is approximately 480 ° of the original oscillation pulse. A first delay circuit for delaying by a corresponding time;
Is a second delay circuit for delaying the output of the second embodiment by a time corresponding to approximately 960 ° of the original oscillation pulse. Here, the delay circuit 4
A delay of 360 ° is secured based on the original oscillation pulse, and a delay of 120 ° is realized by using a delay element such as an inverter, and the delay circuit 5 secures a delay of 900 ° based on the original oscillation pulse. A delay of 60 ° is realized using a delay element such as an inverter. Reference numerals 6, 7, and 8 denote interlocking switches serving as first, second, and third switching means.
(Hereinafter referred to as NORM), it is always fixed to the contact b side, and the horizontal image stretching display mode (hereinafter H.ZOO)
(Referred to as M), the contact is switched to the contact a side. Reference numerals 9, 10, and 11 denote buffer circuits connected to the output sides of the changeover switches 6, 7, and 8, respectively. Reference numerals 12, 13, and 14 denote output terminals, and liquid crystal panels as first, second, and third pulse train signals, respectively. Sampling pulses CPH1, CPH2,
Outputs CPH3. Reference numeral 15 denotes an n frequency dividing circuit for dividing the original oscillation pulse from the inverter 1 to 1 / n up to the horizontal scanning frequency, 16 denotes a horizontal synchronizing signal (hereinafter referred to as H. SYNC.) Input line, and 17 denotes an n frequency dividing circuit 15. The output signal and H.H. SYNC. 18 is a timing pulse generator composed of the above circuits, 19 is an integration circuit for smoothing the output signal of the phase comparison circuit 17, 20 is a variable capacitance diode, and 21 is a DC A blocking capacitor, 22 is a resonance coil, 23 is a resonance capacitor, and 24 is a bypass capacitor that grounds the cathode side of the variable capacitance diode 20 in an AC manner.

Original oscillation clock (hereinafter referred to as "base clock")
The oscillation frequency of the variable capacitance diode 20, resonance coil
22, determined based on a series resonance circuit including a resonance capacitor 23. 25 is a variable resistor for adjusting the free oscillation frequency of the basic clock, 26 is the interlocking switch 6,
A NORM / H.ZOOM changeover switch further linked to 7, 8 is an input line of a DC power supply having a voltage value of VCC. Note that an oscillation circuit including the inverter 1, the variable capacitance diode 20, the resonance coil 22, and the resonance capacitor 23, an n frequency dividing circuit 15, a phase comparing circuit 17,
The integration circuit 19 controls P using SYNC as a reference signal
An LL (Phase Lock Loop) is configured to correct a deviation of the original oscillation frequency due to a temperature change, a power supply voltage change, or the like.

Next, the operation of the liquid crystal display panel driving device configured as described above will be described with reference to the drawings. FIG. 2 is a timing chart showing the operation of the liquid crystal display panel driving device according to one embodiment of the present invention.
In the figure, VCO is an original oscillation pulse, and the same pulse is used in both NORM and H.ZOOM. FIG. 2 (a)
H / ZOOM, NORM / H · Z in FIG.
Set the OOM switch 26 to the contact a side (H-ZOOM
2) shows the timing of the sampling pulse when set to (side). In the figure, CPH1, CPH2, CPH3
Is a pulse obtained by dividing VC0 by three. When the sampling pulse CPH1 is used as a reference, the sampling pulse CP
H2 is delayed by 120 ° phase, sampling pulse C
PH3 is delayed by 240 ° phase.

FIG. 2B shows the timing of the sampling pulse when the NORM / NORM / ZOOM changeover switch 26 of FIG. 1 is set to the contact b side (NORM side). In order to normally display a wide signal as a circle on a liquid crystal panel surface for a normal signal, it is necessary to enlarge an image 4/3 times in the horizontal direction using H.ZOOM. For this purpose, the video signal sampling clock frequency needs to be 4/3 times that of the NORM in which the normal signal is normally displayed on the liquid crystal panel surface for the normal signal. Therefore, based on the H.ZOOM time, the sampling clock frequency at the time of NORM is 3 /
4 times.

In FIG. 2B, CPH1 is obtained by dividing the frequency of the original oscillation pulse VCO by four, and the sampling pulse CPH2 is obtained by delaying the phase of the sampling pulse CPH1 by 480 ° in terms of the original oscillation pulse VCO. First, a pulse shown by a solid line of the sampling pulse CPH2 delayed by 360 ° in terms of VCO is created, and then further delayed by 120 ° using a timing pulse generator internal element such as an inverter.
The pulse indicated by the broken line of H2 is used. Since the sampling pulse CPH3 is delayed by 960 ° in terms of the original oscillation pulse VCO from the sampling pulse CPH1, the sampling pulse CP is first delayed by 900 ° in terms of the VCO.
The pulse shown by the solid line of H3 is created, and then the VCO
Delayed by 60 ° in conversion, actually sampling pulse CPH
The pulse indicated by the broken line 3 is used.

FIG. 3 is a schematic view showing a display image example in one embodiment of the liquid crystal display panel driving device of the present invention.
2 shows an example of image display when the liquid crystal display panel driving device shown in FIG. 1 is driven by the pulse shown in the timing chart shown in FIG. 2, and a wide signal is used as a video signal. 3 (a) is an image P ₁ in the case of display in the liquid crystal panel for the wide signal, indicating that the circle is normally displayed as a circle. 3 (b) is an image P ₂ when viewed in NORM the liquid crystal panel for normal signal, indicating that it is ellipse circle extending longitudinally. FIG.
(c) is an image P ₃ when viewed in H · ZOOM the liquid crystal panel for normal signals, although the left and right images lacking part, indicating that the circle is normally displayed as a circle.

As described above, according to the present embodiment, FIG.
As is clear from the comparison between FIG. 4C and FIG. 4C, when a wide signal is displayed on a liquid crystal panel for a normal signal so that a circle is normally displayed as a circle, three phases for sampling a video signal are used. Since the image displayed by increasing the frequency of the clock pulse to 4/3 times is stretched in the horizontal direction, it is possible to easily switch between NORM and H.ZOOM without complicating the peripheral circuit. Furthermore, an easy-to-view screen display can be obtained without reducing the image display area and without deteriorating the display quality of the images although the left and right images are partially missing.

[0016]

As described above, according to the present invention, when a wide signal is displayed on a liquid crystal panel for a normal signal so that a circle is normally displayed as a circle, a three-phase clock pulse for sampling a video signal is used. Since the image displayed by increasing the frequency of the image by 4/3 times is stretched in the horizontal direction, the advantageous effects that the image display area does not change and the display quality of the image does not decrease are obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display panel driving device according to an embodiment of the present invention.

FIG. 2 is a timing chart showing an operation of the liquid crystal display panel driving device according to one embodiment of the present invention.

FIG. 3 is a schematic diagram showing an example of a display image in the embodiment of the liquid crystal display panel driving device of the present invention.

FIG. 4 is a schematic diagram showing an example of a display image in a conventional liquid crystal panel driving device.

[Description of Signs] 1. Inverter, 2. 3. Divider circuit, 3. 4. Divider circuit, 4. ... First delay circuit, 5. ... Second delay circuit,
6, 7, 8 ... interlocking changeover switch, 9, 10, 11 ... buffer circuit, 12, 13, 14 ... output terminal, 15 ... n frequency divider circuit, 16 ... horizontal synchronization signal input line, 17 ... phase comparison circuit, 18 ... Timing pulse generator, 19 ... Integrating circuit, 20 ... Variable capacitance diode, 21 ... DC blocking capacitor, 22 ... Resonant coil, 23 ... Resonant capacitor, 24 ... Bypass capacitor, 25 ... Variable resistor, 26 ...
Changeover switch, 27 ... DC power input line.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 5 / 66,9 / 30 G09G 3/36 H03K 5/15

Claims (2)

(57) [Claims] 1. A liquid crystal display panel driving apparatus using a three-phase clock pulse composed of three-phase pulse train signals having mutually different phases, wherein the three-phase clock pulse generation circuit for generating the three-phase clock pulse includes a system. An original oscillation circuit for oscillating an original oscillation pulse for determining a frequency for generating a basic clock to be a clock; and an original oscillation pulse from the original oscillation circuit being converted into a reference signal and an original oscillation cycle by 36.
A divide-by-3 circuit that divides the frequency of the original oscillation pulse by 4 into a 120 ° delay signal that is delayed by 0 ° and a 240 ° delay signal that is delayed by 720 ° in terms of the original oscillation cycle, and a quarter that divides the original oscillation pulse from the original oscillation circuit by 4 A frequency dividing circuit, and dividing the frequency-divided signal from the frequency-divided circuit by about 4
A first delay circuit that delays by a time corresponding to 480 °,
The divide-by-4 signal from the divide-by-4 circuit is converted to the original oscillation cycle of about 960.
A second delay circuit that delays by a time corresponding to °, and a first switch that switches between a reference signal from the divide-by-3 circuit and a divide-by-4 signal from the divide-by-4 circuit and outputs it as a first pulse train. Means for switching between a 120 ° delay signal from the three-frequency divider circuit and a delay signal from the first delay circuit to output a second pulse train signal; and 240 ° delayed signal and the second
Switching means for switching between the delay signal from the delay circuit and the third pulse train signal, and outputting the three-phase pulse train signal as a first pulse train signal output from the first switching means. And a second pulse train signal output from the second switching means and a third pulse train signal output from the third switching means.
When the first, second and third switching means are switched to the divide-by-4 signal side, a normal video display mode is constituted,
A liquid crystal display panel driving device, wherein when the first, second, and third switching means are switched to the divide-by-3 signal side, a horizontal image enlargement display mode is configured. 2. The method according to claim 1, wherein the first and second delay circuits in the three-phase clock pulse generating circuit are constituted by only an inverter element or a combination of a decoded value at a change point of an original oscillation pulse and an inverter element. The liquid crystal display panel driving device according to claim 1.