JP3317652B2 - Multilayer printed wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a multilayer printed wiring board in which a lower conductive circuit formed on a base and an upper conductive circuit on an interlayer insulating layer provided on the base are connected via via holes. In particular, the interlayer insulating layer is
Composite of curable resin or composite of photosensitive resin and thermoplastic resin
Improve the toughness of the interlayer insulating layer by forming from the union
To improve the peel strength of the conductor circuit and heat cycle
Prevent cracks in via holes during operation
It is possible to simultaneously form a plurality of via holes when forming a via hole in the interlayer insulating layer , so that even if a connection failure occurs in some of the plurality of via holes, the wiring can be performed. The present invention relates to a multilayer printed wiring board capable of reliably maintaining the connection reliability between a lower conductor circuit and an upper conductor circuit as a whole board.

[0002]

2. Description of the Related Art In recent years, with the development of the electronics industry, electronic devices have been reduced in size or speed, and with this, printed wiring boards and various types of wiring boards on which LSIs are mounted have been developed by fine patterning. Is required. In order to achieve such high density, a multilayer printed wiring board called a so-called build-up wiring board is most preferable.

[0003] Under such circumstances, conventionally, in a multilayer printed wiring board, a multilayer connection structure has been realized by sequentially connecting connection pads and patterns via via holes. Here, a connection structure for connecting via a via hole a connection pad formed on a base and a pattern on an interlayer insulating layer provided on the base in a conventional multilayer printed wiring board will be described with reference to FIG. . FIG. 4 shows a connection structure in which a connection pad formed on a base material in a conventional multilayer printed wiring board and a pattern on an interlayer insulating layer are connected via holes, and FIG. 4A shows a multilayer printed wiring board. FIG. 4B is a cross-sectional view of the multilayer printed wiring board.

In FIGS. 4A and 4B, a multilayer printed wiring board 100 has an insulating base material 101 serving as a base material, and a through hole 102 is formed in the insulating base material 101. A conductor layer 103 is formed on the inner wall of the through-hole 102 by through-hole plating.
A circular through-hole land 104 continuous with the conductor layer 103 is provided on both upper and lower surfaces of the substrate. Insulating base material 101
Is connected to a circular connection pad 106 via a connection pattern 105. The connection pad 1 is also provided at a position on the lower surface of the insulating base material 101 which is separated from the through-hole land 104.
06 is formed. The through-hole land 10 is formed inside the through-hole 102 and on both sides of the insulating substrate 101.
4. The filling resin 107 is filled between the connection pattern 105, the connection pad 106 and other circuit patterns.

[0005] An interlayer insulating layer 108 is provided on the upper surface of the insulating base material 101, and a via having a conductor layer 109 formed therein is provided at a position corresponding to the connection pad 106 in the interlayer insulating layer 108. A hole 110 is provided, and a circuit pattern 111 connected to the conductor layer 109 is formed. Thereby, the connection pad 106 is connected to the circuit pattern 1 via the conductor layer 109 of the via hole 110.
11 is connected. Similarly, an interlayer insulating layer 108 is formed on the lower surface of the insulating base material 101, and a via hole 110 having a conductor layer 109 inside is formed at a position corresponding to the connection pad 106 in the interlayer insulating layer 108. Thus, the connection pad 106 and the conductor layer 109 are connected to each other. Around the conductor layer 109 and the circuit pattern 111 of the via hole 110, a plating resist layer 112 required for forming the conductor layer 109 and the circuit pattern 111 via an electroless plating process is formed. .

Next, a connection structure for connecting a connection pad formed on an interlayer insulating layer to a pattern on another interlayer insulating layer via a via hole will be described with reference to FIG. FIG. 5 shows a connection structure for connecting a connection pad formed on an interlayer insulating layer and a pattern on another interlayer insulating layer via a via hole in a conventional multilayer printed wiring board.
Is a plan view of the multilayer printed wiring board, and FIG. 5B is a cross-sectional view of the multilayer printed wiring board.

5A and 5B, a multilayer printed wiring board 120 has an insulating base 121 serving as a base. On the upper surface of the insulating base 121, connection pads 122 are formed. Filled resin layer 12 is formed around connection pad 122.
3 are provided. Connection pad 122, filling resin layer 1
An interlayer insulating layer 124 is formed on the upper surface of the semiconductor device 23, and a via hole 126 in which a conductive layer 125 is formed is provided at a position corresponding to the connection pad 122 in the interlayer insulating layer 124. A circuit pattern 127 connected to the layer 125 is formed. At the end of the circuit pattern 127 (the left end in FIGS. 5A and 5B),
The connection pads 128 are formed continuously. Thus, the connection pad 122 on the insulating base 121 is connected to the connection pad 128 on the interlayer insulating layer 124 via the conductor layer 125 of the via hole 126 and the circuit pattern 127. In addition, around the conductor layer 125, the circuit pattern 127, and the connection pad 128 of the via hole 126, each conductor layer 125, the circuit pattern 127,
A plating resist layer 129 required for forming the connection pad 128 is formed.

Further, another interlayer insulating layer 130 is provided on the upper surface of the interlayer insulating layer 124, and a conductor layer 131 is provided inside the interlayer insulating layer 130 at a position corresponding to the connection pad 128. The formed via hole 132 is provided, and a circuit pattern 133 connected to the conductor layer 131 is formed. Thereby, the interlayer insulating layer 1
The 24 connection pads 128 are connected to the circuit pattern 133 via the conductor layer 131 of the via hole 132.
The conductor layer 131 in the via hole 132 and the periphery of the circuit pattern 133 are covered with the conductor layer 1 through electroless plating.
31, a plating resist layer 134 required for forming the circuit pattern 133 is formed.

[0009]

However, in the conventional multilayer printed wiring boards 100 and 120, FIG.
As is clear from FIG. 5, the connection pads 106, 128
Is connected to the conductor layers 109 and 131 by only one via hole 110 and 132.

At this time, when forming the via holes 110 and 132, the resin for forming the interlayer insulating layer 108 and the like remains in the via holes provided in the interlayer insulating layers 108, 124 and 130. In such a case, the connection pads 106 and 128 and the via hole 1
Insulation failure occurs between the conductor layers 109, 125, and 131 of 10, 10 and 132, resulting in poor connection.

When the amount of resin remaining in the via hole is small, complete connection failure does not occur, and the connection pads 106 and 128 and the via holes 110 and 132 are initially provided. However, the conductor layers 109, 125, and 131 may be peeled off by the heat cycle, and as a result, a connection failure may be caused.

Accordingly, if at least one of the via holes 110, 132 existing in the printed wiring boards 100, 120 is not connected, the printed wiring boards 100, 120 are not connected.
20 itself becomes defective and there is a problem that reliability is reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and an interlayer insulating layer is made of a thermoplastic resin.
Thermosetting resin composite or photosensitive resin and thermoplastic resin
By forming from a composite, the toughness of the interlayer insulating layer is improved.
To improve the peel strength of the conductor circuit and heat cycle
Cracks in the via hole during
At the same time, by forming a plurality of via holes collectively when forming via holes in the interlayer insulating layer, even when connection failure occurs in some of the plurality of via holes, It is an object of the present invention to provide a multilayer printed wiring board capable of reliably maintaining connection reliability between a lower conductive circuit and an upper conductive circuit as a whole wiring board.

[0014]

According to a first aspect of the present invention, there is provided a multilayer printed wiring board, wherein an interlayer insulating layer is formed on a base material on which a lower conductive circuit is formed, and the interlayer insulating layer is formed on the interlayer insulating layer. In a multilayer printed wiring board in which an upper conductor circuit is formed and the lower conductor circuit and the upper conductor circuit are electrically connected through via holes, the interlayer insulating layer is a composite of a thermoplastic resin and a thermosetting resin. body or are complex or we formed of a photosensitive resin and a thermoplastic resin, a plurality of the via hole, teardrop shape with is formed by a set while sharing the lands, as a whole land shape , An elliptical shape, an elliptical shape, or a circular shape.

In the multilayer printed wiring board of the first aspect, the interlayer
The insulating layer is made of a composite of thermoplastic resin and thermosetting resin or
By forming from a composite of light resin and thermoplastic resin
Improves the toughness of the interlayer insulation layer to increase the peel strength of the conductor circuit.
Via hole during heat cycle
It is possible to prevent the occurrence of minute cracks. Also,
Since the via holes are formed in a state in which a plurality of via holes are shared by sharing the land, even if a connection failure occurs in some of the plurality of via holes, the lower conductor circuit and the upper conductor circuit as the whole wiring board are formed. It is possible to reliably maintain the connection reliability with the device.

Here, the number of via holes is preferably 2 to 5 as described in claim 2.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a multilayer printed wiring board according to the present invention will be described in detail based on an embodiment embodying the present invention with reference to FIG. FIG. 1 shows a connection structure for connecting a connection pad formed on an interlayer insulating layer and a pattern on another interlayer insulating layer via holes, and FIG. 1A is a plan view of a multilayer printed wiring board. FIG. 1B is a sectional view of the multilayer printed wiring board.

1 (A) and 1 (B), a multilayer printed wiring board 10 has a base material 11, and a connection pad 12 constituting a part of a lower conductive circuit 12A is provided on an upper surface of the base material 11. Are formed, and a filling resin layer 13 is provided around the connection pad 12. Connection pad 12,
An interlayer insulating layer 14 is formed on the upper surface of the filling resin layer 13, and a plurality of conductive layers 15 are formed inside the interlayer insulating layer 14 at positions corresponding to the connection pads 12 in FIG. In this case, three (3) via holes 16 are formed, and connection pads 17 having a substantially elliptical shape are formed.

Here, the elliptical connection pad 17 constitutes a part of the intermediate layer conductor circuit, and is formed on an interlayer insulating layer 20 described later at one end of the ellipse in the major axis direction. A plurality of parts that form part of the upper conductor circuit 24 (in FIG. 1,
(3) lands are connected to each other to form via holes 22 connected to each other, and the other end in the major axis direction of the ellipse is connected to the via hole land 18 of the via hole 16.
Is part of. Thereby, the connection pads 12 on the insulating base material 11 are connected to the connection pads 17 from the conductor layers 15 of the plurality of via holes 16. 1A, the oblong shape of the connection pad 17 is formed such that opposing sides of the rectangle are drawn in an arc toward the outside, and furthermore, the opposing sides of the rectangle are formed on the outside. Needless to say, a shape (ellipse) in which an arc is drawn may be used. The elliptical shape is shown in FIG.

It is preferable that 2 to 5 via holes are formed as a group. A plurality of via holes are to be shared by sharing a land, but the number of via holes is 5
If the number exceeds the number, the land area must be increased, and the wiring density decreases.

Around the connection pad 17 including the conductor layer 15 of each via hole 16, a plating resist layer required for forming each conductor layer 15 and the connection pad 17 through an electroless plating process. 19 are formed.

On the upper surface of the interlayer insulating layer 14, another interlayer insulating layer 20 is provided.
0, one end of the connection pad 17 (FIGS. 1A and 1B).
(The middle and right end portions) are provided with three via holes 22 having a conductor layer 21 formed therein, and an upper conductor circuit 24 including a circuit pattern 23 connected to the conductor layer 21 formed therein. ing. Thus, the connection pads 17 of the interlayer insulating layer 14 are connected to the circuit patterns 23 via the conductor layers 21 of the via holes 22.

A plating resist layer 25 required for forming the conductor layer 21 and the circuit pattern 23 through electroless plating is formed around the conductor layer 21 and the circuit pattern 23 in the via hole 22. Have been. 1, the upper conductor circuit 24 includes an elliptical connection portion 26 in which the via holes 22 are formed and a circuit pattern 23 continuous from the connection portion 26.

The plating resist layer 19 and the plating resist layer 25 remain on the multilayer printed wiring board when the full additive method is employed, but are removed after the connection pads are formed by electrolytic plating in the semi-additive method. Is done. In the present invention, either the full additive method or the semi-additive method may be employed. When the full additive method is employed, it is desirable to provide a roughened layer on the upper surface of a conductor circuit such as the conductor layer 15, the connection pad 17, the connection portion 26, and the circuit pattern 23. In the case of the semi-additive method, it is desirable to provide a roughened layer on the surface including the side surfaces of these conductor circuits. This is to improve the adhesion to the interlayer insulating layer and prevent cracks caused by heat cycles. As the roughened layer, a roughened layer of a needle-shaped alloy made of copper-nickel-phosphorus, or a roughened layer formed by an oxidation (blackening) -reduction treatment is preferable.

The multilayer printed wiring board 10 is manufactured as follows. That is, by performing a predetermined etching process, resin filling, and the like on the copper-clad laminate, the connection pads 12 that constitute a part of the lower conductive circuit 12A are formed on the base material 11, and then the connection pads 12 are formed on the upper surface of the base material 11. A photosensitive resin is applied and dried to form the interlayer insulating layer 14, and the via holes 16 are formed.
Exposure is performed with a mask film (not shown) having a light-shielding pattern corresponding to the connection pad 17 including the via-hole land 18 in close contact with the interlayer insulating layer 14. After the exposure, the mask film is peeled off from the interlayer insulating layer 14 and development is performed. As a result, via holes 16 and the like are formed. Further, a plating catalyst nucleus is provided on the interlayer insulating layer 14 and a plating resist layer 19 is formed, and then the conductor layer 15 and the like are formed by performing electroless plating. Further, in the same manner as described above, a photosensitive resin is applied and dried to form the interlayer insulating layer 20, and a mask film having a light shielding pattern corresponding to the upper conductive circuit 24 including the via hole 22 and the circuit pattern 23 (FIG. (Not shown) is exposed in a state of being in close contact with the interlayer insulating layer 20. After the exposure, the mask film is peeled off from the interlayer insulating layer 20 to perform development. As a result, via holes 22 and the like are formed. Further, a plating catalyst nucleus is provided on the interlayer insulating layer 22 and a plating resist layer 25 is formed, and then the conductor layer 21 and the like are formed by performing electroless plating. Thereby, the multilayer printed wiring board 10 is manufactured.

At this time, as an interlayer insulating agent for forming the interlayer insulating layers 14 and 20, a thermosetting resin such as an epoxy resin, a polyimide resin, a bismaleimide triazine resin, a phenol resin, or a photosensitive resin obtained by sensitizing these resins is used. Resins, thermoplastic resins such as polyethersulfone, composites of a thermoplastic resin and a thermosetting resin, and composites of a photosensitive resin and a thermoplastic resin can be used. In addition, these surfaces may be roughened with an oxidizing agent, an acid, an alkali, or the like. By roughening, the adhesion to the conductor circuit formed on this surface can be improved.

The interlayer insulating agent is preferably an adhesive for electroless plating. As the adhesive for electroless plating, an adhesive obtained by dispersing cured heat-resistant resin particles soluble in an acid or an oxidizing agent in a heat-resistant resin that is hardly soluble in an acid or an oxidizing agent is optimal. This is achieved by roughening and removing heat-resistant resin particles soluble in acid or oxidizing agent.
This is because an octopus-shaped anchor can be formed on the surface, and the adhesion to the conductor circuit can be improved.

As the heat-resistant resin which is hardly soluble in an acid or an oxidizing agent, a photosensitive thermosetting resin or a composite of a photosensitive thermosetting resin and a thermoplastic resin is desirable. By sensitizing, via holes can be easily formed by exposure and development. Further, by forming a composite with a thermoplastic resin, the toughness can be improved, the peel strength of the conductor circuit can be improved, and the occurrence of cracks in the via hole due to the heat cycle can be prevented.

Specifically, epoxy acrylate obtained by reacting an epoxy resin with acrylic acid or methacrylic acid, or a composite of epoxy acrylate and polyether sulfone is preferred.

The epoxy acrylate is preferably one in which 20 to 80% of all epoxy groups have reacted with acrylic acid or methacrylic acid.

Further, the heat-resistant resin particles include:
Heat-resistant resin powder having an average particle size of 10 μm or less, aggregated particles obtained by aggregating a heat-resistant resin powder having an average particle size of 2 μm or less,
A mixture of heat-resistant powder resin particles having an average particle diameter of 2 μm to 10 μm and heat-resistant resin powder having an average particle diameter of 2 μm or less,
Pseudo particles obtained by adhering at least one of a heat-resistant resin powder or an inorganic powder having an average particle diameter of 2 μm or less to the surface of a heat-resistant resin powder having an average particle diameter of 2 μm to 10 μm,
It is desirable to be selected from the following. This is because they can form more complex anchors.

As the heat-resistant resin particles, epoxy resin, amino resin (melamine resin, urea resin, guanamine resin) and the like are preferable.

The solubility of an epoxy resin in an acid or an oxidizing agent can be arbitrarily changed by changing the type of oligomer, the type of curing agent, and the crosslink density.

For example, a bisphenol A type epoxy resin oligomer cured with an amine curing agent is easily dissolved in an oxidizing agent. However, the novolak epoxy resin oligomer cured with an imidazole-based curing agent is hardly dissolved in the oxidizing agent.

The acid used in the present invention includes phosphoric acid, hydrochloric acid, sulfuric acid, and organic acids such as formic acid and acetic acid, and organic acids are particularly preferable. This is because when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded.

The oxidizing agent is preferably chromic acid or permanganate (such as potassium permanganate).

In the present invention, the interlayer insulating agent may have a plurality of layers. In the case of using a plurality of layers, there are the following modes.

1) In the interlayer insulating layer provided between the upper conductor circuit and the lower conductor circuit, the side close to the upper conductor circuit is coated with an acid or an oxidizing agent in a heat-resistant resin which is hardly soluble in an acid or an oxidizing agent. Adhesive for electroless plating in which hardened and heat-resistant resin particles soluble in water are dispersed, and have a two-layer structure in which the side close to the lower conductor circuit is made of a heat-resistant resin that is hardly soluble in acid or oxidizing agent. .

With this configuration, even if the adhesive layer for electroless plating is roughened, it is not excessively roughened and short-circuiting occurs between the layers.

2) A filler resin material is embedded between the lower conductor circuits in the interlayer insulating layer provided between the upper conductor circuit and the lower conductor circuit, and the surface of the lower conductor circuit and the filler resin material are flush with each other. A heat-resistant resin layer hardly soluble in an acid or an oxidizing agent was formed thereon, and a hardening treatment soluble in an acid or an oxidizing agent was further performed thereon in a heat-resistant resin hardly soluble in an acid or an oxidizing agent. A three-layer structure in which an adhesive for electroless plating in which heat-resistant resin particles are dispersed is formed.

In the multilayer printed wiring board 10 according to the present embodiment configured as described above, the connection pads 12 on the base material 11 such as the insulating base material and the multilayer printed wiring board and the connection pads on the interlayer insulating layer 14 are formed. 17 and between the connection pad 17 and the connection portion 26 of the upper conductor circuit 24 on the interlayer insulating layer 20, the connection pad 17 is connected via a plurality of via holes 16 and 22. Since the plurality of via holes 16 and 22 are formed collectively by sharing a land as described above, even if some via holes 16 and 22 are disconnected, the remaining via holes 16 and 22 are disconnected. , 22 can be reliably connected.

Thus, the probability that the multilayer printed wiring board 10 will have a disconnection failure can be significantly reduced.

It should be noted that the present invention is not limited to the above-described embodiment, and it is needless to say that various improvements and modifications can be made without departing from the gist of the present invention. For example, in the above-described embodiment, the shape of the connection pad 17 and the connection portion 26 serving as via-hole lands for forming the via holes 16 and 22 is configured to be an elliptical shape. Absent.

For example, as shown in FIG. 2, the connection portion 26 in the upper layer conductor circuit 24 may be formed in a circular shape, and three via holes 22 are formed in the circular connection portion 26 by a substantially equilateral triangle. May be provided at the three vertex positions. Further, as shown in FIG. 3, the shape of the connection portion 26 in the upper conductor circuit 24 may be formed in a teardrop shape,
In the teardrop-shaped connection 26, three via holes 2
2 may be provided at three vertex positions of a substantially equilateral triangle. In addition, any other shape such as an elliptical shape similar to each of these shapes can be used.

[0045]

As described above, in the multilayer printed wiring board according to the first aspect, the interlayer insulating layer is made of a thermoplastic resin and a thermosetting resin.
Composite of photopolymerizable resin or composite of photosensitive resin and thermoplastic resin
By forming from the body, the toughness of the interlayer insulating layer is improved.
To improve the peel strength of the conductor circuit and heat cycle
Cracks in via holes
It becomes possible. Further, since the via holes are formed in a state where a plurality of via holes are shared and share a land, even if a connection failure occurs in some of the plurality of via holes, the entire lower surface of the wiring board and the upper layer conductor circuit are formed. The connection reliability with the conductor circuit can be reliably maintained.

As described above, according to the present invention, the interlayer insulating layer
A composite of a plastic resin and a thermosetting resin or a photosensitive resin
By forming from a composite of plastic resin, interlayer insulation layer
To improve the peel strength of the conductor circuit
Cracks in via holes during heat cycle
When a connection failure occurs in some of the plurality of via holes by forming a plurality of via holes at the same time when forming via holes in the interlayer insulating layer , it is possible to prevent Also in this case, it is possible to provide a multilayer printed wiring board capable of reliably maintaining the connection reliability between the lower conductor circuit and the upper conductor circuit as the whole wiring board.

[Brief description of the drawings]

FIG. 1 shows a connection structure in which connection pads formed on an interlayer insulating layer and a pattern on another interlayer insulating layer are connected via via holes, FIG. 1A is a plan view of a multilayer printed wiring board, FIG. 1B is a cross-sectional view of the multilayer printed wiring board.

FIG. 2 is an explanatory diagram showing another example of a shape of a connection portion in an upper-layer conductor circuit.

FIG. 3 is an explanatory view showing still another example of a shape of a connection portion in an upper conductor circuit.

FIG. 4 shows a connection structure in which a connection pad formed on a core base material and a pattern on an interlayer insulating layer are connected via holes in a conventional multilayer printed wiring board, and FIG. FIG. 4B is a cross-sectional view of the multilayer printed wiring board.

FIG. 5 shows a connection structure in which a connection pad formed on an interlayer insulating layer in a conventional multilayer printed wiring board and a pattern on another interlayer insulating layer are connected via via holes;
5A is a plan view of the multilayer printed wiring board, and FIG. 5B is a cross-sectional view of the multilayer printed wiring board.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Multilayer printed wiring board 11 Base material 12, 17 Connection pad 12A Lower conductor circuit 14, 20 Interlayer insulation layer 16, 22 Via hole 18 Via hole land 24 Upper conductor circuit 23 Circuit pattern 26 Connection part

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H05K 3/46 H05K 1/11

Claims (2)

(57) [Claims] 1. An interlayer insulating layer is formed on a substrate on which a lower conductive circuit is formed, an upper conductive circuit is formed on the interlayer insulating layer, and the lower conductive circuit and the upper conductive circuit are connected via via holes. in the multilayer printed wiring board formed by electrically connected, the interlayer insulating layer is complex or al complex formation or photosensitive resin and the thermoplastic resin of the thermoplastic resin and a thermosetting resin, said via A plurality of holes, wherein a plurality of holes are formed collectively while sharing the land, and the land shape as a whole is any of a teardrop shape, an elliptical shape, an oval shape, and a circular shape. Printed wiring board. 2. The multilayer printed wiring board according to claim 1, wherein 2 to 5 via holes are collectively formed.