JP3310481B2 - Test mode execution device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is mounted on a device having a test mode control function by a microprocessor,
More specifically, the present invention relates to a test mode execution device used in a test process of an assembly line, and more particularly, to a nonvolatile memory (EEP).
The present invention relates to a test mode execution device that automatically executes a test mode by power-on operation by skillfully utilizing a ROM.

[0002]

2. Description of the Related Art In an apparatus having a test mode control function by a microprocessor, for example, in a microwave oven, a test mode is executed by operating a plurality of infrequently used specific keys in combination. An unknown user is prevented from executing the test mode in normal operation.

[0003]

However, in the specific key combination method, if the operation for executing the test mode is simplified (for example, two keys are simultaneously pressed), the test mode may be executed due to a user's erroneous operation. There is.

On the other hand, in the microwave oven, since the number of keys has been reduced and the number of keys existing on the operation panel has been reduced,
Despite the limited number of combination patterns,
The number of test modes is on the rise.

For this reason, more complicated key combinations must be set, and an increase in the loss time due to the complicated key operation for entering the test mode and the introduction of an expensive robot capable of coping with the complicated key operation are required. Have been.

The present invention has been made in view of the above situation, and has as its object to prevent execution of a test mode after shipment and to simplify a test mode execution operation in a test process.

[0007]

According to the present invention, there is provided a test mode.
Nonvolatile memory for storing the order value of
Check that the ordinal value stored in the
A determination means for determining whether the value is a normal mode transition value, and a test
Order to update the order value based on the execution result of the mode
Value update means and detection of the first power-on after product assembly
First power-on detection means
Initial value setting means for setting the order value to an initial value based on the
With the number of power ons after product assembly
Test mode execution device that executes test mode sequentially
The numeric data stored in the non-volatile memory
Checksum value calculation to calculate the checksum value by adding
Means for storing the calculated checksum value
A specific memory area in the volatile memory and the specific memory area
Calculation of the stored checksum value and the above checksum value
Whether the checksum value calculated by the output means matches
A match determining means for determining whether the
Determine if checksum value is 0 based on match signal
Means for determining whether there is no match
Signal or the 0 judgment signal from the 0 judgment means
First power-on detection means to detect power-on
It is characterized by the following.

[0008]

[0009]

[0010]

According to the present invention, the non-volatile memory is skillfully used.
The first power-on can be detected only by checking the checksum value.
You.

[0011]

[0012]

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a test mode execution device according to the present invention will be described below in detail with reference to the drawings.

FIG. 3 is a schematic block diagram of a device having a test mode control function by a microprocessor, for example, a microwave oven, wherein 1 is a microprocessor for controlling the entire microwave oven, and 2 is the most important component of the present invention. Non-volatile memory (EEPROM)
As shown in FIG. 4, the checksum value, the execution order value of the test mode, and various data are stored in a rewritable manner. 3 is a microprocessor 1 for storing information necessary for automatic control.
4 are various relays for driving a heating means or a blowing means based on a command from the microprocessor 1, 5 is a power supply unit for rectifying and smoothing commercial power and supplying a predetermined DC power to the microprocessor 1, 6 Is a display device for displaying an instruction or an error message in the test mode, and 7 is an input means for giving a command to the microprocessor 1.

Next, one control operation of the test mode execution device according to the present invention will be described based on the above configuration and the flowchart shown in FIG. Note that the nonvolatile memory 2 employs a memory area A1 in which the order value of the test mode is set to an initial value (set to 1) in advance, and the control program of the present embodiment for executing the nine-step test mode is an orderly program. If the value is 9 or less, the test mode is designed so as to shift to the normal mode immediately after the power is turned on. If the value is 9 or less, the order values 1 to 9 are set to the test mode shift value and 10 is set to the normal mode shift value.

After the product is assembled, when the power is turned on to the product in a test process, the microprocessor 1
It is determined whether the order value stored in the memory area A1 is the normal mode transition value 10 (S1).

If the normal mode shift value is 10, the mode shifts to the normal mode.
Is executed, test mode 1 is executed (S
2).

The display device 6 displays that the test data is normally taken in by the execution of the test mode 1, and if the test result is passed, it is automatically or input from the input device 7 (S3). Thus, the memory area A1 of the nonvolatile memory 2 is incremented by 1 and updated to the order value 2 (S4), and the test mode 1 ends (S5). If the test data is not normally taken in and an error is displayed on the display device 6 or a rejection is input from the input device 7, the test mode 1 is stopped (S6). The test mode 1 is executed again.

When power is turned on again to a product that has passed the test mode 1 after the power is turned off, the order value of the memory area A1 becomes 2
, The test mode 2 is immediately executed.
The test mode is executed one after another and the test mode is passed and the memory area A1 is passed.
If the order value reaches 10, the next time the power is turned on, the normal mode is determined in step S1 and the mode is shifted to the normal mode. Therefore, the test mode is not executed at the user's house.

Next, another embodiment of the present invention will be described with reference to the flowchart shown in FIG. According to the present invention, even if the order value of the test mode is not set to the initial value (set to 1) in the memory area A1 of the nonvolatile memory 2 in advance, the test mode is sequentially executed only by repeatedly turning on / off the power. I have to.

After the product is assembled, when the product is turned on in the test process, the microprocessor 1
The checksum value is calculated by adding the numerical data of the memory areas A1 to An (S1). Then, it is determined whether the calculated checksum value matches the numerical data stored in the checksum value storage memory area A0 (S2), and if they match, whether the numerical data in the memory area A0 is 0 or not. (S3), the nonvolatile memory 2
Check if is pure.

If there is no match in the coincidence determination (S2) or if the above-mentioned 0 determination is 0, power is turned on for the first time after the product is assembled, and the memory area A of the nonvolatile memory 2 is turned on.
The order value 1 is set to 1 (S4), and the memory areas A1 to An
Is written to the memory area A0 (S
5).

With the above control operation, the test mode sequence value when the power is turned on for the first time after the product is assembled is set to the initial value (set to 1). The flowchart after step S6 is the same as that of the above embodiment. They are basically the same, and the difference is the addition of step S10.

[0024]

According to the present invention , the test mode can be executed only by turning on the power after assembling the product, and when there are a plurality of test processes, the plurality of test modes can be executed only by repeating the turning on / off of the power. it is possible to sequentially execute the work time reduction of the test process is total, except that it is possible to introduce a cheap <br/> number of working robot, nonvolatile memory
Only the judgment of the checksum value using the
Since power-on can be detected, it is extremely simple and cost effective.
Test mode that does not
You.

[0025]

[0026]

[Brief description of the drawings]

FIG. 1 is a flowchart illustrating an example of a test mode execution device according to the present invention.

FIG. 2 is a flowchart illustrating another example of a test mode execution device according to the present invention.

FIG. 3 is a schematic block diagram of a microwave oven employing the present invention.

FIG. 4 is a diagram illustrating a memory outline of a nonvolatile memory according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Microprocessor 2 Non-volatile memory (EEPROM) 6 Display device 7 Input means

Claims (1)

(57) [Claims] 1. A non-volatile memory for storing an order value of a test mode, and determining means for determining whether the order value stored in the non-volatile memory is a test mode transition value or a normal mode transition value, and order value updating means for updating said queue value based on the execution result of the test mode, product assembly
First power-on detection method to detect the first power-on after
Initialize the above order value based on the stage and the first power-on detection.
And a initial value setting means for setting a value, in product assembly test mode execution device in correspondence with the power-on times comprising a test mode is executed sequentially after, by adding a number data stored in the nonvolatile memory Choi
Checksum value calculating means for calculating the checksum value;
In the nonvolatile memory for storing the checked checksum value
Of the specific memory area and the memory area stored in the specific memory area.
Calculated by the checksum value calculation means
Determines if the checksum value matches
A match judging means and a match signal from the match judging means.
0 to determine whether the checksum value is 0
And a mismatch signal of the match determination means or
First power-on by the 0 judgment signal from the 0 judgment means
The first power-on detection means to detect
Test mode execution device that.