JP3297795B2 - Liquid crystal display device and driving method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device used for, for example, a camera-integrated VTR or a liquid crystal projector and a method of driving the same. More specifically, the present invention relates to a method of driving a V shift register constituted by a clocked inverter or the like. The present invention relates to an improved liquid crystal display device and a driving method thereof.

[0002]

2. Description of the Related Art In recent years, with the spread of devices with a liquid crystal display device typified by a camera-integrated VTR and a liquid crystal projector, a demand for higher performance of the liquid crystal display device has been increased, and a higher pixel count and higher performance of the liquid crystal display device have been demanded. Is progressing. In particular, thin film transistors (Thin Film) using polycrystalline silicon as an active layer
Transistor (hereinafter simply referred to as “TFT”) is a driving method of a liquid crystal display device that employs a dot sequential method in which a video signal is sequentially written for each pixel within a very short time due to its high speed performance. ing.

[0003] The configuration of a conventional liquid crystal display device will be briefly described with reference to FIG. FIG. 2 is a circuit diagram showing a main configuration of a conventional liquid crystal display device.

This liquid crystal display device has a row-like gate line X
And a column-shaped signal line Y, and a liquid crystal pixel LC arranged at each intersection of the two. Each liquid crystal pixel LC is TFT1
Driven by The V driver 2 has a configuration in which a plurality of shift register units 3 as shown in FIG.

[0005] The V driver 2 scans each gate line X line-sequentially and selects one row of liquid crystal pixels LC every one horizontal period (1H). Then, the H driver (not shown) sequentially samples the video signal to each signal line Y within 1H, and writes the video signal to the selected one row of liquid crystal pixels LC in a dot-sequential manner. Specifically, while the video signal is supplied via the horizontal switch 4 connected to each signal line Y, the H driver sequentially outputs horizontal sampling pulses φ _H1. .

The transfer clock A is input to the shift register unit 3 constituting the V driver 2,
Clock pulse C for driving shift register unit 3
K and the clock pulse CKX having the opposite phase are input.
By the way, the capacity of the clock line to which the clock pulses CK and CKX are input tends to increase as the number of pixels increases due to the recent trend of increasing the number of pixels. When the capacity of the clock line increases, as shown in FIG. 3, the clock waveform of the shift register unit 3 including the clocked inverter becomes dull.

That is, as is clear from the operation waveform diagram of the conventional V driver shown in FIG. 3B, when the transfer clock A rises to "high level", the clock pulse C
K cannot be completely lowered to "low level", and the B output falls to "low level" as shown by the broken line. Accordingly, the C output via the inverter also becomes “high level”, and as a result, there is a problem that the V driver 2 malfunctions.

[0008]

SUMMARY OF THE INVENTION The present invention has been made in view of such a problem, and an object of the present invention is to prevent a malfunction of a V driver due to a dull clock waveform of the V driver composed of a plurality of shift register units. An object of the present invention is to provide a liquid crystal display device and a method of driving the same, which prevent the above problem and stabilize the operation of the V driver.

[0009]

In order to solve the above-mentioned problems of the prior art, the following measures have been taken. That is, the liquid crystal display device of the present invention comprises a V driver to which a plurality of gate lines arranged in a row are connected, an H driver to which a plurality of signal lines arranged in a column are connected, and a V driver. In a liquid crystal display device having a plurality of shift register units provided with clock pulse inputs such as clock pulses CK and CKX, a clock pulse input of some shift register units among the plurality of shift register units and a clock pulse bus line And a buffer circuit is inserted between them.

Further, in the driving method of the liquid crystal display device according to the present invention, a V driver that scans the gate lines arranged in a row in a line-sequential manner and selects one row of pixels every one horizontal period is provided. A plurality of shift registers that constitute an H driver and a V driver that sequentially sample the signal lines arranged in a column and write a video signal to the selected pixels of one row in a dot-sequential manner, and that include a clock pulse input; In the method for driving a liquid crystal display device having a unit, a buffer circuit is inserted between a clock pulse input of some shift register units and a clock pulse bus line among a plurality of shift register units. As a result, even in a situation where the capacity of the clock pulse bus line increases due to the flow of increasing the number of pixels, the clock pulse waveform does not become dull, and the operation of the V driver can be stabilized.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of the present invention will be described with reference to the accompanying drawings.

Referring to FIG. 1, the liquid crystal display device of the present invention and its driving method will be described. FIG. 1 is a diagram showing the internal configuration of a V driver according to the present invention, and FIG.
(B) is an operation waveform diagram thereof. The same portions as those of the conventional liquid crystal display device are denoted by the same reference numerals, and the description thereof will be partially omitted.

The V driver 2 in FIG. 1 is configured by connecting a plurality of shift register units 3 in series. The transfer pulse A is input to the shift register unit 3, and a clock pulse CK for driving the shift register unit 3 and a clock pulse CKX having the opposite phase to the clock pulse CK are input to the shift register unit 3. Multiple shift register units 3
Among them, a buffer circuit 5 is inserted between the clock pulse CK and CKX input of some shift register units 3 and the clock pulse CK and CKX bus line as a feature of the present invention. The operation of the buffer circuit 5 prevents the waveforms of the clock pulses CK and CKX from becoming dull even in a situation where the capacity of the clock pulse bus line increases due to the trend toward higher pixel count.

That is, as is apparent from the waveform diagram of FIG. 1B, the waveforms of the clock pulses CK and CKX are dull before the buffer circuit 5,
After that, the clock pulses CK 'and CKX' rise fast. Thus, when the transfer clock A rises to “high level”, the output B becomes “low level”.
, And the operation of the V driver 2 is stabilized.

The present invention is not limited to the above embodiment,
Various embodiments can be employed. For example, in this embodiment, an example in which the buffer circuits are provided in all the shift register units 3 has been described, but the buffer circuits may be provided in some shift register units 3 such as every 10 pixels or every 100 pixels. Can also be effective. Further, the present invention is not limited to the shift register unit of the V driver illustrated, but is similarly applicable to the shift register unit of the H driver. Further, it goes without saying that the present invention can be appropriately applied without departing from the gist of the present invention.

[0016]

As described above, according to the liquid crystal display device and the method of driving the same of the present invention, the clocks of some shift register units among the V drivers in which a plurality of shift register units are continuously formed. Since the buffer circuit is inserted between the pulse input and the clock pulse bus line, the clock pulse waveform does not become dull even when the capacity of the clock pulse bus line increases. Thereby, the operation of the V driver can be stabilized.

[Brief description of the drawings]

FIG. 1 is a diagram showing an internal configuration of a V driver according to the present invention, wherein (a) is a circuit diagram thereof, and (b) is an operation waveform diagram thereof.

FIG. 2 is a circuit diagram showing a configuration of a main part of a conventional liquid crystal display device.

3A and 3B are diagrams showing an internal configuration of a conventional V driver, wherein FIG. 3A is a circuit diagram thereof, and FIG. 3B is an operation waveform diagram thereof.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Thin film transistor (TFT), 2 ... V driver, 3 ... Shift register unit, 4 ... Horizontal switch, 5 ... Buffer circuit

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G09G 3/36 G09G 3/20 G02F 1/133

Claims (3)

(57) [Claims] A V driver connected to a plurality of gate lines arranged in a row, an H driver connected to a plurality of signal lines arranged in a column, a V driver, and a clock pulse input. A liquid crystal display device having a plurality of shift register units, wherein a buffer circuit is inserted between a clock pulse input of some shift register units and a clock pulse bus line. 2. The clock pulse input according to claim 1, wherein the clock pulse input is a clock pulse CK of a shift register unit and a clock pulse CKX having an opposite phase to the clock pulse CK.
3. The liquid crystal display device according to 1. 3. A V driver for line-sequentially scanning gate lines arranged in a row to select one row of pixels in each horizontal period, and sequentially sampling signal lines arranged in a column in one horizontal period. And a V driver and a plurality of shift register units provided with a clock pulse input. A method for driving a liquid crystal display device, comprising stabilizing the operation of a V driver by inserting a buffer circuit between clock pulse inputs of some shift register units and clock pulse bus lines.